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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14220 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14220 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10267 1 T1 3 T2 1 T3 1
true 16635 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 11112 1 T1 3 T2 1 T3 1
true 16692 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 64 1 T7 2 T16 2 T92 2
others[1] 98 1 T359 2 T360 2 T361 2
others[2] 84 1 T7 2 T104 2 T199 2
others[3] 94 1 T92 2 T362 2 T363 2
others[4] 92 1 T103 2 T119 2 T364 2
others[5] 88 1 T92 2 T98 2 T364 2
others[6] 78 1 T16 2 T139 4 T365 2
others[7] 96 1 T7 2 T12 2 T200 2
false 14220 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T12 2 T16 2 T102 2
others[1] 86 1 T16 4 T88 2 T102 2
others[2] 88 1 T176 2 T177 2 T366 2
others[3] 104 1 T16 4 T99 2 T222 2
others[4] 100 1 T5 2 T95 2 T222 2
others[5] 70 1 T7 2 T367 2 T364 2
others[6] 82 1 T16 4 T92 2 T233 2
others[7] 84 1 T5 2 T16 2 T99 2
false 14220 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T16 2 T95 2 T70 2
others[1] 84 1 T92 2 T98 2 T201 2
others[2] 102 1 T16 4 T222 2 T364 2
others[3] 86 1 T16 4 T92 2 T94 2
others[4] 78 1 T5 2 T99 2 T368 4
others[5] 82 1 T7 2 T101 4 T365 2
others[6] 102 1 T16 4 T92 2 T94 2
others[7] 116 1 T5 2 T16 2 T103 2
false 14220 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 42 1 T200 4 T369 2 T370 2
others[1] 52 1 T371 2 T223 2 T372 2
others[2] 84 1 T96 2 T202 2 T373 2
others[3] 70 1 T16 2 T101 2 T98 2
others[4] 62 1 T16 2 T98 4 T201 2
others[5] 54 1 T97 4 T202 2 T223 2
others[6] 68 1 T16 2 T98 2 T223 2
others[7] 64 1 T93 4 T94 2 T101 2
false 14220 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 66 1 T7 2 T92 2 T200 2
others[1] 76 1 T101 2 T369 2 T364 2
others[2] 96 1 T16 6 T122 2 T103 2
others[3] 74 1 T97 2 T98 2 T201 2
others[4] 78 1 T5 2 T16 2 T96 2
others[5] 94 1 T103 2 T96 2 T99 2
others[6] 94 1 T16 6 T101 2 T99 2
others[7] 100 1 T7 2 T16 2 T101 2
false 14220 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 28 1 T16 2 T223 2 T374 2
others[1] 28 1 T366 2 T375 2 T269 2
others[2] 38 1 T139 2 T365 2 T374 2
others[3] 38 1 T92 2 T222 2 T223 2
others[4] 34 1 T16 2 T92 2 T104 2
others[5] 32 1 T139 2 T366 2 T376 2
others[6] 34 1 T103 4 T222 2 T139 2
others[7] 52 1 T16 2 T92 2 T98 2
false 14220 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 92 1 T16 2 T92 2 T95 2
others[1] 112 1 T16 2 T99 4 T362 2
others[2] 76 1 T95 2 T223 2 T365 2
others[3] 78 1 T16 2 T98 2 T99 2
others[4] 80 1 T16 2 T222 2 T119 2
others[5] 58 1 T7 2 T16 2 T223 2
others[6] 110 1 T16 2 T92 2 T98 2
others[7] 122 1 T7 2 T12 2 T16 6
false 14220 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T88 2 T99 2 T202 2
others[1] 108 1 T16 2 T66 2 T98 4
others[2] 62 1 T201 2 T202 2 T377 2
others[3] 82 1 T16 2 T92 2 T119 2
others[4] 98 1 T16 6 T96 2 T245 2
others[5] 92 1 T93 2 T118 2 T98 2
others[6] 90 1 T12 2 T94 2 T97 2
others[7] 106 1 T16 2 T95 2 T97 2
false 14220 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T12 2 T16 4 T368 2
others[1] 102 1 T5 2 T16 2 T369 2
others[2] 60 1 T92 2 T199 2 T119 2
others[3] 92 1 T91 2 T99 2 T373 2
others[4] 86 1 T7 2 T66 2 T93 2
others[5] 72 1 T16 4 T93 2 T363 2
others[6] 74 1 T91 2 T96 2 T202 2
others[7] 96 1 T16 4 T104 2 T223 4
false 14220 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T16 2 T98 2 T371 2
others[1] 88 1 T12 2 T66 2 T200 2
others[2] 94 1 T16 4 T91 2 T123 2
others[3] 92 1 T7 2 T16 2 T92 2
others[4] 82 1 T16 2 T95 2 T101 2
others[5] 92 1 T16 6 T122 2 T103 2
others[6] 104 1 T91 2 T103 2 T368 2
others[7] 88 1 T16 2 T92 4 T97 2
false 14220 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 124 1 T7 2 T93 2 T101 2
others[1] 108 1 T16 2 T103 2 T97 2
others[2] 86 1 T16 2 T103 4 T98 2
others[3] 78 1 T7 2 T16 2 T199 2
others[4] 88 1 T12 2 T96 2 T223 2
others[5] 86 1 T91 2 T101 2 T98 2
others[6] 78 1 T97 2 T98 2 T119 2
others[7] 100 1 T5 2 T102 2 T97 2
false 14220 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 25 1 T8 2 T9 1 T18 1
others[1] 29 1 T8 1 T18 1 T266 1
others[2] 25 1 T8 1 T266 2 T378 2
others[3] 27 1 T223 2 T243 2 T379 2
others[4] 34 1 T8 3 T9 2 T13 1
others[5] 32 1 T120 1 T19 1 T243 2
others[6] 27 1 T16 2 T20 1 T139 2
others[7] 31 1 T8 2 T9 2 T365 2
false 14220 1 T1 4 T2 4 T3 3
true 2308 1 T1 1 T5 5 T7 7


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 22 1 T8 3 T179 1 T310 1
others[1] 32 1 T8 1 T223 2 T243 1
others[2] 39 1 T13 1 T120 1 T266 2
others[3] 31 1 T8 1 T18 1 T120 1
others[4] 13 1 T378 2 T20 1 T179 1
others[5] 38 1 T16 2 T8 2 T9 1
others[6] 18 1 T8 1 T9 2 T243 1
others[7] 37 1 T8 1 T9 2 T18 1
false 11592 1 T1 3 T2 1 T3 2
true 18928 1 T1 5 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 110 1 T16 2 T92 2 T93 2
others[1] 90 1 T7 2 T364 2 T223 2
others[2] 84 1 T92 2 T199 2 T363 2
others[3] 78 1 T12 2 T103 2 T119 2
others[4] 80 1 T16 2 T222 2 T362 4
others[5] 88 1 T7 2 T92 2 T98 2
others[6] 76 1 T7 2 T98 2 T363 2
others[7] 88 1 T104 2 T223 4 T361 2
false 7963 1 T1 2 T2 1 T3 2
true 16751 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T16 4 T102 4 T363 2
others[1] 70 1 T98 2 T99 2 T222 2
others[2] 76 1 T5 2 T16 2 T92 2
others[3] 92 1 T12 2 T16 2 T95 2
others[4] 112 1 T7 2 T16 2 T118 2
others[5] 68 1 T16 2 T88 2 T104 2
others[6] 72 1 T16 2 T97 2 T364 4
others[7] 114 1 T5 2 T16 2 T199 2
false 6933 1 T1 2 T2 1 T3 1
true 16502 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T7 2 T92 2 T96 2
others[1] 100 1 T16 2 T70 2 T99 2
others[2] 72 1 T101 2 T103 2 T98 4
others[3] 92 1 T16 4 T94 2 T98 2
others[4] 74 1 T5 2 T92 2 T101 2
others[5] 112 1 T16 2 T95 2 T99 2
others[6] 96 1 T5 2 T94 2 T101 2
others[7] 102 1 T16 8 T92 2 T98 2
false 7362 1 T1 2 T2 1 T3 1
true 16540 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 35 1 T9 1 T102 2 T18 1
others[1] 40 1 T9 2 T18 1 T378 2
others[2] 46 1 T9 1 T13 1 T266 2
others[3] 36 1 T8 1 T9 2 T101 2
others[4] 31 1 T199 2 T19 1 T225 1
others[5] 24 1 T16 2 T8 1 T115 1
others[6] 31 1 T16 2 T9 1 T266 1
others[7] 35 1 T30 1 T115 1 T120 1
false 11528 1 T1 3 T2 1 T3 1
true 18924 1 T1 5 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 52 1 T16 2 T98 2 T364 2
others[1] 72 1 T97 2 T98 2 T202 2
others[2] 66 1 T93 2 T97 2 T363 2
others[3] 60 1 T16 2 T94 2 T101 2
others[4] 62 1 T101 2 T200 2 T373 2
others[5] 48 1 T96 2 T200 2 T363 2
others[6] 60 1 T16 2 T93 2 T98 2
others[7] 76 1 T98 2 T202 2 T368 2
false 9013 1 T1 2 T2 1 T3 1
true 16745 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 24 1 T9 1 T18 1 T115 2
others[1] 30 1 T8 1 T92 2 T101 2
others[2] 27 1 T9 1 T265 1 T179 1
others[3] 28 1 T120 2 T266 1 T19 1
others[4] 37 1 T115 2 T20 1 T225 1
others[5] 31 1 T8 1 T9 2 T309 1
others[6] 34 1 T16 2 T8 1 T266 1
others[7] 60 1 T16 2 T8 2 T127 2
false 11469 1 T1 3 T2 1 T3 1
true 18824 1 T1 5 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 72 1 T16 2 T369 2 T359 2
others[1] 88 1 T16 2 T92 2 T103 2
others[2] 96 1 T16 4 T96 2 T97 2
others[3] 76 1 T101 2 T103 2 T119 2
others[4] 72 1 T16 2 T201 2 T369 2
others[5] 90 1 T16 6 T101 2 T223 2
others[6] 80 1 T5 2 T101 2 T223 2
others[7] 104 1 T7 4 T122 2 T96 2
false 7765 1 T1 3 T2 1 T3 1
true 16653 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 28 1 T9 1 T18 1 T115 1
others[1] 39 1 T8 1 T176 2 T141 1
others[2] 34 1 T5 2 T16 2 T8 1
others[3] 21 1 T115 1 T120 2 T329 1
others[4] 32 1 T9 2 T13 1 T333 2
others[5] 27 1 T8 1 T18 2 T266 1
others[6] 35 1 T16 2 T9 1 T199 2
others[7] 31 1 T18 1 T115 1 T364 2
false 11419 1 T1 3 T2 1 T3 1
true 18828 1 T1 5 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 48 1 T92 4 T99 2 T222 2
others[1] 32 1 T222 2 T223 2 T139 2
others[2] 24 1 T366 2 T374 2 T380 2
others[3] 36 1 T104 2 T223 2 T360 2
others[4] 26 1 T16 2 T375 2 T269 2
others[5] 36 1 T92 2 T119 2 T360 2
others[6] 28 1 T16 2 T103 2 T376 2
others[7] 54 1 T16 2 T103 2 T98 2
false 9928 1 T1 3 T2 1 T3 1
true 16689 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 90 1 T7 2 T16 2 T96 2
others[1] 94 1 T95 2 T97 2 T98 2
others[2] 88 1 T16 4 T367 2 T223 4
others[3] 68 1 T7 2 T16 2 T92 2
others[4] 92 1 T16 4 T99 4 T222 2
others[5] 102 1 T12 2 T16 4 T92 2
others[6] 94 1 T16 2 T99 4 T119 2
others[7] 100 1 T98 2 T119 2 T202 2
false 7049 1 T1 3 T2 1 T3 1
true 16513 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 76 1 T16 2 T92 2 T96 2
others[1] 114 1 T16 2 T88 2 T93 2
others[2] 82 1 T94 2 T97 2 T98 4
others[3] 96 1 T16 2 T66 2 T95 2
others[4] 74 1 T12 2 T201 2 T202 2
others[5] 90 1 T16 4 T97 2 T99 2
others[6] 88 1 T362 2 T223 2 T360 2
others[7] 102 1 T16 2 T98 2 T99 2
false 7049 1 T1 3 T2 1 T3 1
true 16513 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 110 1 T12 2 T66 2 T104 2
others[1] 70 1 T16 2 T91 2 T96 2
others[2] 78 1 T5 2 T16 2 T91 2
others[3] 66 1 T16 4 T139 2 T381 2
others[4] 80 1 T93 2 T368 2 T139 2
others[5] 96 1 T7 2 T16 2 T93 2
others[6] 94 1 T16 2 T92 2 T373 2
others[7] 82 1 T16 2 T99 2 T373 2
false 6457 1 T1 2 T2 1 T3 1
true 16509 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T7 2 T99 2 T368 2
others[1] 100 1 T12 2 T16 4 T91 2
others[2] 98 1 T91 2 T92 2 T101 2
others[3] 74 1 T16 2 T95 2 T103 2
others[4] 98 1 T16 4 T92 2 T123 2
others[5] 74 1 T16 2 T122 2 T382 2
others[6] 78 1 T16 2 T122 2 T104 2
others[7] 120 1 T16 4 T66 2 T92 2
false 6457 1 T1 2 T2 1 T3 1
true 16509 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 40 1 T223 2 T383 2 T384 2
others[1] 58 1 T16 2 T104 2 T99 2
others[2] 58 1 T363 4 T139 2 T384 2
others[3] 66 1 T94 2 T122 2 T70 2
others[4] 62 1 T123 2 T103 2 T96 2
others[5] 72 1 T16 2 T223 4 T139 4
others[6] 76 1 T92 2 T223 2 T379 2
others[7] 76 1 T7 2 T16 2 T101 2
false 6965 1 T1 2 T2 1 T3 1
true 17904 1 T1 6 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 66 1 T91 6 T101 2 T223 2
others[1] 78 1 T94 2 T103 2 T96 2
others[2] 68 1 T16 2 T103 2 T99 2
others[3] 50 1 T70 2 T222 2 T368 2
others[4] 74 1 T7 2 T104 2 T251 2
others[5] 78 1 T122 2 T123 2 T139 2
others[6] 78 1 T16 2 T91 2 T92 2
others[7] 54 1 T16 2 T119 2 T223 2
false 6965 1 T1 2 T2 1 T3 1
true 17904 1 T1 6 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 37 1 T8 1 T19 1 T20 1
others[1] 31 1 T16 2 T102 2 T20 1
others[2] 32 1 T98 2 T115 2 T19 1
others[3] 31 1 T225 1 T243 1 T267 1
others[4] 33 1 T9 1 T18 1 T120 1
others[5] 44 1 T5 2 T16 2 T8 1
others[6] 30 1 T18 1 T115 1 T265 1
others[7] 19 1 T16 2 T243 1 T329 1
false 11688 1 T1 3 T2 2 T3 2
true 18997 1 T1 5 T2 5 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 90 1 T101 2 T103 2 T139 2
others[1] 106 1 T102 2 T97 2 T223 6
others[2] 112 1 T7 2 T103 2 T199 2
others[3] 88 1 T5 2 T12 2 T16 2
others[4] 98 1 T16 2 T98 2 T222 2
others[5] 72 1 T7 2 T93 2 T101 2
others[6] 72 1 T91 2 T103 2 T97 4
others[7] 110 1 T16 2 T98 2 T251 2
false 7883 1 T1 2 T2 1 T3 1
true 16711 1 T1 4 T2 4 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 32 1 T16 2 T8 1 T9 1
others[1] 30 1 T9 2 T266 2 T19 1
others[2] 42 1 T9 1 T102 2 T115 2
others[3] 35 1 T18 1 T98 2 T265 1
others[4] 24 1 T243 1 T141 1 T310 2
others[5] 41 1 T9 1 T30 1 T18 1
others[6] 35 1 T8 1 T9 1 T13 1
others[7] 39 1 T16 2 T9 1 T199 2
false 14220 1 T1 4 T2 4 T3 3
true 2340 1 T1 1 T5 4 T7 8

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%