dashboard | hierarchy | modlist | groups | tests | asserts

Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14432 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14432 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10261 1 T1 3 T2 1 T3 2
true 16822 1 T1 5 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 11186 1 T1 3 T2 1 T3 3
true 16878 1 T1 5 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 70 1 T15 2 T204 4 T411 2
others[1] 104 1 T93 2 T117 2 T203 2
others[2] 74 1 T5 2 T86 2 T412 2
others[3] 90 1 T15 2 T96 2 T86 2
others[4] 116 1 T36 4 T37 2 T92 2
others[5] 94 1 T26 2 T36 2 T92 2
others[6] 88 1 T413 2 T200 2 T121 2
others[7] 108 1 T26 2 T36 2 T92 2
false 14432 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T117 4 T121 2 T205 2
others[1] 80 1 T5 2 T86 2 T199 2
others[2] 102 1 T37 2 T15 2 T117 2
others[3] 98 1 T5 2 T94 2 T205 2
others[4] 108 1 T4 4 T26 2 T36 2
others[5] 106 1 T36 2 T93 2 T86 2
others[6] 114 1 T91 2 T98 2 T94 2
others[7] 124 1 T98 2 T15 4 T64 2
false 14432 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T5 2 T90 2 T92 4
others[1] 104 1 T37 2 T96 2 T198 2
others[2] 98 1 T4 2 T15 2 T200 2
others[3] 70 1 T15 2 T95 2 T86 2
others[4] 86 1 T86 2 T117 2 T121 4
others[5] 108 1 T98 2 T15 4 T200 2
others[6] 92 1 T93 2 T94 2 T86 2
others[7] 80 1 T4 2 T36 2 T15 2
false 14432 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T199 2 T121 4 T201 2
others[1] 56 1 T5 2 T86 2 T414 2
others[2] 42 1 T92 2 T198 2 T279 6
others[3] 66 1 T117 8 T121 2 T279 2
others[4] 74 1 T15 2 T86 2 T199 2
others[5] 64 1 T15 2 T86 2 T415 2
others[6] 46 1 T86 2 T203 2 T279 4
others[7] 86 1 T15 2 T121 4 T202 2
false 14432 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 74 1 T36 2 T92 2 T121 2
others[1] 82 1 T15 4 T200 2 T412 2
others[2] 80 1 T37 2 T121 2 T279 2
others[3] 90 1 T36 2 T121 2 T202 2
others[4] 72 1 T15 2 T121 4 T203 2
others[5] 98 1 T5 2 T93 4 T15 4
others[6] 88 1 T15 2 T95 2 T121 2
others[7] 108 1 T26 2 T37 2 T98 2
false 14432 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 42 1 T15 2 T117 2 T262 4
others[1] 24 1 T15 2 T203 2 T205 4
others[2] 36 1 T205 2 T47 2 T416 2
others[3] 50 1 T15 2 T203 2 T417 2
others[4] 22 1 T37 2 T15 2 T121 2
others[5] 32 1 T37 2 T204 2 T418 2
others[6] 42 1 T26 2 T93 2 T203 2
others[7] 24 1 T15 2 T261 2 T419 4
false 14432 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 102 1 T5 2 T93 2 T94 2
others[1] 92 1 T86 2 T199 2 T64 2
others[2] 74 1 T15 4 T117 4 T121 2
others[3] 112 1 T15 6 T117 4 T203 2
others[4] 78 1 T4 2 T96 2 T117 6
others[5] 98 1 T5 2 T91 2 T15 2
others[6] 104 1 T4 2 T37 2 T92 2
others[7] 124 1 T15 4 T95 2 T413 2
false 14432 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T5 2 T36 2 T15 2
others[1] 88 1 T15 2 T96 2 T117 2
others[2] 82 1 T4 2 T5 2 T26 2
others[3] 116 1 T26 2 T36 2 T117 6
others[4] 88 1 T91 2 T412 2 T203 4
others[5] 118 1 T4 2 T15 2 T96 2
others[6] 84 1 T121 2 T203 2 T279 2
others[7] 98 1 T91 2 T92 2 T15 6
false 14432 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T4 2 T94 4 T15 2
others[1] 112 1 T4 2 T37 2 T95 2
others[2] 112 1 T37 2 T90 2 T91 2
others[3] 92 1 T98 2 T94 2 T15 2
others[4] 104 1 T94 2 T15 4 T96 2
others[5] 110 1 T4 2 T26 4 T94 2
others[6] 72 1 T4 2 T6 2 T15 4
others[7] 102 1 T36 2 T93 2 T96 2
false 14432 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 106 1 T4 2 T91 2 T15 4
others[1] 96 1 T92 2 T94 2 T117 2
others[2] 94 1 T5 2 T90 2 T92 2
others[3] 92 1 T4 2 T36 2 T94 2
others[4] 90 1 T15 4 T121 4 T299 2
others[5] 96 1 T91 2 T93 2 T15 2
others[6] 80 1 T96 2 T200 2 T412 2
others[7] 102 1 T4 4 T5 2 T125 2
false 14432 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 100 1 T36 2 T205 4 T411 2
others[1] 94 1 T86 2 T117 2 T121 2
others[2] 98 1 T5 4 T86 2 T117 2
others[3] 70 1 T86 2 T117 2 T201 2
others[4] 94 1 T36 2 T37 2 T198 2
others[5] 90 1 T95 2 T86 2 T117 4
others[6] 118 1 T15 2 T199 2 T117 6
others[7] 116 1 T5 2 T15 2 T121 2
false 14432 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 35 1 T231 1 T133 2 T420 1
others[1] 36 1 T8 1 T16 3 T132 3
others[2] 38 1 T9 1 T279 2 T367 1
others[3] 28 1 T7 1 T253 1 T421 1
others[4] 23 1 T9 1 T117 2 T201 2
others[5] 28 1 T9 1 T137 2 T422 1
others[6] 34 1 T7 1 T9 1 T14 1
others[7] 40 1 T93 2 T132 2 T231 1
false 14432 1 T1 4 T2 4 T3 4
true 2263 1 T4 3 T5 5 T97 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 25 1 T231 1 T133 1 T420 2
others[1] 27 1 T9 1 T14 1 T16 1
others[2] 40 1 T93 2 T201 2 T133 1
others[3] 43 1 T9 1 T117 2 T16 1
others[4] 28 1 T132 1 T231 1 T279 2
others[5] 31 1 T7 1 T8 1 T9 1
others[6] 29 1 T420 1 T367 3 T277 2
others[7] 39 1 T7 1 T9 1 T16 1
false 11694 1 T1 3 T2 2 T3 3
true 19114 1 T1 5 T2 5 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T36 2 T92 2 T93 2
others[1] 70 1 T15 4 T203 4 T279 2
others[2] 110 1 T86 2 T117 2 T200 2
others[3] 84 1 T5 2 T37 2 T95 2
others[4] 94 1 T26 2 T36 2 T15 2
others[5] 110 1 T26 2 T36 2 T15 2
others[6] 70 1 T36 2 T92 2 T96 2
others[7] 122 1 T92 2 T117 4 T412 2
false 7956 1 T1 3 T2 2 T3 3
true 16940 1 T1 5 T2 5 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 102 1 T36 2 T15 2 T86 2
others[1] 112 1 T98 2 T117 4 T200 2
others[2] 106 1 T4 2 T94 4 T15 4
others[3] 90 1 T86 2 T121 2 T203 4
others[4] 102 1 T4 2 T26 2 T36 2
others[5] 74 1 T93 2 T413 2 T121 2
others[6] 90 1 T98 2 T15 2 T64 2
others[7] 140 1 T5 4 T37 2 T199 2
false 6895 1 T1 3 T2 1 T3 2
true 16702 1 T1 5 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T36 2 T37 2 T15 4
others[1] 102 1 T4 2 T90 2 T93 2
others[2] 114 1 T5 2 T96 2 T198 2
others[3] 90 1 T98 2 T15 2 T121 2
others[4] 92 1 T4 2 T15 2 T86 2
others[5] 90 1 T92 2 T15 2 T423 2
others[6] 62 1 T92 2 T15 4 T117 2
others[7] 78 1 T15 2 T86 2 T121 4
false 7440 1 T1 3 T2 1 T3 2
true 16723 1 T1 5 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 33 1 T7 1 T200 2 T16 1
others[1] 40 1 T109 1 T16 1 T231 1
others[2] 19 1 T9 1 T132 2 T133 1
others[3] 35 1 T8 1 T14 1 T231 1
others[4] 22 1 T159 1 T16 1 T131 1
others[5] 24 1 T91 2 T132 2 T253 1
others[6] 26 1 T9 2 T294 1 T132 2
others[7] 38 1 T8 1 T14 2 T132 1
false 11638 1 T1 3 T2 2 T3 3
true 19139 1 T1 5 T2 5 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 40 1 T202 2 T279 2 T424 2
others[1] 74 1 T92 2 T15 2 T86 4
others[2] 58 1 T198 2 T121 4 T415 2
others[3] 60 1 T117 2 T299 2 T279 2
others[4] 52 1 T15 4 T279 2 T414 2
others[5] 90 1 T117 2 T121 4 T279 2
others[6] 70 1 T86 4 T117 2 T203 2
others[7] 70 1 T5 2 T199 4 T121 2
false 9044 1 T1 3 T2 2 T3 3
true 16947 1 T1 5 T2 5 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 21 1 T16 1 T132 1 T260 2
others[1] 41 1 T14 1 T15 2 T131 1
others[2] 27 1 T14 1 T413 2 T231 1
others[3] 26 1 T9 2 T132 1 T253 1
others[4] 35 1 T9 1 T14 1 T159 1
others[5] 36 1 T8 2 T9 1 T14 1
others[6] 17 1 T9 1 T14 1 T133 1
others[7] 43 1 T8 1 T9 1 T14 1
false 11574 1 T1 3 T2 2 T3 3
true 19090 1 T1 5 T2 5 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 66 1 T26 2 T15 2 T203 2
others[1] 90 1 T37 2 T121 2 T203 6
others[2] 80 1 T37 2 T92 2 T93 2
others[3] 108 1 T36 2 T15 2 T95 2
others[4] 100 1 T36 2 T98 2 T200 4
others[5] 100 1 T15 4 T96 2 T279 2
others[6] 76 1 T5 2 T93 2 T15 2
others[7] 72 1 T86 2 T121 2 T414 2
false 7860 1 T1 3 T2 2 T3 3
true 16860 1 T1 5 T2 5 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 26 1 T9 2 T132 2 T249 1
others[1] 25 1 T8 1 T9 1 T133 1
others[2] 37 1 T14 1 T16 1 T231 1
others[3] 26 1 T9 1 T14 1 T159 1
others[4] 29 1 T159 1 T131 1 T231 1
others[5] 26 1 T8 1 T9 1 T133 1
others[6] 27 1 T9 1 T94 2 T412 2
others[7] 34 1 T96 2 T16 1 T131 1
false 11523 1 T1 3 T2 2 T3 3
true 19031 1 T1 5 T2 5 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 44 1 T15 2 T246 2 T262 2
others[1] 28 1 T204 2 T205 2 T425 2
others[2] 26 1 T37 2 T15 2 T373 2
others[3] 42 1 T417 2 T416 2 T236 2
others[4] 28 1 T15 2 T203 4 T418 2
others[5] 34 1 T26 2 T205 2 T259 2
others[6] 30 1 T93 2 T15 2 T205 2
others[7] 40 1 T37 2 T15 2 T117 2
false 10118 1 T1 3 T2 2 T3 3
true 16901 1 T1 5 T2 5 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T199 2 T117 2 T413 2
others[1] 90 1 T94 2 T15 4 T117 4
others[2] 108 1 T4 2 T93 2 T86 2
others[3] 90 1 T15 2 T117 6 T413 2
others[4] 118 1 T96 2 T117 2 T55 2
others[5] 106 1 T5 4 T91 2 T92 2
others[6] 82 1 T4 2 T37 2 T15 6
others[7] 96 1 T15 4 T95 2 T64 2
false 7081 1 T1 3 T2 1 T3 2
true 16696 1 T1 5 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T4 2 T91 2 T96 2
others[1] 106 1 T15 4 T117 2 T121 2
others[2] 94 1 T5 2 T15 4 T117 4
others[3] 84 1 T4 2 T26 2 T91 2
others[4] 100 1 T5 2 T26 2 T36 2
others[5] 70 1 T15 2 T202 2 T203 2
others[6] 108 1 T92 2 T96 2 T117 2
others[7] 106 1 T36 2 T15 4 T299 2
false 7081 1 T1 3 T2 1 T3 2
true 16696 1 T1 5 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T4 4 T26 2 T98 2
others[1] 94 1 T91 2 T15 4 T117 2
others[2] 96 1 T6 2 T94 2 T15 2
others[3] 86 1 T4 2 T37 2 T90 2
others[4] 98 1 T26 2 T93 2 T94 2
others[5] 92 1 T36 2 T37 2 T15 2
others[6] 104 1 T4 2 T94 2 T15 2
others[7] 116 1 T94 4 T95 2 T198 2
false 6382 1 T1 3 T2 1 T3 2
true 16678 1 T1 5 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 106 1 T125 2 T91 2 T94 2
others[1] 112 1 T15 2 T121 6 T203 2
others[2] 88 1 T5 2 T117 2 T413 2
others[3] 82 1 T4 4 T94 2 T117 4
others[4] 100 1 T4 2 T92 2 T15 4
others[5] 80 1 T92 2 T412 2 T121 2
others[6] 102 1 T4 2 T5 2 T36 2
others[7] 86 1 T94 2 T15 6 T86 2
false 6382 1 T1 3 T2 1 T3 2
true 16678 1 T1 5 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 46 1 T202 2 T263 2 T137 2
others[1] 70 1 T36 2 T91 4 T117 2
others[2] 76 1 T4 2 T94 2 T413 2
others[3] 54 1 T98 2 T15 2 T200 2
others[4] 60 1 T4 2 T96 2 T299 2
others[5] 62 1 T4 2 T36 2 T86 4
others[6] 66 1 T15 2 T64 2 T203 2
others[7] 70 1 T4 2 T36 2 T37 2
false 6914 1 T1 2 T2 1 T3 1
true 18121 1 T1 6 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 64 1 T200 2 T202 2 T418 2
others[1] 46 1 T15 2 T203 2 T204 2
others[2] 78 1 T4 2 T91 2 T117 2
others[3] 50 1 T6 2 T117 2 T121 2
others[4] 48 1 T15 4 T121 2 T203 4
others[5] 88 1 T37 2 T15 4 T96 2
others[6] 70 1 T94 2 T15 2 T86 2
others[7] 76 1 T37 4 T117 4 T413 4
false 6914 1 T1 2 T2 1 T3 1
true 18121 1 T1 6 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 31 1 T159 1 T132 2 T231 1
others[1] 26 1 T14 1 T94 2 T15 2
others[2] 34 1 T4 2 T15 2 T201 2
others[3] 27 1 T14 1 T132 1 T231 1
others[4] 34 1 T9 3 T133 1 T422 1
others[5] 23 1 T132 1 T420 1 T421 1
others[6] 38 1 T9 1 T412 2 T16 2
others[7] 36 1 T8 1 T9 1 T109 1
false 11783 1 T1 3 T2 2 T3 3
true 19206 1 T1 5 T2 5 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T95 2 T117 6 T55 2
others[1] 80 1 T117 2 T412 2 T203 2
others[2] 84 1 T198 2 T121 2 T55 2
others[3] 90 1 T5 2 T15 2 T201 2
others[4] 100 1 T36 4 T203 4 T279 2
others[5] 104 1 T37 2 T15 2 T86 2
others[6] 122 1 T5 4 T86 4 T117 4
others[7] 104 1 T86 2 T200 2 T121 4
false 7853 1 T1 3 T2 2 T3 3
true 16906 1 T1 5 T2 5 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 29 1 T414 2 T133 1 T367 1
others[1] 27 1 T7 1 T9 1 T16 2
others[2] 23 1 T14 1 T109 1 T16 1
others[3] 32 1 T8 1 T9 1 T14 1
others[4] 33 1 T9 1 T14 1 T294 1
others[5] 23 1 T132 1 T133 1 T367 1
others[6] 33 1 T159 1 T200 2 T132 3
others[7] 37 1 T8 1 T91 2 T231 2
false 14432 1 T1 4 T2 4 T3 4
true 2330 1 T4 4 T5 3 T97 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%