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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13637 1 T1 3 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13637 1 T1 3 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 9761 1 T1 1 T2 1 T3 3
true 15985 1 T1 3 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10638 1 T1 1 T2 1 T3 3
true 16042 1 T1 3 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T13 4 T76 6 T97 4
others[1] 86 1 T76 2 T96 2 T387 2
others[2] 76 1 T70 2 T76 2 T81 2
others[3] 92 1 T92 2 T76 2 T97 2
others[4] 76 1 T97 6 T98 2 T203 2
others[5] 84 1 T118 2 T76 2 T97 2
others[6] 78 1 T76 4 T388 2 T389 2
others[7] 110 1 T13 2 T190 2 T76 6
false 13637 1 T1 3 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T76 4 T121 2 T184 2
others[1] 112 1 T102 2 T92 4 T76 6
others[2] 82 1 T13 2 T92 2 T76 2
others[3] 72 1 T102 2 T76 8 T104 2
others[4] 82 1 T6 4 T76 2 T98 2
others[5] 76 1 T13 2 T76 2 T193 2
others[6] 86 1 T93 2 T94 2 T76 2
others[7] 98 1 T92 2 T94 2 T76 2
false 13637 1 T1 3 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 76 1 T76 2 T97 2 T99 2
others[1] 96 1 T103 2 T94 2 T76 2
others[2] 96 1 T6 2 T70 2 T92 2
others[3] 68 1 T18 2 T76 2 T97 2
others[4] 104 1 T94 2 T76 6 T390 2
others[5] 74 1 T6 2 T203 2 T227 2
others[6] 94 1 T70 2 T92 2 T94 2
others[7] 88 1 T227 2 T165 2 T166 6
false 13637 1 T1 3 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 72 1 T76 4 T231 4 T227 2
others[1] 40 1 T203 2 T230 2 T231 4
others[2] 68 1 T18 2 T97 2 T39 2
others[3] 62 1 T76 4 T391 4 T203 2
others[4] 58 1 T97 2 T98 2 T388 2
others[5] 52 1 T94 2 T184 2 T391 2
others[6] 60 1 T70 2 T97 2 T203 2
others[7] 66 1 T203 2 T231 4 T165 2
false 13637 1 T1 3 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 92 1 T76 2 T104 2 T98 4
others[1] 82 1 T76 2 T192 2 T230 2
others[2] 94 1 T97 4 T98 2 T191 2
others[3] 84 1 T76 2 T97 2 T98 2
others[4] 74 1 T70 2 T76 4 T97 2
others[5] 86 1 T97 2 T191 2 T192 2
others[6] 70 1 T92 2 T103 2 T104 2
others[7] 116 1 T102 2 T92 2 T120 2
false 13637 1 T1 3 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 28 1 T102 2 T392 2 T252 2
others[1] 20 1 T76 2 T166 2 T393 2
others[2] 30 1 T96 2 T104 2 T98 2
others[3] 30 1 T93 2 T76 4 T95 2
others[4] 36 1 T258 2 T394 4 T395 2
others[5] 48 1 T102 2 T76 2 T104 2
others[6] 30 1 T118 2 T98 2 T396 2
others[7] 42 1 T102 4 T93 2 T97 2
false 13637 1 T1 3 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T76 2 T97 2 T203 2
others[1] 98 1 T76 4 T97 2 T203 2
others[2] 48 1 T76 2 T99 2 T192 2
others[3] 96 1 T191 2 T81 2 T231 4
others[4] 96 1 T76 4 T96 2 T203 2
others[5] 86 1 T13 2 T96 2 T98 2
others[6] 82 1 T94 2 T95 2 T96 2
others[7] 106 1 T92 2 T94 2 T76 2
false 13637 1 T1 3 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T94 2 T76 6 T96 2
others[1] 100 1 T6 2 T70 4 T102 2
others[2] 86 1 T13 2 T18 2 T76 4
others[3] 90 1 T13 2 T93 2 T103 2
others[4] 110 1 T13 2 T76 4 T96 2
others[5] 84 1 T94 2 T98 2 T397 2
others[6] 90 1 T94 2 T76 4 T104 2
others[7] 92 1 T76 2 T98 2 T398 2
false 13637 1 T1 3 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 56 1 T97 4 T399 2 T395 2
others[1] 78 1 T93 2 T76 4 T97 4
others[2] 102 1 T6 2 T120 2 T94 2
others[3] 66 1 T76 2 T98 2 T203 2
others[4] 112 1 T70 2 T97 6 T98 2
others[5] 110 1 T13 2 T103 2 T76 2
others[6] 82 1 T6 4 T93 2 T76 2
others[7] 94 1 T13 2 T94 2 T76 2
false 13637 1 T1 3 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T13 2 T102 2 T76 4
others[1] 68 1 T13 2 T203 4 T400 2
others[2] 90 1 T18 2 T76 2 T97 2
others[3] 90 1 T103 2 T104 2 T97 4
others[4] 62 1 T98 2 T230 2 T166 4
others[5] 106 1 T76 2 T97 2 T192 2
others[6] 80 1 T102 2 T76 2 T98 2
others[7] 110 1 T102 2 T103 2 T76 2
false 13637 1 T1 3 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 92 1 T102 2 T76 2 T97 2
others[1] 68 1 T70 2 T118 2 T231 2
others[2] 70 1 T102 2 T92 2 T76 2
others[3] 120 1 T94 2 T98 2 T39 2
others[4] 76 1 T102 2 T76 4 T96 2
others[5] 74 1 T94 2 T96 2 T39 2
others[6] 118 1 T18 2 T102 2 T97 2
others[7] 100 1 T70 2 T98 4 T82 2
false 13637 1 T1 3 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 30 1 T7 2 T19 1 T56 1
others[1] 35 1 T56 1 T129 1 T130 2
others[2] 35 1 T19 1 T56 1 T279 1
others[3] 34 1 T281 1 T353 1 T162 1
others[4] 25 1 T7 1 T38 1 T129 1
others[5] 33 1 T38 1 T279 2 T162 1
others[6] 35 1 T19 1 T279 1 T365 2
others[7] 32 1 T7 3 T9 1 T38 2
false 13637 1 T1 3 T2 3 T3 5
true 2219 1 T3 1 T5 1 T6 2


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 56 1 T7 1 T9 1 T129 1
others[1] 39 1 T56 1 T283 1 T127 1
others[2] 33 1 T7 1 T129 1 T279 2
others[3] 30 1 T19 3 T38 2 T365 2
others[4] 30 1 T56 2 T38 2 T353 1
others[5] 33 1 T7 1 T162 1 T401 2
others[6] 26 1 T7 1 T279 1 T281 2
others[7] 14 1 T7 2 T22 1 T285 1
false 11112 1 T1 2 T2 2 T3 3
true 18248 1 T1 4 T2 4 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 74 1 T76 2 T203 2 T388 2
others[1] 88 1 T13 2 T92 2 T190 2
others[2] 98 1 T76 4 T97 4 T98 4
others[3] 80 1 T70 2 T76 6 T96 2
others[4] 66 1 T97 4 T98 2 T388 2
others[5] 98 1 T13 2 T118 2 T76 2
others[6] 62 1 T13 2 T76 2 T97 2
others[7] 132 1 T76 6 T97 4 T98 4
false 7607 1 T1 2 T2 2 T3 3
true 16110 1 T1 4 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 100 1 T92 2 T96 2 T104 2
others[1] 78 1 T102 2 T92 2 T76 4
others[2] 82 1 T6 2 T13 2 T76 6
others[3] 84 1 T97 2 T193 2 T397 2
others[4] 98 1 T6 2 T92 2 T93 2
others[5] 74 1 T92 2 T94 2 T76 6
others[6] 72 1 T13 2 T102 2 T76 4
others[7] 100 1 T76 2 T231 4 T166 2
false 6663 1 T1 1 T2 1 T3 3
true 15865 1 T1 3 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 72 1 T6 2 T390 2 T388 2
others[1] 78 1 T70 2 T94 6 T76 4
others[2] 96 1 T388 4 T231 2 T227 2
others[3] 92 1 T6 2 T92 2 T76 8
others[4] 72 1 T70 2 T92 2 T103 2
others[5] 88 1 T18 2 T93 2 T95 2
others[6] 92 1 T98 2 T39 2 T82 2
others[7] 106 1 T97 4 T203 2 T231 6
false 7176 1 T1 1 T2 1 T3 3
true 15905 1 T1 3 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 27 1 T13 2 T56 1 T38 1
others[1] 25 1 T7 1 T56 1 T224 2
others[2] 47 1 T8 1 T19 1 T38 1
others[3] 27 1 T98 2 T224 1 T283 1
others[4] 35 1 T6 2 T38 1 T76 2
others[5] 25 1 T283 1 T116 2 T284 3
others[6] 30 1 T19 1 T278 1 T353 1
others[7] 33 1 T8 1 T19 1 T279 1
false 11046 1 T1 2 T2 2 T3 3
true 18178 1 T1 4 T2 4 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 48 1 T98 2 T231 6 T165 2
others[1] 70 1 T97 2 T39 2 T203 2
others[2] 50 1 T76 2 T97 2 T203 2
others[3] 66 1 T76 2 T391 2 T227 2
others[4] 68 1 T76 2 T97 2 T391 2
others[5] 44 1 T70 2 T191 2 T193 2
others[6] 52 1 T18 2 T76 2 T391 2
others[7] 80 1 T94 2 T388 2 T231 2
false 8644 1 T1 2 T2 2 T3 3
true 16094 1 T1 4 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 25 1 T7 1 T279 1 T252 2
others[1] 31 1 T13 2 T7 3 T19 1
others[2] 36 1 T7 1 T162 1 T169 2
others[3] 29 1 T7 1 T281 1 T225 1
others[4] 33 1 T7 2 T38 1 T279 1
others[5] 34 1 T7 1 T38 1 T220 2
others[6] 31 1 T19 2 T38 1 T129 1
others[7] 29 1 T19 1 T130 2 T116 1
false 10992 1 T1 2 T2 2 T3 3
true 18140 1 T1 4 T2 4 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T76 4 T81 2 T203 2
others[1] 106 1 T70 2 T104 2 T97 2
others[2] 92 1 T97 4 T121 2 T191 2
others[3] 100 1 T97 2 T98 2 T192 4
others[4] 66 1 T103 2 T76 2 T97 2
others[5] 76 1 T121 2 T191 2 T391 4
others[6] 74 1 T92 4 T76 2 T98 4
others[7] 102 1 T102 2 T120 2 T76 2
false 7508 1 T1 2 T2 2 T3 3
true 16030 1 T1 4 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 23 1 T8 1 T19 1 T56 1
others[1] 22 1 T38 2 T127 1 T284 1
others[2] 37 1 T18 2 T8 1 T19 1
others[3] 38 1 T7 2 T19 3 T224 2
others[4] 36 1 T38 1 T21 1 T279 1
others[5] 23 1 T8 1 T279 1 T231 2
others[6] 42 1 T7 1 T8 1 T19 2
others[7] 40 1 T7 2 T38 2 T225 1
false 10950 1 T1 2 T2 2 T3 3
true 18113 1 T1 4 T2 4 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 16 1 T220 2 T394 2 T402 2
others[1] 30 1 T102 2 T76 2 T97 2
others[2] 44 1 T102 2 T93 2 T104 2
others[3] 32 1 T96 2 T98 2 T399 2
others[4] 32 1 T102 2 T76 4 T252 2
others[5] 48 1 T102 2 T81 2 T227 2
others[6] 24 1 T95 2 T403 2 T404 2
others[7] 38 1 T93 2 T118 2 T76 2
false 9665 1 T1 2 T2 2 T3 3
true 16076 1 T1 4 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T76 2 T96 2 T97 2
others[1] 96 1 T92 2 T94 2 T76 2
others[2] 94 1 T13 2 T76 8 T95 2
others[3] 70 1 T203 2 T231 2 T405 2
others[4] 86 1 T94 2 T191 2 T203 2
others[5] 106 1 T76 2 T97 2 T99 2
others[6] 72 1 T99 2 T81 2 T396 2
others[7] 86 1 T96 2 T388 2 T231 2
false 6799 1 T1 1 T2 1 T3 3
true 15872 1 T1 3 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 112 1 T76 4 T96 2 T97 6
others[1] 104 1 T70 2 T102 2 T76 6
others[2] 80 1 T13 2 T103 2 T76 2
others[3] 92 1 T70 2 T76 2 T104 2
others[4] 90 1 T93 2 T96 2 T97 2
others[5] 74 1 T6 2 T76 4 T104 2
others[6] 92 1 T18 2 T76 2 T397 2
others[7] 96 1 T13 4 T94 6 T76 6
false 6799 1 T1 1 T2 1 T3 3
true 15872 1 T1 3 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T13 2 T94 2 T76 2
others[1] 62 1 T93 2 T66 2 T231 2
others[2] 84 1 T94 2 T97 4 T258 2
others[3] 86 1 T103 2 T76 4 T104 2
others[4] 108 1 T70 2 T76 2 T97 2
others[5] 90 1 T6 2 T13 2 T97 4
others[6] 86 1 T6 2 T93 2 T120 2
others[7] 100 1 T6 2 T98 2 T192 2
false 6241 1 T1 1 T2 1 T3 2
true 15873 1 T1 3 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 102 1 T76 4 T97 2 T98 2
others[1] 98 1 T13 2 T104 2 T98 2
others[2] 68 1 T102 4 T97 4 T98 2
others[3] 68 1 T76 4 T98 4 T203 2
others[4] 92 1 T97 2 T203 4 T405 2
others[5] 70 1 T13 2 T102 2 T76 2
others[6] 84 1 T18 2 T97 2 T230 2
others[7] 118 1 T103 4 T76 2 T121 2
false 6241 1 T1 1 T2 1 T3 2
true 15873 1 T1 3 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 64 1 T98 4 T99 2 T220 2
others[1] 80 1 T76 2 T97 2 T82 2
others[2] 78 1 T6 2 T92 2 T76 2
others[3] 60 1 T231 2 T228 2 T406 2
others[4] 60 1 T94 2 T97 2 T391 2
others[5] 62 1 T92 2 T76 2 T98 4
others[6] 64 1 T94 2 T76 4 T98 2
others[7] 78 1 T203 4 T388 2 T230 2
false 6706 1 T1 1 T2 1 T3 2
true 17185 1 T1 3 T2 3 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 66 1 T76 2 T81 2 T165 2
others[1] 52 1 T13 4 T94 2 T98 2
others[2] 54 1 T76 2 T96 4 T193 2
others[3] 54 1 T6 2 T13 2 T99 2
others[4] 82 1 T94 4 T76 2 T389 4
others[5] 58 1 T6 2 T76 4 T192 4
others[6] 70 1 T18 2 T76 2 T121 2
others[7] 76 1 T76 4 T405 2 T166 2
false 6706 1 T1 1 T2 1 T3 2
true 17185 1 T1 3 T2 3 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 44 1 T9 1 T224 3 T225 1
others[1] 27 1 T7 1 T283 1 T127 1
others[2] 27 1 T19 1 T21 1 T224 1
others[3] 29 1 T8 1 T19 1 T56 3
others[4] 33 1 T7 1 T19 2 T38 1
others[5] 37 1 T19 1 T56 1 T21 1
others[6] 36 1 T19 1 T98 2 T99 2
others[7] 52 1 T7 1 T278 1 T279 1
false 11200 1 T1 2 T2 2 T3 3
true 18301 1 T1 4 T2 4 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 108 1 T102 2 T76 2 T97 2
others[1] 80 1 T70 2 T102 2 T118 2
others[2] 104 1 T70 2 T102 2 T96 2
others[3] 80 1 T18 2 T92 2 T76 4
others[4] 68 1 T102 2 T166 2 T395 2
others[5] 90 1 T97 2 T39 2 T397 2
others[6] 86 1 T94 2 T96 2 T39 2
others[7] 102 1 T76 2 T98 4 T407 2
false 7529 1 T1 2 T2 1 T3 3
true 16075 1 T1 4 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 25 1 T13 2 T8 1 T225 1
others[1] 32 1 T7 1 T76 2 T278 1
others[2] 24 1 T8 1 T56 1 T38 1
others[3] 32 1 T19 1 T56 1 T98 2
others[4] 30 1 T278 1 T224 1 T283 1
others[5] 34 1 T19 1 T38 1 T281 1
others[6] 30 1 T6 2 T19 1 T38 1
others[7] 42 1 T129 1 T279 1 T353 1
false 13637 1 T1 3 T2 3 T3 5
true 2205 1 T3 1 T5 1 T6 2

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%