SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
84.44 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 18 | 1 | 17 | 94.44 |
Crosses | 72 | 13 | 59 | 81.94 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
err_code_vals | 7 | 1 | 6 | 85.71 | 100 | 1 | 1 | 0 | |
partition | 11 | 0 | 11 | 100.00 | 100 | 1 | 1 | 0 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
dai_err_code_for_all_partitions | 72 | 13 | 59 | 81.94 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 7 | 1 | 6 | 85.71 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
macro_err | 0 | 1 | 1 |
NAME | COUNT | STATUS |
illegal_err | 0 | Illegal |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
fsm_err | 47723 | 1 | T10 | 80 | T7 | 134 | T71 | 2 | ||||
access_err | 62990 | 1 | T3 | 10 | T5 | 22 | T6 | 19 | ||||
write_blank_err | 383 | 1 | T14 | 2 | T15 | 5 | T16 | 1 | ||||
ecc_uncorr_err | 59016 | 1 | T106 | 51 | T14 | 679 | T151 | 358 | ||||
ecc_corr_err | 1588 | 1 | T70 | 33 | T106 | 10 | T14 | 3 | ||||
no_err | 91906 | 1 | T3 | 63 | T10 | 11 | T4 | 106 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 11 | 0 | 11 | 100.00 |
NAME | COUNT | STATUS |
illegal_idx | 0 | Excluded |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
life_cycle | 612 | 1 | T14 | 5 | T15 | 11 | T16 | 15 | ||||
secret2 | 25322 | 1 | T3 | 3 | T10 | 3 | T4 | 9 | ||||
secret1 | 27205 | 1 | T3 | 12 | T4 | 10 | T5 | 3 | ||||
secret0 | 33674 | 1 | T3 | 5 | T4 | 17 | T5 | 6 | ||||
hw_cfg1 | 35069 | 1 | T3 | 4 | T10 | 1 | T4 | 9 | ||||
hw_cfg0 | 23647 | 1 | T3 | 18 | T10 | 1 | T4 | 6 | ||||
rot_creator_auth_state | 20081 | 1 | T3 | 2 | T10 | 3 | T4 | 15 | ||||
rot_creator_auth_codesign | 23545 | 1 | T3 | 13 | T10 | 1 | T4 | 14 | ||||
owner_sw_cfg | 21086 | 1 | T3 | 7 | T10 | 2 | T4 | 7 | ||||
creator_sw_cfg | 22354 | 1 | T3 | 7 | T4 | 5 | T5 | 5 | ||||
vendor_test | 31011 | 1 | T3 | 2 | T10 | 80 | T4 | 14 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL | 72 | 13 | 59 | 81.94 | 13 |
Automatically Generated Cross Bins | 72 | 13 | 59 | 81.94 | 13 |
User Defined Cross Bins | 0 | 0 | 0 |
err_code_vals | partition | COUNT | AT LEAST | NUMBER | STATUS |
[fsm_err] | [life_cycle] | 0 | 1 | 1 | |
[ecc_corr_err] | [vendor_test] | 0 | 1 | 1 | |
[macro_err] | [secret2 , secret1 , secret0 , hw_cfg1 , hw_cfg0 , rot_creator_auth_state , rot_creator_auth_codesign , owner_sw_cfg , creator_sw_cfg , vendor_test] | -- | -- | 10 | |
[no_err] | [life_cycle] | 0 | 1 | 1 |
err_code_vals | partition | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
fsm_err | secret2 | 4624 | 1 | T7 | 85 | T56 | 402 | T97 | 72 | ||||
fsm_err | secret1 | 3618 | 1 | T357 | 139 | T140 | 310 | T358 | 22 | ||||
fsm_err | secret0 | 4924 | 1 | T203 | 193 | T136 | 14 | T359 | 513 | ||||
fsm_err | hw_cfg1 | 2142 | 1 | T7 | 49 | T8 | 48 | T278 | 175 | ||||
fsm_err | hw_cfg0 | 4832 | 1 | T71 | 2 | T88 | 3 | T360 | 87 | ||||
fsm_err | rot_creator_auth_state | 2311 | 1 | T106 | 4 | T98 | 59 | T160 | 13 | ||||
fsm_err | rot_creator_auth_codesign | 5429 | 1 | T21 | 93 | T280 | 240 | T245 | 536 | ||||
fsm_err | owner_sw_cfg | 2807 | 1 | T97 | 61 | T261 | 520 | T184 | 2 | ||||
fsm_err | creator_sw_cfg | 3458 | 1 | T361 | 51 | T198 | 56 | T148 | 43 | ||||
fsm_err | vendor_test | 13578 | 1 | T10 | 80 | T70 | 172 | T151 | 60 | ||||
access_err | life_cycle | 612 | 1 | T14 | 5 | T15 | 11 | T16 | 15 | ||||
access_err | secret2 | 11024 | 1 | T5 | 11 | T6 | 10 | T13 | 9 | ||||
access_err | secret1 | 5809 | 1 | T13 | 9 | T18 | 7 | T70 | 5 | ||||
access_err | secret0 | 4533 | 1 | T3 | 2 | T6 | 2 | T13 | 6 | ||||
access_err | hw_cfg1 | 1273 | 1 | T5 | 1 | T6 | 6 | T13 | 3 | ||||
access_err | hw_cfg0 | 2197 | 1 | T13 | 2 | T18 | 5 | T70 | 6 | ||||
access_err | rot_creator_auth_state | 6100 | 1 | T5 | 2 | T7 | 31 | T71 | 6 | ||||
access_err | rot_creator_auth_codesign | 8150 | 1 | T3 | 6 | T5 | 4 | T13 | 4 | ||||
access_err | owner_sw_cfg | 7363 | 1 | T3 | 2 | T5 | 2 | T6 | 1 | ||||
access_err | creator_sw_cfg | 8228 | 1 | T5 | 2 | T7 | 26 | T71 | 4 | ||||
access_err | vendor_test | 7701 | 1 | T7 | 23 | T18 | 23 | T70 | 4 | ||||
write_blank_err | secret2 | 12 | 1 | T226 | 1 | T362 | 1 | T127 | 1 | ||||
write_blank_err | secret1 | 19 | 1 | T98 | 1 | T127 | 1 | T228 | 1 | ||||
write_blank_err | secret0 | 39 | 1 | T15 | 1 | T21 | 1 | T98 | 2 | ||||
write_blank_err | hw_cfg1 | 61 | 1 | T14 | 2 | T38 | 1 | T129 | 1 | ||||
write_blank_err | hw_cfg0 | 16 | 1 | T129 | 1 | T98 | 2 | T278 | 1 | ||||
write_blank_err | rot_creator_auth_state | 126 | 1 | T15 | 2 | T16 | 1 | T129 | 2 | ||||
write_blank_err | rot_creator_auth_codesign | 51 | 1 | T224 | 1 | T228 | 1 | T363 | 1 | ||||
write_blank_err | owner_sw_cfg | 18 | 1 | T129 | 1 | T159 | 3 | T364 | 1 | ||||
write_blank_err | creator_sw_cfg | 8 | 1 | T159 | 1 | T282 | 1 | T244 | 1 | ||||
write_blank_err | vendor_test | 33 | 1 | T15 | 2 | T98 | 1 | T282 | 1 | ||||
ecc_uncorr_err | secret2 | 4259 | 1 | T161 | 22 | T226 | 37 | T362 | 300 | ||||
ecc_uncorr_err | secret1 | 8483 | 1 | T153 | 15 | T98 | 576 | T365 | 5 | ||||
ecc_uncorr_err | secret0 | 15221 | 1 | T106 | 2 | T15 | 421 | T21 | 139 | ||||
ecc_uncorr_err | hw_cfg1 | 20391 | 1 | T106 | 9 | T14 | 679 | T151 | 62 | ||||
ecc_uncorr_err | hw_cfg0 | 3761 | 1 | T151 | 115 | T278 | 283 | T160 | 12 | ||||
ecc_uncorr_err | rot_creator_auth_state | 2983 | 1 | T16 | 185 | T161 | 14 | T22 | 206 | ||||
ecc_uncorr_err | rot_creator_auth_codesign | 812 | 1 | T106 | 25 | T151 | 61 | T265 | 42 | ||||
ecc_uncorr_err | owner_sw_cfg | 1370 | 1 | T106 | 7 | T151 | 63 | T365 | 3 | ||||
ecc_uncorr_err | creator_sw_cfg | 1736 | 1 | T106 | 8 | T151 | 57 | T153 | 17 | ||||
ecc_corr_err | secret2 | 82 | 1 | T70 | 1 | T99 | 1 | T39 | 1 | ||||
ecc_corr_err | secret1 | 139 | 1 | T70 | 3 | T151 | 1 | T99 | 1 | ||||
ecc_corr_err | secret0 | 153 | 1 | T70 | 3 | T151 | 2 | T99 | 5 | ||||
ecc_corr_err | hw_cfg1 | 271 | 1 | T70 | 1 | T106 | 3 | T14 | 3 | ||||
ecc_corr_err | hw_cfg0 | 303 | 1 | T70 | 14 | T129 | 1 | T98 | 4 | ||||
ecc_corr_err | rot_creator_auth_state | 141 | 1 | T70 | 4 | T106 | 2 | T99 | 3 | ||||
ecc_corr_err | rot_creator_auth_codesign | 188 | 1 | T70 | 5 | T106 | 1 | T99 | 11 | ||||
ecc_corr_err | owner_sw_cfg | 159 | 1 | T106 | 4 | T99 | 9 | T39 | 8 | ||||
ecc_corr_err | creator_sw_cfg | 152 | 1 | T70 | 2 | T99 | 4 | T159 | 2 | ||||
no_err | secret2 | 5321 | 1 | T3 | 3 | T10 | 3 | T4 | 9 | ||||
no_err | secret1 | 9137 | 1 | T3 | 12 | T4 | 10 | T5 | 3 | ||||
no_err | secret0 | 8804 | 1 | T3 | 3 | T4 | 17 | T5 | 6 | ||||
no_err | hw_cfg1 | 10931 | 1 | T3 | 4 | T10 | 1 | T4 | 9 | ||||
no_err | hw_cfg0 | 12538 | 1 | T3 | 18 | T10 | 1 | T4 | 6 | ||||
no_err | rot_creator_auth_state | 8420 | 1 | T3 | 2 | T10 | 3 | T4 | 15 | ||||
no_err | rot_creator_auth_codesign | 8915 | 1 | T3 | 7 | T10 | 1 | T4 | 14 | ||||
no_err | owner_sw_cfg | 9369 | 1 | T3 | 5 | T10 | 2 | T4 | 7 | ||||
no_err | creator_sw_cfg | 8772 | 1 | T3 | 7 | T4 | 5 | T5 | 3 | ||||
no_err | vendor_test | 9699 | 1 | T3 | 2 | T4 | 14 | T5 | 2 |
NAME | COUNT | STATUS |
vendor_test_ecc_uncorrectable_err | 0 | Illegal |
life_cycle_ignore | 0 | Excluded |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |