SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
84.44 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 18 | 1 | 17 | 94.44 |
Crosses | 72 | 13 | 59 | 81.94 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
err_code_vals | 7 | 1 | 6 | 85.71 | 100 | 1 | 1 | 0 | |
partition | 11 | 0 | 11 | 100.00 | 100 | 1 | 1 | 0 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
dai_err_code_for_all_partitions | 72 | 13 | 59 | 81.94 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 7 | 1 | 6 | 85.71 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
macro_err | 0 | 1 | 1 |
NAME | COUNT | STATUS |
illegal_err | 0 | Illegal |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
fsm_err | 55600 | 1 | T7 | 150 | T5 | 113 | T9 | 425 | ||||
access_err | 57698 | 1 | T4 | 131 | T13 | 1 | T28 | 1 | ||||
write_blank_err | 341 | 1 | T8 | 10 | T9 | 1 | T10 | 1 | ||||
ecc_uncorr_err | 61486 | 1 | T8 | 462 | T9 | 159 | T10 | 120 | ||||
ecc_corr_err | 1636 | 1 | T26 | 3 | T46 | 4 | T110 | 2 | ||||
no_err | 86879 | 1 | T3 | 24 | T4 | 134 | T5 | 3 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 11 | 0 | 11 | 100.00 |
NAME | COUNT | STATUS |
illegal_idx | 0 | Excluded |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
life_cycle | 555 | 1 | T8 | 10 | T9 | 4 | T10 | 4 | ||||
secret2 | 21114 | 1 | T3 | 1 | T4 | 30 | T13 | 1 | ||||
secret1 | 25309 | 1 | T4 | 8 | T28 | 2 | T8 | 3 | ||||
secret0 | 43141 | 1 | T3 | 2 | T4 | 31 | T13 | 1 | ||||
hw_cfg1 | 34543 | 1 | T3 | 4 | T4 | 29 | T13 | 2 | ||||
hw_cfg0 | 25244 | 1 | T3 | 2 | T4 | 13 | T5 | 1 | ||||
rot_creator_auth_state | 21725 | 1 | T3 | 3 | T4 | 30 | T5 | 113 | ||||
rot_creator_auth_codesign | 21216 | 1 | T3 | 2 | T4 | 38 | T8 | 476 | ||||
owner_sw_cfg | 19622 | 1 | T3 | 2 | T7 | 150 | T4 | 38 | ||||
creator_sw_cfg | 19810 | 1 | T3 | 6 | T4 | 21 | T5 | 2 | ||||
vendor_test | 31361 | 1 | T3 | 2 | T4 | 27 | T8 | 8 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL | 72 | 13 | 59 | 81.94 | 13 |
Automatically Generated Cross Bins | 72 | 13 | 59 | 81.94 | 13 |
User Defined Cross Bins | 0 | 0 | 0 |
err_code_vals | partition | COUNT | AT LEAST | NUMBER | STATUS |
[fsm_err] | [life_cycle] | 0 | 1 | 1 | |
[ecc_corr_err] | [vendor_test] | 0 | 1 | 1 | |
[macro_err] | [secret2 , secret1 , secret0 , hw_cfg1 , hw_cfg0 , rot_creator_auth_state , rot_creator_auth_codesign , owner_sw_cfg , creator_sw_cfg , vendor_test] | -- | -- | 10 | |
[no_err] | [life_cycle] | 0 | 1 | 1 |
err_code_vals | partition | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
fsm_err | secret2 | 2364 | 1 | T161 | 3 | T174 | 134 | T265 | 167 | ||||
fsm_err | secret1 | 6340 | 1 | T157 | 484 | T268 | 43 | T348 | 34 | ||||
fsm_err | secret0 | 7879 | 1 | T9 | 425 | T262 | 221 | T162 | 345 | ||||
fsm_err | hw_cfg1 | 4608 | 1 | T116 | 520 | T10 | 161 | T349 | 528 | ||||
fsm_err | hw_cfg0 | 6441 | 1 | T160 | 155 | T267 | 386 | T255 | 147 | ||||
fsm_err | rot_creator_auth_state | 3737 | 1 | T5 | 113 | T10 | 128 | T17 | 193 | ||||
fsm_err | rot_creator_auth_codesign | 3153 | 1 | T10 | 118 | T174 | 69 | T147 | 74 | ||||
fsm_err | owner_sw_cfg | 3271 | 1 | T7 | 150 | T350 | 30 | T174 | 48 | ||||
fsm_err | creator_sw_cfg | 3006 | 1 | T174 | 68 | T252 | 320 | T351 | 301 | ||||
fsm_err | vendor_test | 14801 | 1 | T26 | 29 | T71 | 18 | T118 | 96 | ||||
access_err | life_cycle | 555 | 1 | T8 | 10 | T9 | 4 | T10 | 4 | ||||
access_err | secret2 | 9922 | 1 | T4 | 29 | T28 | 1 | T8 | 2 | ||||
access_err | secret1 | 5933 | 1 | T4 | 4 | T26 | 3 | T27 | 96 | ||||
access_err | secret0 | 4578 | 1 | T4 | 31 | T9 | 1 | T10 | 2 | ||||
access_err | hw_cfg1 | 1195 | 1 | T4 | 5 | T9 | 3 | T26 | 1 | ||||
access_err | hw_cfg0 | 2178 | 1 | T4 | 9 | T14 | 2 | T40 | 7 | ||||
access_err | rot_creator_auth_state | 5546 | 1 | T13 | 1 | T9 | 8 | T116 | 1 | ||||
access_err | rot_creator_auth_codesign | 7363 | 1 | T4 | 14 | T9 | 9 | T116 | 4 | ||||
access_err | owner_sw_cfg | 6357 | 1 | T4 | 20 | T8 | 1 | T9 | 22 | ||||
access_err | creator_sw_cfg | 7113 | 1 | T4 | 13 | T9 | 19 | T26 | 1 | ||||
access_err | vendor_test | 6958 | 1 | T4 | 6 | T8 | 3 | T9 | 3 | ||||
write_blank_err | secret2 | 12 | 1 | T16 | 1 | T17 | 1 | T286 | 1 | ||||
write_blank_err | secret1 | 13 | 1 | T155 | 1 | T18 | 1 | T352 | 1 | ||||
write_blank_err | secret0 | 49 | 1 | T14 | 1 | T179 | 1 | T16 | 1 | ||||
write_blank_err | hw_cfg1 | 56 | 1 | T14 | 1 | T177 | 1 | T353 | 1 | ||||
write_blank_err | hw_cfg0 | 14 | 1 | T346 | 1 | T144 | 2 | T256 | 1 | ||||
write_blank_err | rot_creator_auth_state | 92 | 1 | T10 | 1 | T180 | 1 | T286 | 1 | ||||
write_blank_err | rot_creator_auth_codesign | 36 | 1 | T8 | 10 | T38 | 1 | T139 | 2 | ||||
write_blank_err | owner_sw_cfg | 25 | 1 | T106 | 1 | T155 | 1 | T352 | 1 | ||||
write_blank_err | creator_sw_cfg | 14 | 1 | T9 | 1 | T354 | 1 | T154 | 1 | ||||
write_blank_err | vendor_test | 30 | 1 | T16 | 3 | T155 | 1 | T337 | 1 | ||||
ecc_uncorr_err | secret2 | 3415 | 1 | T178 | 10 | T16 | 285 | T17 | 69 | ||||
ecc_uncorr_err | secret1 | 4403 | 1 | T174 | 60 | T355 | 10 | T356 | 73 | ||||
ecc_uncorr_err | secret0 | 22370 | 1 | T14 | 225 | T179 | 186 | T16 | 332 | ||||
ecc_uncorr_err | hw_cfg1 | 18176 | 1 | T14 | 313 | T177 | 506 | T178 | 23 | ||||
ecc_uncorr_err | hw_cfg0 | 5000 | 1 | T185 | 59 | T355 | 23 | T175 | 6 | ||||
ecc_uncorr_err | rot_creator_auth_state | 4027 | 1 | T10 | 120 | T180 | 601 | T355 | 25 | ||||
ecc_uncorr_err | rot_creator_auth_codesign | 1787 | 1 | T8 | 462 | T174 | 69 | T38 | 385 | ||||
ecc_uncorr_err | owner_sw_cfg | 1036 | 1 | T355 | 22 | T175 | 6 | T189 | 64 | ||||
ecc_uncorr_err | creator_sw_cfg | 1272 | 1 | T9 | 159 | T224 | 29 | T185 | 53 | ||||
ecc_corr_err | secret2 | 98 | 1 | T46 | 2 | T178 | 3 | T67 | 1 | ||||
ecc_corr_err | secret1 | 122 | 1 | T67 | 2 | T174 | 3 | T87 | 1 | ||||
ecc_corr_err | secret0 | 177 | 1 | T110 | 1 | T174 | 4 | T76 | 4 | ||||
ecc_corr_err | hw_cfg1 | 306 | 1 | T26 | 1 | T67 | 3 | T174 | 2 | ||||
ecc_corr_err | hw_cfg0 | 304 | 1 | T46 | 1 | T110 | 1 | T67 | 11 | ||||
ecc_corr_err | rot_creator_auth_state | 130 | 1 | T26 | 2 | T67 | 2 | T174 | 1 | ||||
ecc_corr_err | rot_creator_auth_codesign | 184 | 1 | T67 | 14 | T174 | 1 | T185 | 3 | ||||
ecc_corr_err | owner_sw_cfg | 141 | 1 | T67 | 8 | T174 | 1 | T185 | 1 | ||||
ecc_corr_err | creator_sw_cfg | 174 | 1 | T46 | 1 | T67 | 12 | T76 | 10 | ||||
no_err | secret2 | 5303 | 1 | T3 | 1 | T4 | 1 | T13 | 1 | ||||
no_err | secret1 | 8498 | 1 | T4 | 4 | T28 | 2 | T8 | 3 | ||||
no_err | secret0 | 8088 | 1 | T3 | 2 | T13 | 1 | T8 | 14 | ||||
no_err | hw_cfg1 | 10202 | 1 | T3 | 4 | T4 | 24 | T13 | 2 | ||||
no_err | hw_cfg0 | 11307 | 1 | T3 | 2 | T4 | 4 | T5 | 1 | ||||
no_err | rot_creator_auth_state | 8193 | 1 | T3 | 3 | T4 | 30 | T8 | 3 | ||||
no_err | rot_creator_auth_codesign | 8693 | 1 | T3 | 2 | T4 | 24 | T8 | 4 | ||||
no_err | owner_sw_cfg | 8792 | 1 | T3 | 2 | T4 | 18 | T13 | 3 | ||||
no_err | creator_sw_cfg | 8231 | 1 | T3 | 6 | T4 | 8 | T5 | 2 | ||||
no_err | vendor_test | 9572 | 1 | T3 | 2 | T4 | 21 | T8 | 5 |
NAME | COUNT | STATUS |
vendor_test_ecc_uncorrectable_err | 0 | Illegal |
life_cycle_ignore | 0 | Excluded |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |