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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13644 1 T1 4 T2 12 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13644 1 T1 4 T2 12 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 9803 1 T1 1 T2 6 T3 1
true 16065 1 T1 4 T2 16 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10632 1 T1 1 T2 6 T3 1
true 16122 1 T1 4 T2 16 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 68 1 T17 2 T15 2 T96 2
others[1] 100 1 T330 2 T368 2 T298 2
others[2] 98 1 T96 2 T126 4 T369 2
others[3] 84 1 T17 2 T15 4 T370 2
others[4] 84 1 T15 2 T370 2 T268 2
others[5] 80 1 T5 2 T15 2 T81 2
others[6] 68 1 T106 2 T99 2 T32 2
others[7] 88 1 T102 2 T371 2 T372 2
false 13644 1 T1 4 T2 12 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 90 1 T97 2 T103 2 T370 2
others[1] 84 1 T98 2 T330 2 T373 2
others[2] 80 1 T15 2 T102 2 T48 2
others[3] 90 1 T15 2 T81 2 T117 2
others[4] 76 1 T126 4 T374 2 T178 2
others[5] 78 1 T106 2 T375 2 T268 2
others[6] 58 1 T374 2 T178 2 T117 2
others[7] 92 1 T5 2 T15 2 T99 4
false 13644 1 T1 4 T2 12 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T15 2 T81 2 T94 2
others[1] 80 1 T176 2 T375 2 T94 2
others[2] 58 1 T103 2 T94 2 T370 2
others[3] 78 1 T99 2 T102 2 T375 2
others[4] 90 1 T17 2 T96 2 T99 2
others[5] 50 1 T5 2 T370 2 T259 2
others[6] 84 1 T98 2 T99 2 T101 2
others[7] 90 1 T97 2 T369 2 T231 2
false 13644 1 T1 4 T2 12 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 44 1 T99 2 T117 2 T156 2
others[1] 64 1 T99 2 T259 2 T126 2
others[2] 60 1 T15 2 T126 2 T374 2
others[3] 58 1 T109 2 T94 2 T376 2
others[4] 44 1 T96 2 T101 2 T94 2
others[5] 74 1 T4 2 T5 2 T96 2
others[6] 56 1 T102 2 T56 2 T369 2
others[7] 56 1 T103 2 T176 2 T268 2
false 13644 1 T1 4 T2 12 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 66 1 T99 2 T176 2 T259 2
others[1] 88 1 T259 2 T368 2 T129 2
others[2] 112 1 T4 2 T99 6 T32 2
others[3] 98 1 T5 2 T32 2 T102 2
others[4] 70 1 T100 2 T126 2 T178 2
others[5] 74 1 T94 2 T368 2 T41 4
others[6] 92 1 T99 2 T32 2 T126 4
others[7] 86 1 T15 2 T97 2 T103 2
false 13644 1 T1 4 T2 12 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 22 1 T371 2 T377 2 T378 2
others[1] 40 1 T209 2 T210 2 T372 2
others[2] 26 1 T126 2 T41 2 T379 2
others[3] 28 1 T117 2 T380 2 T379 2
others[4] 40 1 T117 2 T260 2 T258 2
others[5] 44 1 T151 2 T126 2 T178 2
others[6] 38 1 T17 4 T81 2 T177 2
others[7] 30 1 T100 2 T178 2 T258 2
false 13644 1 T1 4 T2 12 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 72 1 T97 2 T99 2 T102 2
others[1] 72 1 T231 4 T381 2 T382 2
others[2] 60 1 T98 2 T32 2 T64 2
others[3] 86 1 T15 2 T101 2 T103 2
others[4] 72 1 T32 2 T100 2 T375 2
others[5] 104 1 T15 4 T96 2 T103 2
others[6] 80 1 T15 2 T370 2 T259 2
others[7] 80 1 T375 2 T117 4 T368 2
false 13644 1 T1 4 T2 12 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 66 1 T5 2 T96 2 T64 2
others[1] 76 1 T103 2 T109 2 T126 2
others[2] 72 1 T15 2 T375 2 T383 2
others[3] 68 1 T101 2 T176 4 T384 4
others[4] 94 1 T98 2 T102 2 T176 2
others[5] 76 1 T4 2 T5 2 T98 2
others[6] 78 1 T15 2 T96 2 T231 2
others[7] 96 1 T17 2 T99 4 T101 2
false 13644 1 T1 4 T2 12 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 64 1 T209 2 T384 2 T385 2
others[1] 86 1 T98 2 T102 2 T126 2
others[2] 68 1 T17 4 T109 2 T117 2
others[3] 70 1 T17 2 T15 2 T99 4
others[4] 70 1 T4 2 T99 2 T231 2
others[5] 64 1 T15 2 T97 2 T102 2
others[6] 56 1 T103 2 T56 2 T376 2
others[7] 118 1 T5 2 T81 2 T178 2
false 13644 1 T1 4 T2 12 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 72 1 T17 2 T100 2 T370 2
others[1] 70 1 T99 2 T268 2 T126 2
others[2] 72 1 T31 2 T15 2 T32 2
others[3] 68 1 T5 2 T375 2 T126 2
others[4] 72 1 T99 2 T103 2 T109 2
others[5] 102 1 T98 2 T101 2 T102 2
others[6] 74 1 T4 2 T98 2 T99 2
others[7] 86 1 T31 2 T15 2 T61 2
false 13644 1 T1 4 T2 12 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T102 2 T176 2 T268 2
others[1] 110 1 T5 2 T17 2 T15 2
others[2] 104 1 T15 2 T99 2 T151 2
others[3] 86 1 T15 2 T101 2 T370 2
others[4] 92 1 T17 2 T15 2 T99 2
others[5] 104 1 T370 2 T126 2 T117 2
others[6] 54 1 T4 2 T56 2 T231 4
others[7] 80 1 T81 2 T368 2 T384 2
false 13644 1 T1 4 T2 12 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 23 1 T20 1 T21 1 T214 1
others[1] 28 1 T254 1 T381 2 T325 1
others[2] 47 1 T375 2 T277 1 T253 1
others[3] 34 1 T14 1 T19 1 T135 1
others[4] 23 1 T134 2 T14 1 T253 1
others[5] 32 1 T14 1 T19 1 T20 1
others[6] 31 1 T14 1 T21 1 T268 2
others[7] 40 1 T14 1 T21 1 T277 1
false 13644 1 T1 4 T2 12 T3 3
true 2070 1 T4 2 T5 5 T17 2


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 36 1 T14 1 T253 1 T254 1
others[1] 30 1 T14 1 T135 1 T253 1
others[2] 26 1 T126 2 T342 2 T214 1
others[3] 26 1 T14 1 T135 1 T214 1
others[4] 36 1 T20 1 T21 1 T253 1
others[5] 32 1 T134 2 T19 1 T386 2
others[6] 31 1 T14 1 T21 1 T375 2
others[7] 41 1 T14 1 T19 1 T20 1
false 11091 1 T1 2 T2 6 T3 2
true 18119 1 T1 5 T2 16 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 68 1 T17 2 T96 2 T99 2
others[1] 84 1 T15 2 T81 2 T374 2
others[2] 76 1 T5 2 T15 4 T56 2
others[3] 70 1 T126 2 T117 2 T371 2
others[4] 84 1 T15 2 T100 2 T370 2
others[5] 82 1 T17 2 T15 2 T96 2
others[6] 92 1 T330 2 T117 2 T231 2
others[7] 114 1 T106 2 T32 2 T101 2
false 7811 1 T1 2 T2 6 T3 2
true 16173 1 T1 5 T2 16 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T5 2 T15 2 T99 2
others[1] 80 1 T99 2 T103 2 T330 2
others[2] 74 1 T15 2 T97 2 T126 4
others[3] 70 1 T48 2 T374 2 T210 2
others[4] 78 1 T126 2 T210 2 T381 2
others[5] 78 1 T81 2 T268 2 T126 2
others[6] 86 1 T15 2 T370 2 T374 2
others[7] 98 1 T98 2 T106 2 T109 2
false 6789 1 T1 1 T2 6 T3 1
true 15934 1 T1 4 T2 16 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 78 1 T17 2 T99 2 T370 2
others[1] 64 1 T375 2 T94 4 T369 2
others[2] 82 1 T176 2 T259 2 T126 2
others[3] 82 1 T5 2 T101 2 T102 2
others[4] 58 1 T94 2 T371 2 T380 2
others[5] 92 1 T15 2 T99 4 T102 2
others[6] 98 1 T96 2 T97 2 T98 2
others[7] 74 1 T102 2 T375 2 T368 2
false 7312 1 T1 1 T2 6 T3 1
true 15982 1 T1 4 T2 16 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 29 1 T21 1 T135 1 T300 1
others[1] 17 1 T126 2 T135 1 T253 1
others[2] 37 1 T7 1 T21 1 T277 1
others[3] 33 1 T14 1 T21 1 T259 2
others[4] 33 1 T106 2 T19 1 T21 1
others[5] 35 1 T6 1 T15 2 T20 1
others[6] 35 1 T98 2 T277 2 T253 1
others[7] 40 1 T17 2 T253 1 T324 1
false 11032 1 T1 2 T2 6 T3 2
true 18070 1 T1 5 T2 16 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 46 1 T101 2 T109 2 T126 2
others[1] 68 1 T15 2 T103 2 T259 2
others[2] 62 1 T96 2 T99 2 T102 2
others[3] 66 1 T4 2 T5 2 T94 2
others[4] 36 1 T101 2 T117 2 T56 2
others[5] 54 1 T259 2 T117 2 T387 2
others[6] 56 1 T99 2 T370 2 T374 2
others[7] 68 1 T96 2 T94 2 T374 2
false 8751 1 T1 2 T2 6 T3 2
true 16160 1 T1 5 T2 16 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 19 1 T278 1 T388 1 T389 2
others[1] 33 1 T106 2 T253 1 T300 3
others[2] 38 1 T4 2 T14 1 T259 2
others[3] 39 1 T19 1 T253 1 T254 2
others[4] 42 1 T134 2 T14 1 T19 1
others[5] 40 1 T21 2 T277 1 T224 2
others[6] 26 1 T254 1 T214 1 T324 1
others[7] 33 1 T19 2 T214 1 T325 2
false 10976 1 T1 2 T2 6 T3 1
true 18012 1 T1 5 T2 16 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 78 1 T15 2 T99 2 T32 4
others[1] 66 1 T5 2 T370 2 T49 2
others[2] 90 1 T99 2 T103 2 T126 2
others[3] 72 1 T4 2 T97 2 T176 2
others[4] 110 1 T99 2 T102 2 T126 2
others[5] 102 1 T99 2 T100 2 T94 2
others[6] 70 1 T99 2 T94 2 T259 4
others[7] 98 1 T32 2 T176 2 T126 2
false 7790 1 T1 2 T2 5 T3 1
true 16082 1 T1 5 T2 16 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 40 1 T15 2 T14 1 T213 1
others[1] 31 1 T253 1 T342 1 T373 2
others[2] 31 1 T7 1 T19 1 T21 1
others[3] 29 1 T14 1 T19 2 T21 1
others[4] 34 1 T15 2 T97 2 T21 2
others[5] 27 1 T6 2 T7 1 T21 1
others[6] 49 1 T106 2 T19 1 T99 2
others[7] 32 1 T6 1 T21 1 T135 1
false 10938 1 T1 2 T2 6 T3 1
true 18032 1 T1 5 T2 16 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 40 1 T100 2 T178 2 T210 2
others[1] 24 1 T384 2 T41 2 T390 2
others[2] 38 1 T126 2 T391 2 T392 2
others[3] 18 1 T380 2 T393 2 T394 2
others[4] 34 1 T17 2 T395 2 T260 2
others[5] 26 1 T151 2 T177 2 T209 2
others[6] 24 1 T371 2 T379 2 T258 2
others[7] 64 1 T17 2 T81 2 T126 2
false 9664 1 T1 2 T2 6 T3 1
true 16131 1 T1 5 T2 16 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 70 1 T15 2 T32 2 T94 2
others[1] 78 1 T98 2 T64 2 T368 2
others[2] 68 1 T15 2 T96 2 T370 2
others[3] 76 1 T100 2 T94 2 T370 2
others[4] 78 1 T102 2 T103 2 T375 2
others[5] 72 1 T97 2 T176 2 T375 2
others[6] 68 1 T15 2 T32 2 T101 2
others[7] 116 1 T15 2 T99 2 T384 2
false 7012 1 T1 1 T2 6 T3 1
true 15949 1 T1 4 T2 16 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 68 1 T176 2 T370 2 T126 2
others[1] 84 1 T101 4 T102 2 T231 4
others[2] 58 1 T373 2 T260 2 T279 2
others[3] 86 1 T15 2 T96 4 T98 2
others[4] 88 1 T5 4 T102 2 T375 2
others[5] 60 1 T17 2 T103 2 T126 2
others[6] 100 1 T94 2 T49 2 T376 2
others[7] 82 1 T4 2 T15 2 T98 2
false 7012 1 T1 1 T2 6 T3 1
true 15949 1 T1 4 T2 16 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 74 1 T15 2 T98 2 T99 2
others[1] 74 1 T4 2 T109 2 T94 2
others[2] 74 1 T97 2 T117 2 T368 2
others[3] 74 1 T17 2 T15 2 T81 2
others[4] 80 1 T17 2 T330 2 T56 2
others[5] 72 1 T81 2 T126 2 T209 2
others[6] 70 1 T5 2 T99 2 T103 2
others[7] 78 1 T17 2 T99 2 T176 2
false 6393 1 T1 1 T2 6 T3 1
true 15933 1 T1 4 T2 16 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 60 1 T99 2 T330 2 T48 2
others[1] 76 1 T15 2 T99 2 T370 2
others[2] 88 1 T5 2 T32 2 T100 2
others[3] 94 1 T4 2 T17 2 T15 2
others[4] 72 1 T31 2 T102 2 T268 2
others[5] 66 1 T99 2 T101 2 T330 2
others[6] 70 1 T375 2 T117 2 T396 2
others[7] 90 1 T31 2 T103 2 T109 2
false 6393 1 T1 1 T2 6 T3 1
true 15933 1 T1 4 T2 16 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 64 1 T17 2 T100 2 T370 4
others[1] 60 1 T17 2 T384 2 T231 2
others[2] 68 1 T94 2 T397 2 T398 4
others[3] 48 1 T17 2 T15 2 T99 2
others[4] 38 1 T97 2 T298 2 T384 2
others[5] 58 1 T209 2 T397 4 T373 2
others[6] 54 1 T99 4 T369 4 T210 2
others[7] 68 1 T98 2 T101 2 T103 2
false 6789 1 T1 1 T2 6 T3 1
true 17229 1 T1 4 T2 17 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 52 1 T259 2 T126 4 T384 2
others[1] 58 1 T97 2 T126 2 T384 2
others[2] 58 1 T64 2 T94 2 T370 2
others[3] 54 1 T399 2 T369 2 T231 2
others[4] 66 1 T370 2 T259 2 T381 4
others[5] 66 1 T17 6 T96 2 T374 2
others[6] 52 1 T178 2 T399 2 T400 2
others[7] 64 1 T298 2 T56 2 T369 2
false 6789 1 T1 1 T2 6 T3 1
true 17229 1 T1 4 T2 17 T3 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 31 1 T5 2 T17 2 T6 1
others[1] 30 1 T19 1 T126 2 T254 1
others[2] 32 1 T224 1 T254 2 T401 1
others[3] 35 1 T178 2 T253 1 T214 1
others[4] 39 1 T300 1 T213 1 T342 1
others[5] 31 1 T19 1 T21 1 T135 1
others[6] 33 1 T6 1 T14 1 T19 1
others[7] 39 1 T14 1 T21 2 T277 1
false 11172 1 T1 2 T2 6 T3 2
true 18199 1 T1 5 T2 16 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T102 2 T81 2 T370 2
others[1] 74 1 T97 2 T64 2 T176 2
others[2] 116 1 T101 2 T126 4 T374 2
others[3] 92 1 T17 2 T99 2 T369 2
others[4] 82 1 T4 2 T5 2 T15 4
others[5] 84 1 T64 2 T209 2 T396 2
others[6] 74 1 T15 2 T99 2 T151 2
others[7] 102 1 T17 2 T15 2 T370 2
false 7756 1 T1 2 T2 6 T3 2
true 16132 1 T1 5 T2 16 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 33 1 T15 2 T14 1 T19 1
others[1] 23 1 T254 2 T300 1 T213 1
others[2] 32 1 T21 1 T253 1 T386 2
others[3] 32 1 T98 2 T277 1 T253 2
others[4] 35 1 T106 2 T21 1 T277 1
others[5] 29 1 T135 2 T300 1 T325 1
others[6] 30 1 T17 2 T21 2 T277 1
others[7] 45 1 T6 1 T7 1 T21 1
false 13644 1 T1 4 T2 12 T3 3
true 2060 1 T4 1 T5 4 T17 2

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%