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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14434 1 T1 5 T2 8 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14434 1 T1 5 T2 8 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10348 1 T1 3 T2 5 T3 1
true 16807 1 T1 5 T2 10 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 11226 1 T1 3 T2 5 T3 1
true 16860 1 T1 5 T2 10 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T27 2 T105 2 T127 2
others[1] 114 1 T104 2 T64 2 T107 4
others[2] 80 1 T5 4 T122 2 T123 4
others[3] 116 1 T5 4 T64 2 T121 2
others[4] 82 1 T210 2 T122 2 T123 4
others[5] 92 1 T105 2 T13 4 T107 2
others[6] 86 1 T123 2 T139 6 T367 2
others[7] 124 1 T5 2 T64 2 T107 2
false 14434 1 T1 5 T2 8 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T27 4 T28 2 T107 2
others[1] 84 1 T13 2 T139 2 T299 2
others[2] 98 1 T104 2 T13 2 T106 2
others[3] 120 1 T5 4 T13 4 T106 2
others[4] 94 1 T13 2 T108 2 T122 4
others[5] 86 1 T206 2 T123 4 T21 4
others[6] 78 1 T5 2 T122 4 T123 6
others[7] 134 1 T5 2 T10 2 T105 2
false 14434 1 T1 5 T2 8 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 102 1 T27 2 T13 4 T64 2
others[1] 86 1 T5 2 T13 2 T106 2
others[2] 80 1 T13 2 T65 2 T368 2
others[3] 98 1 T5 2 T28 2 T104 2
others[4] 116 1 T5 2 T28 2 T103 2
others[5] 90 1 T5 4 T65 4 T206 2
others[6] 96 1 T65 2 T122 2 T206 2
others[7] 96 1 T28 2 T13 2 T122 2
false 14434 1 T1 5 T2 8 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 72 1 T5 6 T105 2 T107 2
others[1] 68 1 T13 4 T65 2 T123 2
others[2] 58 1 T5 2 T105 2 T65 2
others[3] 74 1 T5 2 T13 2 T73 2
others[4] 60 1 T5 2 T104 2 T122 2
others[5] 42 1 T13 2 T65 2 T139 2
others[6] 52 1 T72 2 T127 2 T122 2
others[7] 60 1 T205 2 T123 4 T139 2
false 14434 1 T1 5 T2 8 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T5 4 T104 2 T106 4
others[1] 90 1 T13 4 T108 2 T122 2
others[2] 102 1 T5 2 T13 2 T209 2
others[3] 84 1 T107 2 T284 2 T367 2
others[4] 86 1 T5 2 T27 2 T127 2
others[5] 90 1 T5 2 T105 2 T13 2
others[6] 108 1 T5 2 T28 4 T104 2
others[7] 108 1 T5 2 T27 2 T106 2
false 14434 1 T1 5 T2 8 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 36 1 T27 2 T13 2 T123 2
others[1] 40 1 T107 2 T65 2 T369 2
others[2] 56 1 T5 2 T210 2 T65 2
others[3] 44 1 T123 4 T139 4 T370 2
others[4] 36 1 T13 2 T122 2 T123 4
others[5] 34 1 T27 2 T13 2 T64 2
others[6] 50 1 T27 2 T107 2 T123 4
others[7] 42 1 T65 2 T300 2 T371 2
false 14434 1 T1 5 T2 8 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 122 1 T5 4 T13 2 T368 4
others[1] 94 1 T51 2 T65 2 T122 4
others[2] 82 1 T5 2 T28 2 T105 2
others[3] 86 1 T13 2 T73 2 T107 2
others[4] 100 1 T28 2 T13 2 T65 2
others[5] 98 1 T27 2 T28 2 T13 2
others[6] 90 1 T5 2 T27 2 T104 2
others[7] 126 1 T13 4 T372 2 T21 4
false 14434 1 T1 5 T2 8 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 60 1 T5 2 T107 2 T65 2
others[1] 78 1 T5 2 T122 4 T123 4
others[2] 108 1 T5 2 T72 2 T107 2
others[3] 72 1 T5 2 T105 2 T123 6
others[4] 98 1 T103 2 T121 2 T368 2
others[5] 80 1 T5 2 T123 4 T284 2
others[6] 90 1 T64 2 T108 2 T368 2
others[7] 112 1 T5 2 T51 2 T65 2
false 14434 1 T1 5 T2 8 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T27 2 T28 2 T107 2
others[1] 84 1 T105 2 T107 2 T65 2
others[2] 96 1 T5 4 T127 2 T65 2
others[3] 72 1 T103 2 T107 2 T66 2
others[4] 82 1 T5 4 T10 2 T107 4
others[5] 82 1 T5 2 T122 4 T205 2
others[6] 86 1 T122 2 T123 8 T373 2
others[7] 116 1 T106 4 T65 2 T122 2
false 14434 1 T1 5 T2 8 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T28 2 T106 2 T65 2
others[1] 70 1 T104 2 T105 2 T107 2
others[2] 96 1 T107 2 T108 2 T65 2
others[3] 88 1 T105 2 T13 2 T107 2
others[4] 110 1 T27 2 T106 2 T73 2
others[5] 88 1 T107 2 T123 6 T299 4
others[6] 102 1 T5 4 T104 2 T13 2
others[7] 114 1 T5 2 T27 2 T103 2
false 14434 1 T1 5 T2 8 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 108 1 T121 2 T65 4 T123 4
others[1] 76 1 T106 2 T123 8 T139 2
others[2] 88 1 T13 2 T106 2 T122 4
others[3] 90 1 T5 6 T103 2 T13 2
others[4] 116 1 T13 2 T106 2 T65 4
others[5] 80 1 T28 2 T13 2 T64 2
others[6] 114 1 T27 2 T106 2 T123 2
others[7] 120 1 T5 6 T27 2 T13 2
false 14434 1 T1 5 T2 8 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 29 1 T6 1 T36 1 T276 1
others[1] 23 1 T12 1 T36 1 T329 1
others[2] 37 1 T11 1 T26 1 T123 2
others[3] 37 1 T5 2 T6 1 T11 2
others[4] 26 1 T12 1 T36 3 T276 1
others[5] 32 1 T12 1 T299 2 T251 1
others[6] 46 1 T6 2 T209 2 T26 1
others[7] 38 1 T36 1 T120 1 T244 2
false 14434 1 T1 5 T2 8 T3 4
true 2383 1 T1 1 T2 1 T5 29


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 40 1 T5 2 T12 1 T123 2
others[1] 33 1 T6 1 T11 2 T120 1
others[2] 26 1 T36 1 T251 1 T330 1
others[3] 32 1 T6 2 T209 2 T26 1
others[4] 31 1 T6 1 T11 1 T104 2
others[5] 27 1 T12 1 T276 1 T37 1
others[6] 33 1 T12 1 T26 1 T14 1
others[7] 47 1 T36 4 T120 1 T132 1
false 11742 1 T1 3 T2 5 T3 2
true 19200 1 T1 6 T2 10 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 132 1 T5 2 T27 2 T13 2
others[1] 70 1 T5 2 T105 2 T64 2
others[2] 94 1 T5 4 T107 2 T122 2
others[3] 92 1 T107 2 T139 6 T374 2
others[4] 106 1 T104 2 T13 2 T64 2
others[5] 88 1 T127 2 T206 2 T123 6
others[6] 96 1 T5 2 T105 2 T122 2
others[7] 114 1 T210 2 T65 2 T206 2
false 7938 1 T1 1 T2 4 T3 2
true 16934 1 T1 5 T2 10 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 100 1 T5 4 T122 4 T123 4
others[1] 92 1 T108 2 T127 2 T122 2
others[2] 108 1 T27 2 T104 2 T13 2
others[3] 94 1 T28 2 T107 2 T65 4
others[4] 90 1 T13 2 T106 2 T65 2
others[5] 104 1 T5 2 T10 2 T106 2
others[6] 82 1 T5 2 T27 2 T13 6
others[7] 118 1 T105 2 T13 2 T107 2
false 6924 1 T1 3 T2 5 T3 1
true 16672 1 T1 5 T2 10 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 126 1 T5 2 T28 2 T13 4
others[1] 86 1 T5 2 T27 2 T122 2
others[2] 102 1 T103 2 T104 2 T13 2
others[3] 92 1 T5 4 T368 2 T123 4
others[4] 84 1 T13 2 T106 2 T107 2
others[5] 102 1 T28 2 T13 2 T64 2
others[6] 52 1 T13 2 T65 2 T205 2
others[7] 120 1 T5 2 T28 2 T65 4
false 7423 1 T1 1 T2 5 T3 1
true 16698 1 T1 5 T2 10 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 30 1 T6 1 T12 1 T26 1
others[1] 37 1 T11 3 T122 2 T375 2
others[2] 35 1 T6 1 T12 1 T36 2
others[3] 27 1 T13 2 T37 1 T132 1
others[4] 28 1 T26 1 T276 1 T330 1
others[5] 36 1 T6 1 T12 1 T14 1
others[6] 39 1 T6 1 T11 1 T12 1
others[7] 48 1 T11 1 T72 2 T107 2
false 11666 1 T1 3 T2 5 T3 2
true 19163 1 T1 6 T2 10 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 52 1 T5 4 T127 2 T122 2
others[1] 66 1 T5 2 T122 2 T205 2
others[2] 64 1 T5 4 T105 2 T13 2
others[3] 50 1 T107 2 T374 2 T244 2
others[4] 74 1 T105 2 T123 2 T367 4
others[5] 44 1 T65 2 T299 2 T376 4
others[6] 56 1 T5 2 T104 2 T13 2
others[7] 80 1 T13 4 T72 2 T108 2
false 9254 1 T1 3 T2 4 T3 2
true 16921 1 T1 5 T2 10 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 23 1 T6 1 T36 1 T14 1
others[1] 31 1 T377 2 T16 2 T70 1
others[2] 28 1 T6 1 T11 2 T14 1
others[3] 29 1 T27 2 T13 2 T123 2
others[4] 34 1 T28 2 T12 1 T26 1
others[5] 23 1 T6 1 T251 1 T15 1
others[6] 24 1 T6 1 T106 2 T15 1
others[7] 55 1 T6 2 T11 1 T209 2
false 11604 1 T1 3 T2 5 T3 1
true 19100 1 T1 6 T2 10 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T27 4 T13 4 T73 2
others[1] 114 1 T5 2 T105 2 T106 4
others[2] 78 1 T5 2 T13 2 T127 2
others[3] 102 1 T106 2 T108 2 T206 2
others[4] 82 1 T5 4 T104 2 T107 2
others[5] 86 1 T28 2 T13 2 T106 2
others[6] 104 1 T28 2 T104 2 T210 2
others[7] 100 1 T5 6 T122 2 T123 6
false 7839 1 T1 3 T2 5 T3 1
true 16842 1 T1 5 T2 10 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 31 1 T11 1 T276 1 T120 2
others[1] 39 1 T6 1 T276 1 T139 2
others[2] 38 1 T11 1 T26 1 T36 3
others[3] 30 1 T324 1 T120 1 T132 1
others[4] 32 1 T6 3 T11 1 T64 2
others[5] 29 1 T11 1 T26 1 T36 1
others[6] 36 1 T6 1 T27 2 T65 2
others[7] 38 1 T11 1 T378 2 T251 2
false 11553 1 T1 3 T2 5 T3 1
true 19056 1 T1 6 T2 10 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 50 1 T27 2 T107 2 T378 2
others[1] 36 1 T21 2 T379 2 T380 2
others[2] 28 1 T27 2 T13 2 T65 2
others[3] 48 1 T107 2 T206 2 T123 6
others[4] 54 1 T27 2 T64 2 T65 2
others[5] 40 1 T122 2 T123 2 T139 2
others[6] 28 1 T5 2 T13 2 T210 2
others[7] 54 1 T13 2 T65 2 T122 2
false 9874 1 T1 3 T2 5 T3 1
true 16870 1 T1 5 T2 10 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 124 1 T28 2 T105 2 T13 4
others[1] 76 1 T5 2 T13 2 T108 2
others[2] 112 1 T5 2 T51 2 T28 2
others[3] 116 1 T127 2 T121 2 T122 4
others[4] 86 1 T28 2 T13 4 T73 2
others[5] 86 1 T5 2 T27 2 T13 2
others[6] 82 1 T27 2 T13 2 T65 2
others[7] 116 1 T5 2 T121 2 T122 6
false 7141 1 T1 1 T2 5 T3 1
true 16678 1 T1 5 T2 10 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T65 2 T123 4 T372 2
others[1] 86 1 T5 4 T51 2 T64 2
others[2] 80 1 T5 2 T122 4 T205 2
others[3] 76 1 T5 2 T121 2 T368 2
others[4] 104 1 T103 2 T65 2 T368 2
others[5] 100 1 T72 2 T107 2 T65 2
others[6] 68 1 T5 2 T108 2 T123 4
others[7] 96 1 T5 2 T105 2 T368 2
false 7141 1 T1 1 T2 5 T3 1
true 16678 1 T1 5 T2 10 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T107 2 T65 4 T122 2
others[1] 90 1 T5 2 T107 2 T108 2
others[2] 100 1 T5 2 T28 2 T105 2
others[3] 84 1 T5 2 T107 2 T123 2
others[4] 84 1 T127 2 T66 2 T122 2
others[5] 92 1 T122 4 T123 4 T139 2
others[6] 68 1 T10 2 T103 2 T106 2
others[7] 112 1 T5 4 T27 2 T65 6
false 6455 1 T1 2 T2 5 T3 1
true 16676 1 T1 5 T2 10 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T5 2 T27 2 T106 2
others[1] 74 1 T106 2 T107 2 T108 2
others[2] 100 1 T5 2 T73 2 T107 2
others[3] 72 1 T13 2 T206 2 T123 4
others[4] 104 1 T13 2 T107 6 T122 6
others[5] 80 1 T5 2 T104 2 T122 2
others[6] 98 1 T103 2 T123 2 T139 4
others[7] 130 1 T27 2 T28 2 T104 2
false 6455 1 T1 2 T2 5 T3 1
true 16676 1 T1 5 T2 10 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 60 1 T5 4 T127 2 T122 2
others[1] 62 1 T28 2 T65 2 T299 4
others[2] 68 1 T107 2 T139 2 T381 2
others[3] 58 1 T27 2 T122 2 T299 2
others[4] 96 1 T10 2 T27 2 T13 2
others[5] 70 1 T28 2 T122 2 T206 2
others[6] 74 1 T27 2 T127 2 T122 2
others[7] 70 1 T5 2 T123 4 T299 2
false 7053 1 T1 2 T2 4 T3 1
true 18145 1 T1 6 T2 12 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 58 1 T106 2 T65 2 T122 2
others[1] 50 1 T5 2 T27 2 T13 2
others[2] 60 1 T127 2 T123 4 T299 2
others[3] 78 1 T27 2 T106 2 T122 2
others[4] 56 1 T5 2 T105 4 T122 2
others[5] 56 1 T105 2 T65 2 T122 4
others[6] 60 1 T13 2 T107 2 T123 2
others[7] 64 1 T28 2 T65 2 T373 2
false 7053 1 T1 2 T2 4 T3 1
true 18145 1 T1 6 T2 12 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 39 1 T36 1 T14 1 T37 1
others[1] 36 1 T6 1 T11 1 T26 1
others[2] 27 1 T26 1 T36 2 T276 1
others[3] 23 1 T28 2 T12 1 T36 1
others[4] 37 1 T27 2 T11 1 T12 2
others[5] 32 1 T6 2 T276 1 T37 2
others[6] 38 1 T37 1 T251 1 T382 2
others[7] 31 1 T6 2 T37 1 T120 1
false 11808 1 T1 4 T2 5 T3 2
true 19252 1 T1 7 T2 10 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T5 4 T107 2 T123 4
others[1] 100 1 T13 2 T106 2 T65 4
others[2] 86 1 T5 4 T123 2 T21 2
others[3] 94 1 T103 2 T13 2 T65 2
others[4] 82 1 T27 2 T64 2 T121 2
others[5] 98 1 T5 2 T106 2 T65 2
others[6] 116 1 T5 2 T13 2 T106 2
others[7] 128 1 T27 2 T28 2 T13 4
false 7836 1 T1 1 T2 4 T3 1
true 16893 1 T1 5 T2 10 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 39 1 T6 1 T11 1 T72 2
others[1] 31 1 T6 1 T12 1 T276 1
others[2] 22 1 T11 1 T12 1 T26 1
others[3] 37 1 T6 1 T12 1 T26 1
others[4] 34 1 T11 2 T36 1 T325 1
others[5] 36 1 T6 1 T13 2 T26 1
others[6] 31 1 T11 1 T122 2 T123 2
others[7] 50 1 T12 1 T107 2 T372 2
false 14434 1 T1 5 T2 8 T3 4
true 2380 1 T1 1 T2 1 T4 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%