Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::flash_req_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::flash_req_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv


Summary for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::flash_req_cg

CATEGORY   EXPECTED   UNCOVERED   COVERED   PERCENT   
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::flash_req_cg
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
flash_index 2 0 2 100.00 100 1 1 0
secret1_lock 2 0 2 100.00 100 1 1 2


Crosses for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::flash_req_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
flash_req_lock_cross 4 0 4 100.00 100 1 1 0


Summary for Variable flash_index

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for flash_index

Excluded/Illegal bins
NAMECOUNTSTATUS
il 0 Illegal


Covered bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
flash_addr_key 6368 1 T2 3 T4 1 T5 40
flash_data_key 6367 1 T2 3 T4 1 T5 46


Summary for Variable secret1_lock

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for secret1_lock

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 7426 1 T2 6 T5 21 T6 125
auto[1] 5309 1 T4 2 T5 65 T27 48


Summary for Cross flash_req_lock_cross

Samples crossed: flash_index secret1_lock
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for flash_req_lock_cross

Bins
flash_index   secret1_lock   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
flash_addr_key auto[0] 3715 1 T2 3 T5 9 T6 60
flash_addr_key auto[1] 2653 1 T4 1 T5 31 T27 25
flash_data_key auto[0] 3711 1 T2 3 T5 12 T6 65
flash_data_key auto[1] 2656 1 T4 1 T5 34 T27 23