Unified Coverage Report :: Group :: otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code

Summary for Variable err_code_vals

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	7	1	6	85.71

User Defined Bins for err_code_vals

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
macro_err	0	1	1

Excluded/Illegal bins

NAME	COUNT	STATUS
illegal_err	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS	TEST	COUNT	TEST	COUNT	TEST	COUNT
fsm_err	49810	1		T3	69	T11	61	T104	47
access_err	61055	1		T2	8	T3	585	T10	49
write_blank_err	400	1		T5	6	T126	3	T6	1
ecc_uncorr_err	59587	1		T2	221	T5	639	T104	115
ecc_corr_err	1460	1		T2	4	T11	11	T104	3
no_err	90161	1		T2	10	T3	603	T4	67

Summary for Variable partition

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for partition

Excluded/Illegal bins

NAME	COUNT	STATUS
illegal_idx	0	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS	TEST	COUNT	TEST	COUNT	TEST	COUNT
life_cycle	565	1		T5	4	T6	4	T15	12
secret2	23857	1		T2	1	T3	112	T4	9
secret1	28328	1		T2	107	T3	175	T4	7
secret0	35488	1		T2	4	T3	114	T4	4
hw_cfg1	36124	1		T2	47	T3	91	T10	11
hw_cfg0	24517	1		T3	99	T4	9	T10	17
rot_creator_auth_state	20578	1		T2	2	T3	92	T4	13
rot_creator_auth_codesign	21208	1		T2	43	T3	146	T4	8
owner_sw_cfg	21664	1		T2	39	T3	138	T4	2
creator_sw_cfg	17956	1		T3	141	T4	6	T10	13
vendor_test	32188	1		T3	149	T4	9	T10	20

Summary for Cross dai_err_code_for_all_partitions

Samples crossed: err_code_vals partition

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
TOTAL	72	13	59	81.94	13
Automatically Generated Cross Bins	72	13	59	81.94	13
User Defined Cross Bins	0	0	0

Automatically Generated Cross Bins for dai_err_code_for_all_partitions

Uncovered bins

err_code_vals	partition	COUNT	AT LEAST	NUMBER	STATUS
[fsm_err]	[life_cycle]	0	1	1
[ecc_corr_err]	[vendor_test]	0	1	1
[macro_err]	[secret2 , secret1 , secret0 , hw_cfg1 , hw_cfg0 , rot_creator_auth_state , rot_creator_auth_codesign , owner_sw_cfg , creator_sw_cfg , vendor_test]	--	--	10
[no_err]	[life_cycle]	0	1	1

Covered bins

err_code_vals	partition	COUNT	AT LEAST	STATUS	TEST	COUNT	TEST	COUNT	TEST	COUNT
fsm_err	secret2	3578	1		T337	382	T214	47	T240	313
fsm_err	secret1	5639	1		T3	69	T125	169	T338	212
fsm_err	secret0	5171	1		T249	84	T339	497	T128	75
fsm_err	hw_cfg1	5005	1		T132	42	T111	458	T149	21
fsm_err	hw_cfg0	5399	1		T190	164	T204	76	T340	35
fsm_err	rot_creator_auth_state	2090	1		T104	47	T116	139	T117	115
fsm_err	rot_creator_auth_codesign	2767	1		T147	165	T341	43	T166	266
fsm_err	owner_sw_cfg	4126	1		T342	547	T343	44	T17	137
fsm_err	creator_sw_cfg	1191	1		T150	25	T182	17	T344	212
fsm_err	vendor_test	14844	1		T11	61	T153	66	T76	212
access_err	life_cycle	565	1		T5	4	T6	4	T15	12
access_err	secret2	10750	1		T3	62	T10	6	T5	4
access_err	secret1	5780	1		T3	70	T11	5	T38	61
access_err	secret0	4466	1		T2	3	T3	61	T10	2
access_err	hw_cfg1	1263	1		T2	5	T3	16	T10	5
access_err	hw_cfg0	2062	1		T3	21	T11	1	T38	1
access_err	rot_creator_auth_state	6079	1		T3	27	T10	2	T5	8
access_err	rot_creator_auth_codesign	7776	1		T3	73	T10	10	T5	16
access_err	owner_sw_cfg	6901	1		T3	84	T10	10	T5	16
access_err	creator_sw_cfg	7792	1		T3	78	T10	8	T5	10
access_err	vendor_test	7621	1		T3	93	T10	6	T5	9
write_blank_err	secret2	10	1		T126	1	T214	1	T345	1
write_blank_err	secret1	17	1		T222	1	T240	1	T346	1
write_blank_err	secret0	46	1		T6	1	T78	1	T27	1
write_blank_err	hw_cfg1	66	1		T5	2	T15	1	T154	1
write_blank_err	hw_cfg0	15	1		T347	1	T236	1	T348	1
write_blank_err	rot_creator_auth_state	125	1		T5	4	T126	1	T15	1
write_blank_err	rot_creator_auth_codesign	44	1		T15	2	T154	1	T214	2
write_blank_err	owner_sw_cfg	25	1		T347	4	T349	3	T350	3
write_blank_err	creator_sw_cfg	18	1		T351	2	T352	1	T229	1
write_blank_err	vendor_test	34	1		T126	1	T353	2	T214	5
ecc_uncorr_err	secret2	4116	1		T126	628	T354	30	T214	492
ecc_uncorr_err	secret1	7967	1		T2	106	T153	69	T149	27
ecc_uncorr_err	secret0	17327	1		T153	181	T6	569	T78	620
ecc_uncorr_err	hw_cfg1	18600	1		T2	40	T5	639	T153	70
ecc_uncorr_err	hw_cfg0	4684	1		T153	68	T355	6	T347	167
ecc_uncorr_err	rot_creator_auth_state	3644	1		T104	55	T149	40	T354	22
ecc_uncorr_err	rot_creator_auth_codesign	1331	1		T2	38	T153	137	T354	46
ecc_uncorr_err	owner_sw_cfg	1208	1		T2	37	T153	49	T354	62
ecc_uncorr_err	creator_sw_cfg	710	1		T104	60	T149	29	T182	28
ecc_corr_err	secret2	74	1		T2	1	T76	4	T77	1
ecc_corr_err	secret1	156	1		T153	2	T69	1	T77	4
ecc_corr_err	secret0	147	1		T2	1	T104	1	T153	2
ecc_corr_err	hw_cfg1	267	1		T153	4	T76	7	T58	2
ecc_corr_err	hw_cfg0	292	1		T11	4	T104	2	T153	6
ecc_corr_err	rot_creator_auth_state	136	1		T2	1	T11	2	T153	3
ecc_corr_err	rot_creator_auth_codesign	107	1		T11	3	T76	1	T29	5
ecc_corr_err	owner_sw_cfg	154	1		T2	1	T11	1	T153	2
ecc_corr_err	creator_sw_cfg	127	1		T11	1	T76	5	T29	8
no_err	secret2	5329	1		T3	50	T4	9	T10	7
no_err	secret1	8769	1		T2	1	T3	36	T4	7
no_err	secret0	8331	1		T3	53	T4	4	T10	4
no_err	hw_cfg1	10923	1		T2	2	T3	75	T10	6
no_err	hw_cfg0	12065	1		T3	78	T4	9	T10	17
no_err	rot_creator_auth_state	8504	1		T2	1	T3	65	T4	13
no_err	rot_creator_auth_codesign	9183	1		T2	5	T3	73	T4	8
no_err	owner_sw_cfg	9250	1		T2	1	T3	54	T4	2
no_err	creator_sw_cfg	8118	1		T3	63	T4	6	T10	5
no_err	vendor_test	9689	1		T3	56	T4	9	T10	14

User Defined Cross Bins for dai_err_code_for_all_partitions

Excluded/Illegal bins

NAME	COUNT	STATUS
vendor_test_ecc_uncorrectable_err	0	Illegal
life_cycle_ignore	0	Excluded

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
84.44	1	100	1	64	64

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
err_code_vals	7	1	6	85.71	100	1	1	0
partition	11	0	11	100.00	100	1	1	0

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
dai_err_code_for_all_partitions	72	13	59	81.94	100	1	1	0