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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14346 1 T1 4 T2 4 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14346 1 T1 4 T2 4 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10255 1 T1 2 T2 1 T3 7
true 16756 1 T1 5 T2 4 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 11155 1 T1 3 T2 1 T3 9
true 16816 1 T1 5 T2 4 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 68 1 T191 2 T370 4 T39 2
others[1] 86 1 T95 2 T103 2 T208 2
others[2] 100 1 T35 2 T98 2 T59 2
others[3] 98 1 T35 2 T59 2 T103 2
others[4] 96 1 T93 2 T207 2 T191 4
others[5] 86 1 T9 2 T59 4 T193 2
others[6] 94 1 T191 4 T364 2 T419 2
others[7] 86 1 T97 2 T59 6 T191 2
false 14346 1 T1 4 T2 4 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 92 1 T191 4 T181 2 T419 6
others[1] 104 1 T59 4 T130 2 T191 2
others[2] 78 1 T97 2 T100 2 T191 2
others[3] 82 1 T35 2 T108 2 T101 4
others[4] 100 1 T11 2 T59 2 T191 2
others[5] 96 1 T99 2 T59 2 T109 2
others[6] 94 1 T9 2 T126 4 T191 2
others[7] 128 1 T99 2 T59 2 T109 2
false 14346 1 T1 4 T2 4 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T98 4 T107 2 T93 2
others[1] 70 1 T95 2 T59 2 T235 2
others[2] 82 1 T3 2 T95 2 T59 2
others[3] 76 1 T11 2 T59 2 T103 2
others[4] 92 1 T59 2 T108 2 T420 2
others[5] 82 1 T93 2 T59 2 T191 2
others[6] 84 1 T3 2 T126 2 T191 4
others[7] 114 1 T98 2 T59 4 T108 2
false 14346 1 T1 4 T2 4 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 74 1 T59 2 T191 2 T419 4
others[1] 52 1 T59 4 T102 2 T103 2
others[2] 34 1 T59 2 T103 2 T421 2
others[3] 64 1 T191 2 T364 2 T422 2
others[4] 54 1 T97 2 T59 2 T103 2
others[5] 56 1 T191 4 T364 2 T419 2
others[6] 68 1 T95 4 T59 2 T126 2
others[7] 70 1 T109 2 T191 2 T423 4
false 14346 1 T1 4 T2 4 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T11 2 T35 2 T98 2
others[1] 110 1 T9 2 T11 2 T69 2
others[2] 84 1 T93 2 T109 2 T191 2
others[3] 100 1 T9 4 T95 2 T59 2
others[4] 102 1 T11 2 T59 2 T100 2
others[5] 84 1 T59 4 T191 2 T421 2
others[6] 74 1 T98 2 T100 2 T130 2
others[7] 126 1 T35 2 T97 2 T95 2
false 14346 1 T1 4 T2 4 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 30 1 T424 4 T287 2 T425 2
others[1] 28 1 T59 2 T139 2 T426 2
others[2] 58 1 T233 2 T424 2 T427 2
others[3] 34 1 T424 2 T263 2 T428 2
others[4] 30 1 T191 2 T370 2 T263 4
others[5] 30 1 T11 2 T59 2 T130 2
others[6] 36 1 T59 2 T191 2 T195 2
others[7] 52 1 T99 2 T93 2 T59 2
false 14346 1 T1 4 T2 4 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T9 2 T59 2 T108 2
others[1] 88 1 T97 2 T59 8 T100 4
others[2] 84 1 T93 2 T59 2 T191 2
others[3] 98 1 T98 2 T419 2 T421 2
others[4] 84 1 T9 2 T11 2 T59 2
others[5] 108 1 T98 2 T59 4 T74 2
others[6] 96 1 T98 4 T59 2 T191 2
others[7] 116 1 T11 2 T35 2 T99 2
false 14346 1 T1 4 T2 4 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 90 1 T11 2 T59 4 T108 2
others[1] 92 1 T11 2 T59 4 T100 2
others[2] 90 1 T3 2 T59 4 T60 2
others[3] 112 1 T95 2 T59 2 T100 2
others[4] 112 1 T11 2 T59 4 T60 2
others[5] 82 1 T97 2 T424 2 T370 6
others[6] 84 1 T59 2 T108 2 T195 2
others[7] 98 1 T9 4 T99 2 T93 2
false 14346 1 T1 4 T2 4 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T35 2 T98 2 T59 2
others[1] 96 1 T101 2 T103 2 T420 2
others[2] 98 1 T35 2 T93 2 T429 2
others[3] 112 1 T98 2 T59 4 T100 2
others[4] 72 1 T423 2 T424 6 T261 2
others[5] 96 1 T98 2 T59 2 T193 2
others[6] 70 1 T191 2 T423 4 T424 2
others[7] 120 1 T3 2 T101 2 T102 2
false 14346 1 T1 4 T2 4 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 90 1 T35 2 T93 4 T95 2
others[1] 110 1 T100 2 T130 2 T208 2
others[2] 96 1 T28 2 T99 2 T59 2
others[3] 90 1 T98 2 T99 2 T191 4
others[4] 76 1 T101 2 T420 2 T191 2
others[5] 82 1 T97 2 T59 2 T191 2
others[6] 78 1 T59 2 T195 2 T208 2
others[7] 124 1 T98 2 T95 2 T59 6
false 14346 1 T1 4 T2 4 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 74 1 T11 2 T99 2 T59 2
others[1] 84 1 T235 2 T423 6 T424 2
others[2] 102 1 T9 2 T12 2 T35 2
others[3] 84 1 T99 2 T191 2 T195 2
others[4] 112 1 T11 2 T99 2 T59 2
others[5] 98 1 T11 4 T60 2 T109 2
others[6] 100 1 T181 2 T235 2 T423 2
others[7] 86 1 T9 2 T59 2 T60 2
false 14346 1 T1 4 T2 4 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 24 1 T13 1 T34 1 T141 1
others[1] 29 1 T13 1 T142 1 T265 1
others[2] 25 1 T34 1 T265 1 T423 2
others[3] 20 1 T98 2 T13 1 T34 1
others[4] 37 1 T34 1 T243 2 T387 1
others[5] 32 1 T286 2 T184 2 T266 1
others[6] 33 1 T14 1 T108 2 T141 1
others[7] 39 1 T27 1 T34 1 T265 1
false 14346 1 T1 4 T2 4 T3 12
true 2329 1 T3 1 T5 1 T9 7


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 26 1 T98 2 T13 1 T366 1
others[1] 36 1 T14 1 T34 3 T184 1
others[2] 26 1 T141 2 T366 1 T430 1
others[3] 32 1 T27 1 T265 1 T266 1
others[4] 26 1 T13 2 T142 1 T184 1
others[5] 25 1 T108 2 T184 1 T188 1
others[6] 31 1 T34 1 T141 1 T286 2
others[7] 37 1 T34 1 T265 1 T243 1
false 11634 1 T1 3 T2 2 T3 9
true 19090 1 T1 5 T2 5 T3 13


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 74 1 T9 2 T191 2 T193 2
others[1] 104 1 T59 6 T126 2 T191 2
others[2] 58 1 T98 2 T191 2 T370 6
others[3] 70 1 T103 2 T191 2 T208 4
others[4] 106 1 T97 2 T191 2 T208 2
others[5] 92 1 T35 2 T59 2 T103 2
others[6] 84 1 T59 2 T126 2 T235 2
others[7] 126 1 T35 2 T93 2 T95 2
false 7941 1 T1 3 T2 2 T3 9
true 16851 1 T1 5 T2 5 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 102 1 T59 2 T101 2 T191 8
others[1] 100 1 T99 2 T59 2 T100 2
others[2] 104 1 T9 2 T191 4 T181 2
others[3] 82 1 T11 2 T99 2 T101 2
others[4] 84 1 T97 2 T59 2 T108 2
others[5] 114 1 T35 2 T59 2 T109 2
others[6] 80 1 T370 2 T431 2 T287 2
others[7] 108 1 T59 2 T109 2 T126 2
false 6900 1 T1 2 T2 1 T3 3
true 16609 1 T1 5 T2 4 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 74 1 T98 2 T95 2 T108 2
others[1] 96 1 T59 2 T420 2 T191 2
others[2] 74 1 T93 2 T95 2 T60 2
others[3] 68 1 T98 2 T59 4 T125 2
others[4] 70 1 T3 2 T98 2 T59 2
others[5] 102 1 T3 2 T107 2 T60 2
others[6] 88 1 T11 2 T59 6 T108 2
others[7] 110 1 T93 2 T59 2 T103 2
false 7276 1 T1 3 T2 1 T3 2
true 16637 1 T1 5 T2 4 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 35 1 T141 1 T423 2 T151 1
others[1] 30 1 T295 1 T432 2 T430 1
others[2] 37 1 T13 2 T34 2 T188 1
others[3] 35 1 T13 3 T34 1 T141 2
others[4] 25 1 T433 2 T145 2 T387 1
others[5] 39 1 T13 3 T14 1 T141 1
others[6] 30 1 T13 1 T34 1 T366 2
others[7] 34 1 T13 1 T141 1 T266 1
false 11563 1 T1 3 T2 2 T3 9
true 19098 1 T1 5 T2 5 T3 13


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 46 1 T59 4 T103 2 T191 2
others[1] 46 1 T193 2 T364 2 T419 2
others[2] 64 1 T59 2 T103 2 T242 2
others[3] 74 1 T97 2 T191 4 T422 2
others[4] 82 1 T59 2 T102 2 T109 2
others[5] 66 1 T59 2 T103 2 T193 2
others[6] 44 1 T95 2 T419 2 T423 2
others[7] 50 1 T95 2 T59 2 T126 2
false 9217 1 T1 3 T2 2 T3 9
true 16873 1 T1 5 T2 5 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 38 1 T13 1 T142 1 T266 1
others[1] 27 1 T13 1 T59 2 T27 1
others[2] 35 1 T142 1 T184 1 T188 1
others[3] 30 1 T13 1 T14 1 T34 1
others[4] 31 1 T34 1 T141 1 T103 2
others[5] 23 1 T13 2 T34 2 T141 1
others[6] 29 1 T27 1 T433 2 T366 1
others[7] 29 1 T13 1 T14 1 T34 2
false 11510 1 T1 3 T2 2 T3 9
true 19014 1 T1 5 T2 5 T3 13


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 108 1 T11 2 T35 2 T99 2
others[1] 66 1 T9 4 T191 2 T364 2
others[2] 100 1 T11 4 T59 2 T100 2
others[3] 100 1 T69 2 T95 2 T100 2
others[4] 90 1 T35 2 T97 2 T93 2
others[5] 90 1 T59 2 T429 2 T191 4
others[6] 108 1 T9 2 T59 2 T126 2
others[7] 116 1 T98 4 T59 8 T109 2
false 7793 1 T1 3 T2 2 T3 9
true 16778 1 T1 5 T2 5 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 30 1 T13 2 T141 1 T142 1
others[1] 29 1 T34 1 T142 1 T188 2
others[2] 38 1 T13 1 T141 2 T184 1
others[3] 27 1 T34 1 T184 1 T119 2
others[4] 40 1 T13 2 T27 1 T141 1
others[5] 38 1 T14 1 T34 2 T141 2
others[6] 22 1 T13 1 T265 1 T364 2
others[7] 36 1 T59 2 T141 3 T142 1
false 11476 1 T1 3 T2 2 T3 9
true 19032 1 T1 5 T2 5 T3 13


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 46 1 T11 2 T99 2 T423 2
others[1] 28 1 T235 2 T370 2 T287 2
others[2] 32 1 T191 2 T233 2 T424 2
others[3] 42 1 T59 2 T191 2 T234 2
others[4] 42 1 T130 2 T195 2 T424 2
others[5] 30 1 T434 2 T435 2 T426 2
others[6] 32 1 T59 4 T425 2 T321 2
others[7] 46 1 T93 2 T59 2 T424 2
false 9819 1 T1 3 T2 2 T3 9
true 16816 1 T1 5 T2 5 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 78 1 T59 2 T233 2 T235 2
others[1] 98 1 T98 2 T59 4 T191 2
others[2] 110 1 T35 2 T98 4 T93 2
others[3] 78 1 T9 2 T97 2 T59 2
others[4] 112 1 T59 4 T108 2 T109 2
others[5] 78 1 T9 2 T11 2 T99 2
others[6] 76 1 T59 4 T74 2 T191 4
others[7] 138 1 T11 2 T98 2 T59 6
false 6982 1 T1 3 T2 1 T3 2
true 16606 1 T1 5 T2 4 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T3 2 T9 2 T60 2
others[1] 102 1 T191 4 T423 2 T424 2
others[2] 106 1 T11 2 T97 2 T59 2
others[3] 106 1 T9 2 T59 4 T423 2
others[4] 88 1 T11 2 T59 6 T100 2
others[5] 82 1 T99 2 T95 2 T191 2
others[6] 66 1 T59 8 T109 2 T195 2
others[7] 112 1 T11 2 T93 2 T100 2
false 6982 1 T1 3 T2 1 T3 2
true 16606 1 T1 5 T2 4 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T35 2 T93 2 T101 2
others[1] 90 1 T103 2 T181 2 T208 2
others[2] 112 1 T98 2 T191 2 T242 2
others[3] 94 1 T98 2 T429 2 T191 4
others[4] 94 1 T3 2 T35 2 T98 2
others[5] 84 1 T59 4 T191 4 T193 2
others[6] 102 1 T420 2 T191 2 T235 2
others[7] 84 1 T100 2 T191 2 T424 2
false 6321 1 T1 2 T2 1 T3 1
true 16595 1 T1 5 T2 4 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T97 2 T93 2 T195 2
others[1] 110 1 T99 2 T95 2 T59 2
others[2] 94 1 T28 2 T98 2 T59 2
others[3] 82 1 T95 2 T59 4 T103 2
others[4] 114 1 T59 4 T101 2 T429 2
others[5] 60 1 T35 2 T98 2 T242 2
others[6] 90 1 T100 2 T101 2 T125 2
others[7] 110 1 T99 2 T93 2 T59 2
false 6321 1 T1 2 T2 1 T3 1
true 16595 1 T1 5 T2 4 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 68 1 T102 2 T193 4 T424 4
others[1] 78 1 T11 2 T99 2 T59 2
others[2] 50 1 T99 2 T59 2 T191 2
others[3] 78 1 T59 2 T100 4 T109 2
others[4] 46 1 T11 2 T59 2 T424 2
others[5] 62 1 T130 2 T208 2 T370 2
others[6] 46 1 T100 2 T101 2 T102 2
others[7] 76 1 T59 2 T101 2 T420 2
false 6865 1 T1 2 T2 1 T3 4
true 17988 1 T1 6 T2 4 T3 14


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 56 1 T9 2 T100 2 T429 2
others[1] 42 1 T59 4 T130 2 T419 2
others[2] 74 1 T97 2 T234 2 T424 2
others[3] 60 1 T59 2 T101 2 T421 2
others[4] 56 1 T101 2 T102 2 T191 4
others[5] 76 1 T35 2 T59 2 T109 2
others[6] 60 1 T9 2 T130 2 T420 2
others[7] 54 1 T208 2 T370 2 T119 2
false 6865 1 T1 2 T2 1 T3 4
true 17988 1 T1 6 T2 4 T3 14


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 40 1 T13 3 T34 2 T208 2
others[1] 43 1 T14 1 T34 1 T188 1
others[2] 42 1 T13 1 T27 1 T184 1
others[3] 29 1 T13 2 T141 1 T366 1
others[4] 30 1 T13 1 T27 1 T34 1
others[5] 33 1 T13 1 T141 3 T191 2
others[6] 28 1 T266 1 T366 1 T419 2
others[7] 33 1 T13 1 T34 2 T142 1
false 11708 1 T1 3 T2 2 T3 9
true 19161 1 T1 5 T2 5 T3 13


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 110 1 T12 2 T99 2 T59 2
others[1] 76 1 T11 2 T423 4 T424 2
others[2] 86 1 T35 2 T101 2 T130 2
others[3] 98 1 T99 4 T60 2 T109 2
others[4] 96 1 T9 2 T235 2 T424 2
others[5] 106 1 T11 4 T93 2 T59 2
others[6] 78 1 T11 2 T191 2 T421 2
others[7] 90 1 T9 2 T59 2 T101 2
false 7789 1 T1 3 T2 2 T3 9
true 16814 1 T1 5 T2 5 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 45 1 T13 1 T34 1 T141 1
others[1] 38 1 T13 2 T266 2 T366 1
others[2] 29 1 T13 1 T141 1 T145 2
others[3] 44 1 T13 3 T141 1 T208 2
others[4] 21 1 T13 1 T34 1 T188 1
others[5] 22 1 T13 1 T34 1 T141 1
others[6] 35 1 T13 1 T14 1 T433 2
others[7] 31 1 T34 1 T141 1 T366 1
false 14346 1 T1 4 T2 4 T3 12
true 2382 1 T3 1 T5 1 T9 9

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%