Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
84.44 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv



Summary for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 18 1 17 94.44
Crosses 72 13 59 81.94


Variables for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
err_code_vals 7 1 6 85.71 100 1 1 0
partition 11 0 11 100.00 100 1 1 0


Crosses for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
dai_err_code_for_all_partitions 72 13 59 81.94 100 1 1 0


Summary for Variable err_code_vals

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 7 1 6 85.71


User Defined Bins for err_code_vals

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
macro_err 0 1 1


Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_err 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err 48445 1 T4 10 T13 153 T16 63
access_err 62276 1 T1 101 T3 8 T5 2
write_blank_err 496 1 T17 6 T18 1 T8 9
ecc_uncorr_err 69875 1 T17 536 T18 219 T8 416
ecc_corr_err 1495 1 T4 5 T17 1 T8 4
no_err 90688 1 T1 247 T3 26 T5 38



Summary for Variable partition

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 11 0 11 100.00


User Defined Bins for partition

Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_idx 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
life_cycle 772 1 T17 14 T18 6 T8 2
secret2 27161 1 T1 43 T3 4 T5 2
secret1 26038 1 T1 40 T3 2 T5 5
secret0 35929 1 T1 23 T3 3 T5 4
hw_cfg1 39427 1 T1 11 T3 4 T5 4
hw_cfg0 29124 1 T1 29 T3 9 T5 1
rot_creator_auth_state 19909 1 T1 50 T3 1 T5 3
rot_creator_auth_codesign 23397 1 T1 44 T5 2 T4 8
owner_sw_cfg 19361 1 T1 15 T3 7 T5 10
creator_sw_cfg 20842 1 T1 45 T3 2 T5 2
vendor_test 31315 1 T1 48 T3 2 T5 7



Summary for Cross dai_err_code_for_all_partitions

Samples crossed: err_code_vals partition
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
TOTAL 72 13 59 81.94 13
Automatically Generated Cross Bins 72 13 59 81.94 13
User Defined Cross Bins 0 0 0


Automatically Generated Cross Bins for dai_err_code_for_all_partitions

Uncovered bins
err_code_valspartitionCOUNTAT LEASTNUMBERSTATUS
[fsm_err] [life_cycle] 0 1 1
[ecc_corr_err] [vendor_test] 0 1 1
[macro_err] [secret2 , secret1 , secret0 , hw_cfg1 , hw_cfg0 , rot_creator_auth_state , rot_creator_auth_codesign , owner_sw_cfg , creator_sw_cfg , vendor_test] -- -- 10
[no_err] [life_cycle] 0 1 1


Covered bins
err_code_valspartitionCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err secret2 4931 1 T258 100 T295 62 T60 388
fsm_err secret1 4197 1 T7 148 T194 62 T214 180
fsm_err secret0 3602 1 T141 22 T342 259 T246 79
fsm_err hw_cfg1 3489 1 T32 1 T220 262 T343 583
fsm_err hw_cfg0 7362 1 T16 63 T105 54 T94 132
fsm_err rot_creator_auth_state 2575 1 T23 324 T344 239 T250 156
fsm_err rot_creator_auth_codesign 3578 1 T100 120 T32 365 T9 224
fsm_err owner_sw_cfg 2175 1 T345 380 T60 201 T161 207
fsm_err creator_sw_cfg 2767 1 T13 153 T245 60 T346 26
fsm_err vendor_test 13769 1 T4 10 T59 72 T90 184
access_err life_cycle 772 1 T17 14 T18 6 T8 2
access_err secret2 10849 1 T1 19 T3 4 T4 5
access_err secret1 6002 1 T1 1 T4 3 T25 29
access_err secret0 4558 1 T3 1 T5 1 T7 2
access_err hw_cfg1 1313 1 T3 2 T4 1 T13 3
access_err hw_cfg0 2087 1 T4 4 T24 1 T25 17
access_err rot_creator_auth_state 5999 1 T1 21 T3 1 T4 6
access_err rot_creator_auth_codesign 8581 1 T1 12 T4 4 T17 7
access_err owner_sw_cfg 6841 1 T1 4 T17 5 T101 4
access_err creator_sw_cfg 7705 1 T1 19 T17 2 T101 2
access_err vendor_test 7569 1 T1 25 T5 1 T13 1
write_blank_err secret2 18 1 T8 1 T32 1 T278 1
write_blank_err secret1 14 1 T274 1 T285 1 T347 1
write_blank_err secret0 42 1 T18 1 T240 1 T274 2
write_blank_err hw_cfg1 86 1 T17 2 T8 2 T34 3
write_blank_err hw_cfg0 22 1 T34 1 T94 1 T33 1
write_blank_err rot_creator_auth_state 160 1 T8 3 T34 1 T9 4
write_blank_err rot_creator_auth_codesign 78 1 T17 3 T8 2 T34 4
write_blank_err owner_sw_cfg 33 1 T33 2 T279 4 T150 1
write_blank_err creator_sw_cfg 19 1 T8 1 T9 1 T348 1
write_blank_err vendor_test 24 1 T17 1 T192 1 T285 2
ecc_uncorr_err secret2 6330 1 T8 416 T136 36 T32 197
ecc_uncorr_err secret1 6736 1 T274 471 T285 101 T202 97
ecc_uncorr_err secret0 19151 1 T18 219 T136 36 T240 582
ecc_uncorr_err hw_cfg1 23369 1 T17 536 T34 607 T9 131
ecc_uncorr_err hw_cfg0 7119 1 T136 35 T34 401 T94 448
ecc_uncorr_err rot_creator_auth_state 2480 1 T136 33 T34 319 T141 27
ecc_uncorr_err rot_creator_auth_codesign 2092 1 T141 37 T146 68 T281 76
ecc_uncorr_err owner_sw_cfg 1021 1 T136 38 T146 137 T349 33
ecc_uncorr_err creator_sw_cfg 1577 1 T141 66 T348 131 T202 109
ecc_corr_err secret2 82 1 T102 3 T117 8 T147 2
ecc_corr_err secret1 114 1 T62 4 T102 2 T71 3
ecc_corr_err secret0 140 1 T102 3 T26 1 T146 1
ecc_corr_err hw_cfg1 340 1 T17 1 T8 4 T34 3
ecc_corr_err hw_cfg0 255 1 T117 11 T146 2 T72 1
ecc_corr_err rot_creator_auth_state 147 1 T4 2 T62 6 T102 5
ecc_corr_err rot_creator_auth_codesign 123 1 T136 1 T62 1 T102 5
ecc_corr_err owner_sw_cfg 130 1 T4 1 T102 2 T117 6
ecc_corr_err creator_sw_cfg 164 1 T4 2 T62 5 T71 2
no_err secret2 4951 1 T1 24 T5 2 T4 1
no_err secret1 8975 1 T1 39 T3 2 T5 5
no_err secret0 8436 1 T1 23 T3 2 T5 3
no_err hw_cfg1 10830 1 T1 11 T3 2 T5 4
no_err hw_cfg0 12279 1 T1 29 T3 9 T5 1
no_err rot_creator_auth_state 8548 1 T1 29 T5 3 T4 1
no_err rot_creator_auth_codesign 8945 1 T1 32 T5 2 T4 4
no_err owner_sw_cfg 9161 1 T1 11 T3 7 T5 10
no_err creator_sw_cfg 8610 1 T1 26 T3 2 T5 2
no_err vendor_test 9953 1 T1 23 T3 2 T5 6


User Defined Cross Bins for dai_err_code_for_all_partitions

Excluded/Illegal bins
NAMECOUNTSTATUS
vendor_test_ecc_uncorrectable_err 0 Illegal
life_cycle_ignore 0 Excluded

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