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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13899 1 T1 4 T2 3 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13899 1 T1 4 T2 3 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 9946 1 T1 2 T2 3 T3 1
true 16308 1 T1 4 T2 4 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10833 1 T1 3 T2 3 T3 1
true 16369 1 T1 5 T2 4 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 74 1 T109 2 T100 2 T106 2
others[1] 72 1 T9 2 T73 2 T105 2
others[2] 88 1 T10 4 T97 2 T104 2
others[3] 72 1 T9 2 T10 4 T104 2
others[4] 80 1 T10 2 T257 2 T220 2
others[5] 84 1 T10 4 T73 2 T222 2
others[6] 104 1 T10 2 T104 2 T73 4
others[7] 82 1 T104 2 T73 6 T106 2
false 13899 1 T1 4 T2 3 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T10 2 T103 2 T104 2
others[1] 102 1 T9 2 T100 2 T73 2
others[2] 66 1 T73 2 T105 2 T221 2
others[3] 84 1 T222 2 T255 2 T65 2
others[4] 80 1 T221 2 T254 4 T255 4
others[5] 74 1 T10 2 T186 2 T129 2
others[6] 104 1 T111 2 T104 2 T73 2
others[7] 92 1 T9 4 T10 2 T97 2
false 13899 1 T1 4 T2 3 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T10 2 T221 2 T277 2
others[1] 90 1 T104 2 T129 4 T257 2
others[2] 84 1 T104 2 T129 2 T150 2
others[3] 80 1 T104 2 T73 2 T106 2
others[4] 94 1 T10 2 T105 2 T221 2
others[5] 80 1 T10 2 T129 2 T257 2
others[6] 82 1 T97 2 T73 2 T129 4
others[7] 118 1 T9 4 T10 4 T103 2
false 13899 1 T1 4 T2 3 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 56 1 T10 2 T105 2 T129 6
others[1] 64 1 T30 2 T103 2 T73 2
others[2] 48 1 T73 2 T254 2 T387 2
others[3] 54 1 T9 2 T104 2 T129 2
others[4] 70 1 T9 4 T10 2 T153 2
others[5] 58 1 T30 2 T106 2 T129 2
others[6] 60 1 T10 2 T342 2 T254 2
others[7] 48 1 T10 6 T103 2 T129 2
false 13899 1 T1 4 T2 3 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 100 1 T10 2 T104 4 T106 2
others[1] 116 1 T10 2 T220 2 T342 2
others[2] 70 1 T10 2 T129 2 T41 2
others[3] 114 1 T9 2 T10 2 T31 2
others[4] 80 1 T111 2 T73 6 T129 2
others[5] 92 1 T103 2 T129 2 T188 2
others[6] 92 1 T10 2 T109 2 T104 2
others[7] 116 1 T30 2 T10 2 T109 2
false 13899 1 T1 4 T2 3 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 48 1 T188 2 T222 2 T255 2
others[1] 32 1 T97 2 T73 4 T186 2
others[2] 30 1 T104 4 T222 2 T255 2
others[3] 26 1 T187 2 T222 2 T85 2
others[4] 44 1 T221 2 T347 2 T388 2
others[5] 54 1 T73 2 T220 2 T221 2
others[6] 22 1 T73 2 T389 2 T85 2
others[7] 48 1 T79 2 T222 2 T255 2
false 13899 1 T1 4 T2 3 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 74 1 T30 2 T97 2 T221 2
others[1] 90 1 T10 2 T73 4 T222 2
others[2] 56 1 T10 2 T129 4 T222 2
others[3] 106 1 T9 2 T10 2 T104 2
others[4] 74 1 T30 2 T10 4 T255 4
others[5] 74 1 T72 2 T73 2 T105 2
others[6] 66 1 T30 2 T106 2 T291 2
others[7] 108 1 T103 2 T73 2 T129 2
false 13899 1 T1 4 T2 3 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 74 1 T10 4 T73 4 T129 2
others[1] 86 1 T82 2 T103 2 T97 2
others[2] 86 1 T9 2 T10 2 T73 2
others[3] 74 1 T10 4 T73 2 T390 2
others[4] 88 1 T30 2 T10 2 T105 2
others[5] 124 1 T291 2 T221 2 T391 2
others[6] 90 1 T10 2 T97 2 T105 2
others[7] 106 1 T10 2 T112 2 T129 2
false 13899 1 T1 4 T2 3 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T103 2 T105 2 T129 2
others[1] 66 1 T10 2 T129 2 T254 2
others[2] 104 1 T9 4 T10 4 T104 4
others[3] 102 1 T104 2 T73 4 T342 2
others[4] 88 1 T10 2 T97 2 T129 2
others[5] 102 1 T103 2 T73 4 T105 2
others[6] 82 1 T31 2 T97 2 T73 2
others[7] 98 1 T10 4 T391 2 T390 2
false 13899 1 T1 4 T2 3 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 104 1 T9 4 T129 2 T342 2
others[1] 62 1 T103 2 T104 2 T129 2
others[2] 88 1 T10 2 T277 2 T254 4
others[3] 90 1 T30 2 T10 2 T116 2
others[4] 78 1 T30 2 T105 2 T106 2
others[5] 106 1 T9 2 T10 6 T103 2
others[6] 104 1 T31 2 T104 2 T105 2
others[7] 114 1 T10 6 T129 6 T392 2
false 13899 1 T1 4 T2 3 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 104 1 T9 6 T73 2 T106 2
others[1] 90 1 T9 2 T10 2 T73 6
others[2] 90 1 T30 2 T103 2 T73 4
others[3] 92 1 T9 2 T10 2 T82 2
others[4] 114 1 T10 6 T104 2 T187 2
others[5] 92 1 T10 4 T73 2 T279 2
others[6] 94 1 T10 4 T153 2 T73 2
others[7] 118 1 T10 2 T104 2 T41 2
false 13899 1 T1 4 T2 3 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 27 1 T10 2 T18 2 T392 2
others[1] 25 1 T246 1 T276 1 T336 1
others[2] 33 1 T5 1 T14 1 T19 1
others[3] 34 1 T104 2 T14 1 T221 2
others[4] 23 1 T4 2 T246 1 T254 4
others[5] 31 1 T5 1 T253 1 T393 1
others[6] 42 1 T8 2 T14 1 T18 1
others[7] 47 1 T253 1 T337 1 T393 1
false 13899 1 T1 4 T2 3 T3 1
true 2302 1 T8 1 T4 2 T5 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 37 1 T5 1 T10 2 T104 2
others[1] 23 1 T254 2 T339 1 T393 1
others[2] 32 1 T276 1 T292 1 T336 1
others[3] 33 1 T5 1 T14 1 T19 1
others[4] 34 1 T253 1 T246 1 T336 1
others[5] 41 1 T392 2 T254 2 T294 1
others[6] 32 1 T8 2 T14 1 T246 1
others[7] 29 1 T4 2 T221 2 T246 1
false 11322 1 T1 3 T2 3 T3 1
true 18592 1 T1 5 T2 4 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T10 2 T222 2 T387 2
others[1] 92 1 T10 2 T100 2 T73 2
others[2] 90 1 T9 2 T10 8 T109 2
others[3] 82 1 T9 2 T10 2 T97 2
others[4] 74 1 T73 2 T106 4 T342 2
others[5] 82 1 T10 2 T104 4 T73 6
others[6] 66 1 T73 2 T106 2 T129 4
others[7] 90 1 T104 2 T73 2 T105 2
false 7710 1 T1 3 T2 1 T3 1
true 16436 1 T1 5 T2 4 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T9 4 T10 2 T73 2
others[1] 98 1 T105 4 T129 2 T277 2
others[2] 86 1 T9 2 T10 2 T111 2
others[3] 70 1 T254 2 T394 4 T395 2
others[4] 98 1 T10 2 T103 2 T73 2
others[5] 78 1 T186 2 T129 2 T255 4
others[6] 70 1 T97 2 T73 2 T342 2
others[7] 96 1 T104 2 T186 2 T129 2
false 6822 1 T1 2 T2 3 T3 1
true 16179 1 T1 4 T2 4 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T104 2 T220 2 T221 2
others[1] 92 1 T10 4 T112 2 T73 2
others[2] 88 1 T10 2 T97 2 T73 2
others[3] 70 1 T9 4 T220 2 T221 2
others[4] 72 1 T10 2 T104 2 T129 4
others[5] 100 1 T10 2 T112 2 T106 2
others[6] 102 1 T103 2 T73 2 T257 2
others[7] 102 1 T104 2 T129 2 T257 2
false 7241 1 T1 2 T2 3 T3 1
true 16208 1 T1 4 T2 4 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 27 1 T221 2 T294 1 T339 1
others[1] 27 1 T254 2 T225 1 T294 1
others[2] 41 1 T19 1 T253 1 T246 1
others[3] 33 1 T5 1 T253 1 T294 1
others[4] 30 1 T73 2 T14 2 T292 1
others[5] 26 1 T10 2 T14 1 T336 1
others[6] 22 1 T5 1 T253 1 T246 1
others[7] 27 1 T13 1 T225 1 T337 1
false 11249 1 T1 3 T2 3 T3 1
true 18533 1 T1 5 T2 4 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 64 1 T10 2 T103 2 T106 2
others[1] 44 1 T30 2 T10 2 T73 2
others[2] 60 1 T30 2 T9 2 T10 4
others[3] 58 1 T153 2 T257 2 T391 2
others[4] 48 1 T104 2 T129 4 T342 2
others[5] 48 1 T73 2 T342 2 T395 2
others[6] 46 1 T9 2 T10 2 T129 4
others[7] 90 1 T9 2 T10 2 T103 2
false 9021 1 T1 3 T2 3 T3 1
true 16422 1 T1 5 T2 4 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 33 1 T14 1 T342 2 T292 1
others[1] 21 1 T19 1 T396 1 T397 2
others[2] 35 1 T336 1 T398 2 T399 2
others[3] 26 1 T5 1 T14 1 T339 1
others[4] 37 1 T187 2 T14 2 T253 1
others[5] 22 1 T113 2 T246 1 T270 1
others[6] 38 1 T5 1 T109 2 T276 1
others[7] 32 1 T103 2 T14 1 T246 1
false 11195 1 T1 3 T2 3 T3 1
true 18494 1 T1 5 T2 4 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 102 1 T10 2 T31 2 T112 2
others[1] 110 1 T10 4 T109 2 T73 4
others[2] 82 1 T30 2 T10 2 T103 2
others[3] 96 1 T9 2 T186 2 T129 2
others[4] 80 1 T104 4 T129 2 T222 2
others[5] 98 1 T10 2 T73 4 T279 2
others[6] 90 1 T10 2 T106 4 T291 2
others[7] 122 1 T109 2 T111 2 T104 2
false 7594 1 T1 3 T2 3 T3 1
true 16337 1 T1 5 T2 4 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 35 1 T5 1 T14 2 T253 2
others[1] 35 1 T5 1 T246 1 T222 2
others[2] 32 1 T5 1 T14 1 T18 1
others[3] 29 1 T14 1 T221 2 T18 1
others[4] 23 1 T400 2 T270 1 T393 1
others[5] 31 1 T10 2 T253 1 T20 1
others[6] 31 1 T5 1 T19 1 T253 1
others[7] 28 1 T113 2 T72 2 T246 1
false 11151 1 T1 3 T2 3 T3 1
true 18444 1 T1 5 T2 4 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 42 1 T186 2 T188 2 T222 2
others[1] 36 1 T73 2 T221 4 T301 2
others[2] 44 1 T104 2 T73 2 T187 2
others[3] 40 1 T222 2 T254 2 T401 2
others[4] 34 1 T73 2 T255 4 T401 2
others[5] 34 1 T97 2 T73 2 T85 2
others[6] 30 1 T104 2 T79 2 T220 2
others[7] 44 1 T255 2 T85 2 T347 2
false 9536 1 T1 3 T2 1 T3 1
true 16369 1 T1 5 T2 4 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 68 1 T10 2 T73 4 T277 2
others[1] 94 1 T30 2 T10 4 T97 2
others[2] 68 1 T9 2 T10 2 T104 2
others[3] 94 1 T73 2 T129 2 T257 2
others[4] 64 1 T30 2 T105 2 T342 4
others[5] 82 1 T72 2 T73 4 T221 2
others[6] 80 1 T30 2 T10 2 T105 2
others[7] 98 1 T103 2 T129 2 T291 2
false 7024 1 T1 2 T2 3 T3 1
true 16187 1 T1 4 T2 4 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T10 2 T222 2 T255 2
others[1] 80 1 T30 2 T10 2 T103 2
others[2] 72 1 T73 2 T129 4 T188 4
others[3] 96 1 T105 2 T291 2 T257 2
others[4] 106 1 T73 2 T257 2 T220 2
others[5] 92 1 T9 2 T10 6 T112 2
others[6] 80 1 T97 2 T105 2 T222 2
others[7] 120 1 T10 6 T82 2 T97 2
false 7024 1 T1 2 T2 3 T3 1
true 16187 1 T1 4 T2 4 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 78 1 T9 2 T97 2 T106 2
others[1] 76 1 T103 2 T73 4 T105 2
others[2] 90 1 T9 2 T104 6 T105 2
others[3] 66 1 T73 4 T80 2 T277 2
others[4] 94 1 T10 4 T97 2 T222 4
others[5] 94 1 T10 2 T73 2 T221 2
others[6] 90 1 T10 4 T103 2 T73 2
others[7] 142 1 T10 2 T31 2 T129 2
false 6312 1 T1 1 T2 2 T3 1
true 16175 1 T1 4 T2 4 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 102 1 T10 2 T116 2 T105 4
others[1] 96 1 T104 2 T186 2 T347 4
others[2] 92 1 T103 2 T80 2 T220 2
others[3] 82 1 T30 4 T10 4 T220 2
others[4] 84 1 T10 2 T104 2 T129 4
others[5] 102 1 T9 2 T10 2 T103 2
others[6] 80 1 T9 2 T10 2 T186 2
others[7] 108 1 T9 2 T10 4 T104 2
false 6312 1 T1 1 T2 2 T3 1
true 16175 1 T1 4 T2 4 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 48 1 T104 2 T222 2 T398 2
others[1] 48 1 T30 2 T9 2 T103 2
others[2] 66 1 T97 2 T291 2 T151 2
others[3] 36 1 T222 2 T254 2 T301 2
others[4] 58 1 T82 2 T73 2 T105 2
others[5] 74 1 T10 2 T103 2 T73 4
others[6] 58 1 T10 2 T104 2 T105 2
others[7] 78 1 T9 2 T104 2 T186 2
false 6835 1 T1 1 T2 2 T3 1
true 17527 1 T1 4 T2 5 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 64 1 T10 2 T73 2 T129 2
others[1] 50 1 T82 2 T222 2 T402 2
others[2] 56 1 T104 4 T129 2 T222 2
others[3] 60 1 T10 2 T222 4 T254 2
others[4] 60 1 T104 2 T279 2 T222 2
others[5] 64 1 T103 2 T106 2 T277 2
others[6] 66 1 T30 2 T104 2 T73 2
others[7] 52 1 T10 2 T73 2 T105 2
false 6835 1 T1 1 T2 2 T3 1
true 17527 1 T1 4 T2 5 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 36 1 T5 1 T151 2 T221 2
others[1] 35 1 T391 2 T254 4 T337 1
others[2] 28 1 T14 1 T253 1 T246 1
others[3] 23 1 T5 1 T14 1 T19 1
others[4] 25 1 T14 1 T292 1 T270 1
others[5] 31 1 T14 1 T20 1 T270 1
others[6] 22 1 T5 1 T276 1 T292 1
others[7] 30 1 T14 1 T279 2 T222 2
false 11395 1 T1 3 T2 3 T3 1
true 18639 1 T1 5 T2 4 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 108 1 T9 4 T73 4 T254 6
others[1] 72 1 T10 2 T104 2 T73 2
others[2] 102 1 T103 2 T104 2 T73 6
others[3] 86 1 T30 2 T9 2 T10 2
others[4] 130 1 T9 4 T10 8 T153 2
others[5] 82 1 T10 4 T82 2 T73 2
others[6] 90 1 T73 4 T106 2 T257 2
others[7] 124 1 T10 4 T129 4 T257 2
false 7592 1 T1 3 T2 1 T3 1
true 16384 1 T1 5 T2 4 T3 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 38 1 T5 1 T10 2 T19 1
others[1] 31 1 T253 1 T225 1 T339 1
others[2] 26 1 T221 2 T337 1 T393 1
others[3] 21 1 T5 1 T292 2 T270 1
others[4] 30 1 T73 2 T13 1 T246 1
others[5] 27 1 T14 1 T253 1 T246 1
others[6] 23 1 T14 2 T294 1 T227 1
others[7] 37 1 T254 2 T294 2 T270 1
false 13899 1 T1 4 T2 3 T3 1
true 2288 1 T2 1 T8 1 T4 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%