Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
84.44 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv



Summary for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 18 1 17 94.44
Crosses 72 13 59 81.94


Variables for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
err_code_vals 7 1 6 85.71 100 1 1 0
partition 11 0 11 100.00 100 1 1 0


Crosses for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
dai_err_code_for_all_partitions 72 13 59 81.94 100 1 1 0


Summary for Variable err_code_vals

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 7 1 6 85.71


User Defined Bins for err_code_vals

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
macro_err 0 1 1


Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_err 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err 48066 1 T5 182 T9 681 T79 157
access_err 57097 1 T1 14 T2 6 T4 26
write_blank_err 404 1 T2 1 T4 4 T7 1
ecc_uncorr_err 62530 1 T2 500 T3 53 T4 197
ecc_corr_err 1417 1 T3 4 T4 1 T5 7
no_err 88882 1 T1 45 T2 21 T3 4



Summary for Variable partition

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 11 0 11 100.00


User Defined Bins for partition

Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_idx 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
life_cycle 654 1 T4 9 T13 17 T14 7
secret2 22094 1 T1 3 T2 2 T3 25
secret1 28014 1 T1 4 T4 2 T5 1
secret0 37362 1 T1 4 T2 5 T4 3
hw_cfg1 32101 1 T1 9 T2 4 T3 31
hw_cfg0 23089 1 T1 9 T2 505 T3 3
rot_creator_auth_state 23059 1 T1 6 T2 2 T4 20
rot_creator_auth_codesign 21371 1 T1 3 T3 2 T4 3
owner_sw_cfg 19851 1 T1 10 T2 8 T4 5
creator_sw_cfg 20168 1 T1 6 T2 2 T4 13
vendor_test 30633 1 T1 5 T4 4 T5 11



Summary for Cross dai_err_code_for_all_partitions

Samples crossed: err_code_vals partition
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
TOTAL 72 13 59 81.94 13
Automatically Generated Cross Bins 72 13 59 81.94 13
User Defined Cross Bins 0 0 0


Automatically Generated Cross Bins for dai_err_code_for_all_partitions

Uncovered bins
err_code_valspartitionCOUNTAT LEASTNUMBERSTATUS
[fsm_err] [life_cycle] 0 1 1
[ecc_corr_err] [vendor_test] 0 1 1
[macro_err] [secret2 , secret1 , secret0 , hw_cfg1 , hw_cfg0 , rot_creator_auth_state , rot_creator_auth_codesign , owner_sw_cfg , creator_sw_cfg , vendor_test] -- -- 10
[no_err] [life_cycle] 0 1 1


Covered bins
err_code_valspartitionCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err secret2 3417 1 T150 454 T353 47 T354 110
fsm_err secret1 4469 1 T9 259 T28 49 T139 113
fsm_err secret0 4043 1 T146 73 T70 139 T346 172
fsm_err hw_cfg1 3621 1 T149 54 T355 158 T356 193
fsm_err hw_cfg0 3912 1 T136 123 T138 87 T133 46
fsm_err rot_creator_auth_state 4825 1 T5 133 T9 422 T357 292
fsm_err rot_creator_auth_codesign 3669 1 T358 4 T155 23 T217 25
fsm_err owner_sw_cfg 3142 1 T5 49 T28 144 T16 351
fsm_err creator_sw_cfg 2947 1 T137 73 T239 101 T247 347
fsm_err vendor_test 14021 1 T79 157 T74 135 T219 102
access_err life_cycle 654 1 T4 9 T13 17 T14 7
access_err secret2 9984 1 T1 3 T2 2 T4 2
access_err secret1 5152 1 T9 33 T10 4 T27 128
access_err secret0 4180 1 T9 48 T12 4 T27 49
access_err hw_cfg1 1185 1 T1 1 T4 1 T9 4
access_err hw_cfg0 1869 1 T9 19 T12 1 T27 42
access_err rot_creator_auth_state 5512 1 T2 1 T4 5 T9 23
access_err rot_creator_auth_codesign 7693 1 T1 1 T9 30 T6 10
access_err owner_sw_cfg 6752 1 T1 3 T2 3 T4 1
access_err creator_sw_cfg 7289 1 T1 4 T4 7 T9 17
access_err vendor_test 6827 1 T1 2 T4 1 T5 4
write_blank_err secret2 5 1 T137 1 T359 1 T360 1
write_blank_err secret1 25 1 T361 1 T362 1 T363 1
write_blank_err secret0 52 1 T7 1 T274 1 T70 1
write_blank_err hw_cfg1 57 1 T4 2 T13 2 T364 1
write_blank_err hw_cfg0 14 1 T2 1 T14 1 T231 1
write_blank_err rot_creator_auth_state 127 1 T4 1 T14 6 T230 5
write_blank_err rot_creator_auth_codesign 42 1 T14 1 T359 2 T363 1
write_blank_err owner_sw_cfg 34 1 T14 1 T359 4 T365 2
write_blank_err creator_sw_cfg 11 1 T230 2 T366 1 T367 1
write_blank_err vendor_test 37 1 T4 1 T359 1 T256 1
ecc_uncorr_err secret2 3457 1 T3 23 T5 67 T94 85
ecc_uncorr_err secret1 9144 1 T94 85 T156 10 T368 59
ecc_uncorr_err secret0 20748 1 T5 65 T7 547 T155 18
ecc_uncorr_err hw_cfg1 16728 1 T3 30 T4 197 T13 564
ecc_uncorr_err hw_cfg0 5098 1 T2 500 T5 54 T14 226
ecc_uncorr_err rot_creator_auth_state 4396 1 T5 57 T156 10 T162 58
ecc_uncorr_err rot_creator_auth_codesign 977 1 T5 55 T155 19 T217 29
ecc_uncorr_err owner_sw_cfg 610 1 T5 59 T368 51 T162 59
ecc_uncorr_err creator_sw_cfg 1372 1 T94 47 T155 22 T156 4
ecc_corr_err secret2 100 1 T38 3 T68 3 T29 1
ecc_corr_err secret1 102 1 T5 1 T38 1 T94 5
ecc_corr_err secret0 136 1 T5 1 T38 8 T155 1
ecc_corr_err hw_cfg1 264 1 T4 1 T13 3 T38 10
ecc_corr_err hw_cfg0 256 1 T3 3 T38 7 T29 1
ecc_corr_err rot_creator_auth_state 144 1 T5 1 T29 5 T155 1
ecc_corr_err rot_creator_auth_codesign 140 1 T3 1 T5 1 T38 6
ecc_corr_err owner_sw_cfg 127 1 T5 1 T38 10 T29 3
ecc_corr_err creator_sw_cfg 148 1 T5 2 T38 2 T94 1
no_err secret2 5131 1 T3 2 T9 12 T6 10
no_err secret1 9122 1 T1 4 T4 2 T9 24
no_err secret0 8203 1 T1 4 T2 5 T4 3
no_err hw_cfg1 10246 1 T1 8 T2 4 T3 1
no_err hw_cfg0 11940 1 T1 9 T2 4 T4 9
no_err rot_creator_auth_state 8055 1 T1 6 T2 1 T4 14
no_err rot_creator_auth_codesign 8850 1 T1 2 T3 1 T4 3
no_err owner_sw_cfg 9186 1 T1 7 T2 5 T4 4
no_err creator_sw_cfg 8401 1 T1 2 T2 2 T4 6
no_err vendor_test 9748 1 T1 3 T4 2 T5 7


User Defined Cross Bins for dai_err_code_for_all_partitions

Excluded/Illegal bins
NAMECOUNTSTATUS
vendor_test_ecc_uncorrectable_err 0 Illegal
life_cycle_ignore 0 Excluded

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