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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
94.80 93.86 96.23 95.49 91.17 97.15 96.34 93.35


Total test records in report: 1324
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T1048 /workspace/coverage/default/52.otp_ctrl_init_fail.3297265856 Jul 27 05:47:29 PM PDT 24 Jul 27 05:47:35 PM PDT 24 2023825476 ps
T1049 /workspace/coverage/default/49.otp_ctrl_stress_all_with_rand_reset.2722201258 Jul 27 05:47:28 PM PDT 24 Jul 27 05:51:29 PM PDT 24 19837365862 ps
T1050 /workspace/coverage/default/12.otp_ctrl_dai_errs.2477284526 Jul 27 05:45:54 PM PDT 24 Jul 27 05:46:27 PM PDT 24 4070787794 ps
T1051 /workspace/coverage/default/36.otp_ctrl_parallel_lc_req.1443368200 Jul 27 05:46:57 PM PDT 24 Jul 27 05:47:02 PM PDT 24 419753299 ps
T216 /workspace/coverage/default/16.otp_ctrl_dai_errs.331198645 Jul 27 05:45:58 PM PDT 24 Jul 27 05:46:17 PM PDT 24 1291068174 ps
T1052 /workspace/coverage/default/20.otp_ctrl_parallel_lc_req.1105428076 Jul 27 05:46:12 PM PDT 24 Jul 27 05:46:43 PM PDT 24 9903091864 ps
T1053 /workspace/coverage/default/13.otp_ctrl_smoke.3973830239 Jul 27 05:45:52 PM PDT 24 Jul 27 05:45:59 PM PDT 24 271984817 ps
T1054 /workspace/coverage/default/78.otp_ctrl_stress_all_with_rand_reset.3951757644 Jul 27 05:47:37 PM PDT 24 Jul 27 06:23:09 PM PDT 24 254131810682 ps
T1055 /workspace/coverage/default/6.otp_ctrl_stress_all.2317978771 Jul 27 05:45:43 PM PDT 24 Jul 27 05:48:16 PM PDT 24 25265789856 ps
T1056 /workspace/coverage/default/21.otp_ctrl_smoke.546212544 Jul 27 05:46:16 PM PDT 24 Jul 27 05:46:21 PM PDT 24 194746293 ps
T1057 /workspace/coverage/default/18.otp_ctrl_dai_errs.2807586178 Jul 27 05:46:11 PM PDT 24 Jul 27 05:46:32 PM PDT 24 675313517 ps
T1058 /workspace/coverage/default/16.otp_ctrl_regwen.1420838712 Jul 27 05:46:00 PM PDT 24 Jul 27 05:46:15 PM PDT 24 4122744252 ps
T1059 /workspace/coverage/default/5.otp_ctrl_dai_errs.3199514343 Jul 27 05:45:43 PM PDT 24 Jul 27 05:46:01 PM PDT 24 597973201 ps
T1060 /workspace/coverage/default/2.otp_ctrl_background_chks.485257257 Jul 27 05:45:36 PM PDT 24 Jul 27 05:45:42 PM PDT 24 663688882 ps
T1061 /workspace/coverage/default/23.otp_ctrl_check_fail.4141582 Jul 27 05:46:20 PM PDT 24 Jul 27 05:46:49 PM PDT 24 1772230576 ps
T1062 /workspace/coverage/default/43.otp_ctrl_parallel_lc_esc.4139754816 Jul 27 05:47:10 PM PDT 24 Jul 27 05:47:16 PM PDT 24 242908227 ps
T1063 /workspace/coverage/default/19.otp_ctrl_parallel_lc_esc.793750284 Jul 27 05:46:10 PM PDT 24 Jul 27 05:46:31 PM PDT 24 790764005 ps
T1064 /workspace/coverage/default/6.otp_ctrl_macro_errs.243021244 Jul 27 05:45:50 PM PDT 24 Jul 27 05:45:57 PM PDT 24 771147662 ps
T143 /workspace/coverage/default/177.otp_ctrl_init_fail.1951121986 Jul 27 05:48:19 PM PDT 24 Jul 27 05:48:23 PM PDT 24 257792545 ps
T1065 /workspace/coverage/default/32.otp_ctrl_stress_all_with_rand_reset.460025929 Jul 27 05:46:50 PM PDT 24 Jul 27 06:25:16 PM PDT 24 1208515279143 ps
T1066 /workspace/coverage/default/20.otp_ctrl_parallel_lc_esc.3512811375 Jul 27 05:46:18 PM PDT 24 Jul 27 05:46:22 PM PDT 24 134377275 ps
T1067 /workspace/coverage/default/32.otp_ctrl_alert_test.461013142 Jul 27 05:46:45 PM PDT 24 Jul 27 05:46:47 PM PDT 24 208223456 ps
T1068 /workspace/coverage/default/12.otp_ctrl_parallel_lc_esc.2273406671 Jul 27 05:45:55 PM PDT 24 Jul 27 05:46:01 PM PDT 24 339475807 ps
T1069 /workspace/coverage/default/12.otp_ctrl_parallel_key_req.2806392098 Jul 27 05:45:50 PM PDT 24 Jul 27 05:46:23 PM PDT 24 1718548607 ps
T1070 /workspace/coverage/default/162.otp_ctrl_init_fail.2538547477 Jul 27 05:48:16 PM PDT 24 Jul 27 05:48:20 PM PDT 24 148886085 ps
T1071 /workspace/coverage/default/74.otp_ctrl_stress_all_with_rand_reset.1019785427 Jul 27 05:47:59 PM PDT 24 Jul 27 06:26:42 PM PDT 24 174637863893 ps
T1072 /workspace/coverage/default/288.otp_ctrl_init_fail.4193407925 Jul 27 05:48:48 PM PDT 24 Jul 27 05:48:53 PM PDT 24 322760047 ps
T1073 /workspace/coverage/default/15.otp_ctrl_alert_test.1833122012 Jul 27 05:46:02 PM PDT 24 Jul 27 05:46:04 PM PDT 24 170657588 ps
T1074 /workspace/coverage/default/23.otp_ctrl_parallel_lc_req.168674266 Jul 27 05:46:19 PM PDT 24 Jul 27 05:46:28 PM PDT 24 933314903 ps
T1075 /workspace/coverage/default/178.otp_ctrl_parallel_lc_esc.29769027 Jul 27 05:48:15 PM PDT 24 Jul 27 05:48:20 PM PDT 24 220397152 ps
T1076 /workspace/coverage/default/21.otp_ctrl_dai_errs.2098511983 Jul 27 05:46:14 PM PDT 24 Jul 27 05:46:23 PM PDT 24 200656841 ps
T1077 /workspace/coverage/default/46.otp_ctrl_test_access.86679590 Jul 27 05:47:16 PM PDT 24 Jul 27 05:47:40 PM PDT 24 11562594032 ps
T1078 /workspace/coverage/default/247.otp_ctrl_init_fail.2106519308 Jul 27 05:48:35 PM PDT 24 Jul 27 05:48:40 PM PDT 24 502386798 ps
T1079 /workspace/coverage/default/86.otp_ctrl_init_fail.390732093 Jul 27 05:47:43 PM PDT 24 Jul 27 05:47:46 PM PDT 24 240325240 ps
T1080 /workspace/coverage/default/40.otp_ctrl_dai_lock.1758182686 Jul 27 05:47:03 PM PDT 24 Jul 27 05:47:48 PM PDT 24 14631700035 ps
T1081 /workspace/coverage/default/39.otp_ctrl_parallel_lc_esc.2022898009 Jul 27 05:46:58 PM PDT 24 Jul 27 05:47:13 PM PDT 24 5133654083 ps
T1082 /workspace/coverage/default/42.otp_ctrl_check_fail.1983572897 Jul 27 05:47:07 PM PDT 24 Jul 27 05:47:29 PM PDT 24 2318298821 ps
T1083 /workspace/coverage/default/16.otp_ctrl_test_access.2878557445 Jul 27 05:46:09 PM PDT 24 Jul 27 05:46:26 PM PDT 24 988195383 ps
T90 /workspace/coverage/default/12.otp_ctrl_check_fail.2579847202 Jul 27 05:45:51 PM PDT 24 Jul 27 05:46:22 PM PDT 24 2253302995 ps
T1084 /workspace/coverage/default/19.otp_ctrl_init_fail.1238619607 Jul 27 05:46:10 PM PDT 24 Jul 27 05:46:15 PM PDT 24 418290702 ps
T1085 /workspace/coverage/default/120.otp_ctrl_parallel_lc_esc.1156777754 Jul 27 05:48:03 PM PDT 24 Jul 27 05:48:12 PM PDT 24 3984179970 ps
T1086 /workspace/coverage/default/134.otp_ctrl_parallel_lc_esc.48440090 Jul 27 05:48:02 PM PDT 24 Jul 27 05:48:07 PM PDT 24 289680740 ps
T1087 /workspace/coverage/default/15.otp_ctrl_parallel_lc_esc.906998590 Jul 27 05:46:01 PM PDT 24 Jul 27 05:46:14 PM PDT 24 4629101219 ps
T1088 /workspace/coverage/default/46.otp_ctrl_stress_all_with_rand_reset.1651313422 Jul 27 05:47:16 PM PDT 24 Jul 27 05:56:20 PM PDT 24 143082471927 ps
T1089 /workspace/coverage/default/143.otp_ctrl_init_fail.279954429 Jul 27 05:48:11 PM PDT 24 Jul 27 05:48:16 PM PDT 24 119012264 ps
T1090 /workspace/coverage/default/170.otp_ctrl_init_fail.3041884659 Jul 27 05:48:18 PM PDT 24 Jul 27 05:48:22 PM PDT 24 477007836 ps
T1091 /workspace/coverage/default/19.otp_ctrl_check_fail.334683999 Jul 27 05:46:10 PM PDT 24 Jul 27 05:47:23 PM PDT 24 15000031420 ps
T1092 /workspace/coverage/default/18.otp_ctrl_macro_errs.2039461125 Jul 27 05:46:11 PM PDT 24 Jul 27 05:46:15 PM PDT 24 2005952151 ps
T1093 /workspace/coverage/default/267.otp_ctrl_init_fail.1065619624 Jul 27 05:48:38 PM PDT 24 Jul 27 05:48:44 PM PDT 24 2170577928 ps
T1094 /workspace/coverage/default/228.otp_ctrl_init_fail.3697094234 Jul 27 05:48:28 PM PDT 24 Jul 27 05:48:31 PM PDT 24 86596752 ps
T1095 /workspace/coverage/default/180.otp_ctrl_parallel_lc_esc.2348051259 Jul 27 05:48:21 PM PDT 24 Jul 27 05:48:27 PM PDT 24 800084897 ps
T1096 /workspace/coverage/default/34.otp_ctrl_smoke.4198444002 Jul 27 05:46:45 PM PDT 24 Jul 27 05:46:50 PM PDT 24 241624234 ps
T1097 /workspace/coverage/default/36.otp_ctrl_check_fail.2817488050 Jul 27 05:46:57 PM PDT 24 Jul 27 05:47:02 PM PDT 24 1575249962 ps
T1098 /workspace/coverage/default/89.otp_ctrl_init_fail.2600464729 Jul 27 05:47:45 PM PDT 24 Jul 27 05:47:49 PM PDT 24 133765756 ps
T1099 /workspace/coverage/default/0.otp_ctrl_parallel_lc_req.1411035998 Jul 27 05:45:30 PM PDT 24 Jul 27 05:45:35 PM PDT 24 138774475 ps
T1100 /workspace/coverage/default/182.otp_ctrl_parallel_lc_esc.2727028369 Jul 27 05:48:25 PM PDT 24 Jul 27 05:48:31 PM PDT 24 1481555286 ps
T1101 /workspace/coverage/default/186.otp_ctrl_parallel_lc_esc.632663220 Jul 27 05:48:22 PM PDT 24 Jul 27 05:48:27 PM PDT 24 332472575 ps
T1102 /workspace/coverage/default/164.otp_ctrl_parallel_lc_esc.962813816 Jul 27 05:48:18 PM PDT 24 Jul 27 05:48:23 PM PDT 24 182315067 ps
T1103 /workspace/coverage/default/20.otp_ctrl_dai_lock.1232774185 Jul 27 05:46:11 PM PDT 24 Jul 27 05:46:15 PM PDT 24 232082321 ps
T1104 /workspace/coverage/default/39.otp_ctrl_parallel_key_req.3271262584 Jul 27 05:47:01 PM PDT 24 Jul 27 05:47:07 PM PDT 24 564846513 ps
T32 /workspace/coverage/default/38.otp_ctrl_check_fail.848965625 Jul 27 05:46:56 PM PDT 24 Jul 27 05:47:20 PM PDT 24 1056540860 ps
T1105 /workspace/coverage/default/27.otp_ctrl_stress_all_with_rand_reset.3388231395 Jul 27 05:46:34 PM PDT 24 Jul 27 05:56:54 PM PDT 24 24144687445 ps
T1106 /workspace/coverage/default/46.otp_ctrl_macro_errs.166121419 Jul 27 05:47:18 PM PDT 24 Jul 27 05:47:48 PM PDT 24 1399339916 ps
T1107 /workspace/coverage/default/13.otp_ctrl_dai_lock.1314776170 Jul 27 05:45:53 PM PDT 24 Jul 27 05:45:58 PM PDT 24 366896395 ps
T1108 /workspace/coverage/default/22.otp_ctrl_stress_all_with_rand_reset.866710779 Jul 27 05:46:21 PM PDT 24 Jul 27 06:02:32 PM PDT 24 358096107909 ps
T1109 /workspace/coverage/default/29.otp_ctrl_alert_test.957404601 Jul 27 05:46:38 PM PDT 24 Jul 27 05:46:39 PM PDT 24 100745434 ps
T1110 /workspace/coverage/default/133.otp_ctrl_parallel_lc_esc.3428634237 Jul 27 05:48:01 PM PDT 24 Jul 27 05:48:20 PM PDT 24 628799887 ps
T1111 /workspace/coverage/default/14.otp_ctrl_dai_lock.4216201200 Jul 27 05:45:57 PM PDT 24 Jul 27 05:46:20 PM PDT 24 3050917568 ps
T144 /workspace/coverage/default/140.otp_ctrl_init_fail.2506437818 Jul 27 05:48:06 PM PDT 24 Jul 27 05:48:12 PM PDT 24 2277080125 ps
T1112 /workspace/coverage/default/41.otp_ctrl_dai_lock.1397975947 Jul 27 05:47:02 PM PDT 24 Jul 27 05:47:36 PM PDT 24 1605039708 ps
T1113 /workspace/coverage/default/42.otp_ctrl_parallel_lc_esc.2880791411 Jul 27 05:47:08 PM PDT 24 Jul 27 05:47:20 PM PDT 24 5104868057 ps
T1114 /workspace/coverage/default/39.otp_ctrl_dai_errs.1988619426 Jul 27 05:46:59 PM PDT 24 Jul 27 05:47:31 PM PDT 24 3545709900 ps
T1115 /workspace/coverage/default/6.otp_ctrl_test_access.2239576048 Jul 27 05:45:43 PM PDT 24 Jul 27 05:45:50 PM PDT 24 453832259 ps
T1116 /workspace/coverage/default/65.otp_ctrl_parallel_lc_esc.3084956935 Jul 27 05:47:31 PM PDT 24 Jul 27 05:47:44 PM PDT 24 4092974801 ps
T1117 /workspace/coverage/default/3.otp_ctrl_parallel_key_req.2220556518 Jul 27 05:45:39 PM PDT 24 Jul 27 05:45:43 PM PDT 24 234378523 ps
T1118 /workspace/coverage/default/17.otp_ctrl_dai_lock.2842349268 Jul 27 05:46:07 PM PDT 24 Jul 27 05:46:29 PM PDT 24 3541900161 ps
T1119 /workspace/coverage/default/36.otp_ctrl_alert_test.2508388152 Jul 27 05:46:54 PM PDT 24 Jul 27 05:46:56 PM PDT 24 98565583 ps
T1120 /workspace/coverage/default/13.otp_ctrl_macro_errs.2368184323 Jul 27 05:46:10 PM PDT 24 Jul 27 05:46:57 PM PDT 24 2138868180 ps
T1121 /workspace/coverage/default/149.otp_ctrl_parallel_lc_esc.4242038517 Jul 27 05:48:06 PM PDT 24 Jul 27 05:48:13 PM PDT 24 609917376 ps
T1122 /workspace/coverage/default/24.otp_ctrl_regwen.550833797 Jul 27 05:46:24 PM PDT 24 Jul 27 05:46:29 PM PDT 24 153402205 ps
T1123 /workspace/coverage/default/8.otp_ctrl_parallel_lc_esc.3179604032 Jul 27 05:45:42 PM PDT 24 Jul 27 05:45:51 PM PDT 24 4243032296 ps
T1124 /workspace/coverage/default/113.otp_ctrl_init_fail.3224024899 Jul 27 05:48:07 PM PDT 24 Jul 27 05:48:12 PM PDT 24 715538158 ps
T1125 /workspace/coverage/default/122.otp_ctrl_parallel_lc_esc.1331908530 Jul 27 05:48:03 PM PDT 24 Jul 27 05:48:09 PM PDT 24 140064137 ps
T1126 /workspace/coverage/default/35.otp_ctrl_parallel_lc_req.2647708527 Jul 27 05:46:56 PM PDT 24 Jul 27 05:47:09 PM PDT 24 4948603370 ps
T1127 /workspace/coverage/default/139.otp_ctrl_init_fail.2297956514 Jul 27 05:48:04 PM PDT 24 Jul 27 05:48:08 PM PDT 24 182600686 ps
T1128 /workspace/coverage/default/186.otp_ctrl_init_fail.3809073228 Jul 27 05:48:21 PM PDT 24 Jul 27 05:48:25 PM PDT 24 342094824 ps
T1129 /workspace/coverage/default/42.otp_ctrl_test_access.3174529486 Jul 27 05:47:07 PM PDT 24 Jul 27 05:47:21 PM PDT 24 1208962300 ps
T1130 /workspace/coverage/default/111.otp_ctrl_init_fail.3088964266 Jul 27 05:47:59 PM PDT 24 Jul 27 05:48:05 PM PDT 24 2212826765 ps
T1131 /workspace/coverage/default/11.otp_ctrl_dai_errs.2876325990 Jul 27 05:45:51 PM PDT 24 Jul 27 05:46:01 PM PDT 24 390508609 ps
T1132 /workspace/coverage/default/46.otp_ctrl_parallel_key_req.1865530536 Jul 27 05:47:15 PM PDT 24 Jul 27 05:47:38 PM PDT 24 2443734774 ps
T1133 /workspace/coverage/default/36.otp_ctrl_dai_lock.1885941711 Jul 27 05:46:54 PM PDT 24 Jul 27 05:47:12 PM PDT 24 1394582948 ps
T1134 /workspace/coverage/default/6.otp_ctrl_parallel_lc_esc.1798970353 Jul 27 05:45:41 PM PDT 24 Jul 27 05:45:57 PM PDT 24 7589805154 ps
T1135 /workspace/coverage/default/9.otp_ctrl_check_fail.688559090 Jul 27 05:45:48 PM PDT 24 Jul 27 05:46:02 PM PDT 24 481454988 ps
T1136 /workspace/coverage/default/24.otp_ctrl_macro_errs.2537386301 Jul 27 05:46:22 PM PDT 24 Jul 27 05:46:41 PM PDT 24 832071864 ps
T1137 /workspace/coverage/default/14.otp_ctrl_stress_all_with_rand_reset.4001809651 Jul 27 05:46:00 PM PDT 24 Jul 27 05:52:45 PM PDT 24 58307686668 ps
T1138 /workspace/coverage/default/136.otp_ctrl_init_fail.219714792 Jul 27 05:48:02 PM PDT 24 Jul 27 05:48:06 PM PDT 24 1718221784 ps
T1139 /workspace/coverage/default/28.otp_ctrl_parallel_lc_req.3526971827 Jul 27 05:46:35 PM PDT 24 Jul 27 05:46:51 PM PDT 24 1026745026 ps
T1140 /workspace/coverage/default/26.otp_ctrl_parallel_lc_req.3300553566 Jul 27 05:46:32 PM PDT 24 Jul 27 05:46:54 PM PDT 24 9962128065 ps
T1141 /workspace/coverage/default/127.otp_ctrl_init_fail.739738101 Jul 27 05:48:04 PM PDT 24 Jul 27 05:48:09 PM PDT 24 225501738 ps
T1142 /workspace/coverage/default/43.otp_ctrl_macro_errs.1578289252 Jul 27 05:47:09 PM PDT 24 Jul 27 05:47:26 PM PDT 24 948421881 ps
T1143 /workspace/coverage/default/0.otp_ctrl_regwen.112058927 Jul 27 05:45:30 PM PDT 24 Jul 27 05:45:36 PM PDT 24 351894036 ps
T1144 /workspace/coverage/default/170.otp_ctrl_parallel_lc_esc.11383771 Jul 27 05:48:12 PM PDT 24 Jul 27 05:48:19 PM PDT 24 951004010 ps
T1145 /workspace/coverage/default/167.otp_ctrl_init_fail.3421633483 Jul 27 05:48:13 PM PDT 24 Jul 27 05:48:17 PM PDT 24 119168788 ps
T1146 /workspace/coverage/default/17.otp_ctrl_test_access.1625092746 Jul 27 05:46:08 PM PDT 24 Jul 27 05:46:39 PM PDT 24 12653311073 ps
T1147 /workspace/coverage/default/16.otp_ctrl_check_fail.1719900955 Jul 27 05:46:04 PM PDT 24 Jul 27 05:46:07 PM PDT 24 96215573 ps
T128 /workspace/coverage/default/48.otp_ctrl_check_fail.1136720953 Jul 27 05:47:29 PM PDT 24 Jul 27 05:47:55 PM PDT 24 4001473267 ps
T1148 /workspace/coverage/default/230.otp_ctrl_init_fail.1083452825 Jul 27 05:48:34 PM PDT 24 Jul 27 05:48:39 PM PDT 24 282095057 ps
T1149 /workspace/coverage/default/8.otp_ctrl_parallel_key_req.1857666015 Jul 27 05:45:50 PM PDT 24 Jul 27 05:45:58 PM PDT 24 2093563323 ps
T1150 /workspace/coverage/default/207.otp_ctrl_init_fail.3214516523 Jul 27 05:48:28 PM PDT 24 Jul 27 05:48:33 PM PDT 24 184524254 ps
T79 /workspace/coverage/default/291.otp_ctrl_init_fail.3226784441 Jul 27 05:48:47 PM PDT 24 Jul 27 05:48:53 PM PDT 24 283128194 ps
T1151 /workspace/coverage/default/27.otp_ctrl_dai_errs.3860563984 Jul 27 05:46:29 PM PDT 24 Jul 27 05:46:45 PM PDT 24 270709360 ps
T1152 /workspace/coverage/default/38.otp_ctrl_alert_test.1758796589 Jul 27 05:46:58 PM PDT 24 Jul 27 05:47:00 PM PDT 24 104881498 ps
T1153 /workspace/coverage/default/31.otp_ctrl_alert_test.113461097 Jul 27 05:46:50 PM PDT 24 Jul 27 05:46:53 PM PDT 24 1001942258 ps
T277 /workspace/coverage/default/60.otp_ctrl_stress_all_with_rand_reset.255882827 Jul 27 05:47:46 PM PDT 24 Jul 27 07:00:04 PM PDT 24 407653617713 ps
T1154 /workspace/coverage/default/21.otp_ctrl_parallel_lc_esc.676270805 Jul 27 05:46:15 PM PDT 24 Jul 27 05:46:28 PM PDT 24 974223684 ps
T1155 /workspace/coverage/default/24.otp_ctrl_smoke.527349984 Jul 27 05:46:21 PM PDT 24 Jul 27 05:46:32 PM PDT 24 1396853003 ps
T1156 /workspace/coverage/default/21.otp_ctrl_init_fail.245168887 Jul 27 05:46:18 PM PDT 24 Jul 27 05:46:24 PM PDT 24 1948142841 ps
T1157 /workspace/coverage/default/69.otp_ctrl_stress_all_with_rand_reset.3501602965 Jul 27 05:47:37 PM PDT 24 Jul 27 06:08:59 PM PDT 24 409694028952 ps
T1158 /workspace/coverage/default/41.otp_ctrl_regwen.1703581432 Jul 27 05:47:10 PM PDT 24 Jul 27 05:47:15 PM PDT 24 159849450 ps
T1159 /workspace/coverage/default/77.otp_ctrl_init_fail.4141677659 Jul 27 05:47:56 PM PDT 24 Jul 27 05:47:59 PM PDT 24 228763280 ps
T1160 /workspace/coverage/default/173.otp_ctrl_parallel_lc_esc.934095811 Jul 27 05:48:16 PM PDT 24 Jul 27 05:48:29 PM PDT 24 316365326 ps
T1161 /workspace/coverage/default/100.otp_ctrl_init_fail.1257635022 Jul 27 05:47:52 PM PDT 24 Jul 27 05:47:57 PM PDT 24 2228702199 ps
T1162 /workspace/coverage/default/88.otp_ctrl_init_fail.3508875425 Jul 27 05:47:47 PM PDT 24 Jul 27 05:47:50 PM PDT 24 519813173 ps
T1163 /workspace/coverage/default/46.otp_ctrl_dai_lock.1329992360 Jul 27 05:47:19 PM PDT 24 Jul 27 05:47:49 PM PDT 24 16371425811 ps
T1164 /workspace/coverage/default/13.otp_ctrl_init_fail.634288468 Jul 27 05:45:56 PM PDT 24 Jul 27 05:46:01 PM PDT 24 183290858 ps
T1165 /workspace/coverage/default/76.otp_ctrl_parallel_lc_esc.853912161 Jul 27 05:47:40 PM PDT 24 Jul 27 05:47:50 PM PDT 24 352050884 ps
T1166 /workspace/coverage/default/30.otp_ctrl_parallel_lc_esc.2994800925 Jul 27 05:46:42 PM PDT 24 Jul 27 05:46:48 PM PDT 24 182320889 ps
T1167 /workspace/coverage/default/69.otp_ctrl_init_fail.2803426886 Jul 27 05:47:44 PM PDT 24 Jul 27 05:47:50 PM PDT 24 714824112 ps
T1168 /workspace/coverage/default/48.otp_ctrl_regwen.2382029257 Jul 27 05:47:23 PM PDT 24 Jul 27 05:47:31 PM PDT 24 2074453792 ps
T1169 /workspace/coverage/default/59.otp_ctrl_init_fail.485896813 Jul 27 05:47:46 PM PDT 24 Jul 27 05:47:50 PM PDT 24 1816590163 ps
T1170 /workspace/coverage/default/11.otp_ctrl_stress_all_with_rand_reset.173848869 Jul 27 05:45:51 PM PDT 24 Jul 27 05:53:02 PM PDT 24 20512528262 ps
T1171 /workspace/coverage/default/43.otp_ctrl_test_access.22387078 Jul 27 05:47:06 PM PDT 24 Jul 27 05:47:21 PM PDT 24 696079257 ps
T1172 /workspace/coverage/default/1.otp_ctrl_init_fail.2723624446 Jul 27 05:45:28 PM PDT 24 Jul 27 05:45:31 PM PDT 24 261425239 ps
T1173 /workspace/coverage/default/55.otp_ctrl_parallel_lc_esc.4214726308 Jul 27 05:47:30 PM PDT 24 Jul 27 05:47:34 PM PDT 24 145122071 ps
T1174 /workspace/coverage/default/218.otp_ctrl_init_fail.594850619 Jul 27 05:48:29 PM PDT 24 Jul 27 05:48:33 PM PDT 24 114493533 ps
T1175 /workspace/coverage/default/124.otp_ctrl_parallel_lc_esc.1943851428 Jul 27 05:48:04 PM PDT 24 Jul 27 05:48:28 PM PDT 24 2603859196 ps
T1176 /workspace/coverage/default/48.otp_ctrl_macro_errs.3510493751 Jul 27 05:47:23 PM PDT 24 Jul 27 05:47:28 PM PDT 24 2111747414 ps
T1177 /workspace/coverage/default/26.otp_ctrl_dai_errs.3742168890 Jul 27 05:46:31 PM PDT 24 Jul 27 05:46:57 PM PDT 24 1722373463 ps
T1178 /workspace/coverage/default/7.otp_ctrl_init_fail.1082440984 Jul 27 05:45:41 PM PDT 24 Jul 27 05:45:46 PM PDT 24 233508421 ps
T1179 /workspace/coverage/default/161.otp_ctrl_init_fail.2834760000 Jul 27 05:48:22 PM PDT 24 Jul 27 05:48:26 PM PDT 24 134424422 ps
T1180 /workspace/coverage/default/143.otp_ctrl_parallel_lc_esc.2531866542 Jul 27 05:48:07 PM PDT 24 Jul 27 05:48:12 PM PDT 24 201855280 ps
T1181 /workspace/coverage/default/179.otp_ctrl_init_fail.2819063472 Jul 27 05:48:19 PM PDT 24 Jul 27 05:48:23 PM PDT 24 413855453 ps
T1182 /workspace/coverage/default/215.otp_ctrl_init_fail.3005384476 Jul 27 05:48:36 PM PDT 24 Jul 27 05:48:40 PM PDT 24 202418547 ps
T1183 /workspace/coverage/default/48.otp_ctrl_init_fail.2509046441 Jul 27 05:47:27 PM PDT 24 Jul 27 05:47:31 PM PDT 24 125225896 ps
T1184 /workspace/coverage/default/34.otp_ctrl_dai_errs.1452608898 Jul 27 05:46:47 PM PDT 24 Jul 27 05:47:09 PM PDT 24 1397493943 ps
T1185 /workspace/coverage/default/83.otp_ctrl_parallel_lc_esc.3225026482 Jul 27 05:47:51 PM PDT 24 Jul 27 05:47:56 PM PDT 24 215862776 ps
T1186 /workspace/coverage/default/14.otp_ctrl_smoke.3045067779 Jul 27 05:46:02 PM PDT 24 Jul 27 05:46:09 PM PDT 24 2281525440 ps
T1187 /workspace/coverage/default/38.otp_ctrl_parallel_key_req.1737864263 Jul 27 05:46:55 PM PDT 24 Jul 27 05:47:01 PM PDT 24 627712740 ps
T1188 /workspace/coverage/default/2.otp_ctrl_stress_all_with_rand_reset.814783110 Jul 27 05:45:37 PM PDT 24 Jul 27 06:47:15 PM PDT 24 297418443000 ps
T264 /workspace/coverage/cover_reg_top/5.otp_ctrl_csr_rw.366621740 Jul 27 05:22:15 PM PDT 24 Jul 27 05:22:16 PM PDT 24 38672639 ps
T1189 /workspace/coverage/cover_reg_top/1.otp_ctrl_intr_test.2123092565 Jul 27 05:21:49 PM PDT 24 Jul 27 05:21:50 PM PDT 24 43267063 ps
T260 /workspace/coverage/cover_reg_top/18.otp_ctrl_csr_mem_rw_with_rand_reset.1588324164 Jul 27 05:22:50 PM PDT 24 Jul 27 05:22:53 PM PDT 24 191619532 ps
T1190 /workspace/coverage/cover_reg_top/45.otp_ctrl_intr_test.3048563563 Jul 27 05:22:59 PM PDT 24 Jul 27 05:23:00 PM PDT 24 42391947 ps
T1191 /workspace/coverage/cover_reg_top/48.otp_ctrl_intr_test.3685260662 Jul 27 05:22:58 PM PDT 24 Jul 27 05:23:00 PM PDT 24 39879133 ps
T1192 /workspace/coverage/cover_reg_top/44.otp_ctrl_intr_test.1544914572 Jul 27 05:22:59 PM PDT 24 Jul 27 05:23:00 PM PDT 24 152870069 ps
T1193 /workspace/coverage/cover_reg_top/3.otp_ctrl_intr_test.3839568119 Jul 27 05:22:02 PM PDT 24 Jul 27 05:22:04 PM PDT 24 76722354 ps
T261 /workspace/coverage/cover_reg_top/14.otp_ctrl_csr_mem_rw_with_rand_reset.1364326519 Jul 27 05:22:37 PM PDT 24 Jul 27 05:22:41 PM PDT 24 215966188 ps
T278 /workspace/coverage/cover_reg_top/17.otp_ctrl_csr_rw.4243764245 Jul 27 05:22:49 PM PDT 24 Jul 27 05:22:50 PM PDT 24 172903149 ps
T1194 /workspace/coverage/cover_reg_top/12.otp_ctrl_tl_errors.2932335685 Jul 27 05:22:27 PM PDT 24 Jul 27 05:22:32 PM PDT 24 262942675 ps
T1195 /workspace/coverage/cover_reg_top/39.otp_ctrl_intr_test.1218880841 Jul 27 05:23:00 PM PDT 24 Jul 27 05:23:01 PM PDT 24 37968190 ps
T262 /workspace/coverage/cover_reg_top/5.otp_ctrl_csr_mem_rw_with_rand_reset.972957597 Jul 27 05:22:15 PM PDT 24 Jul 27 05:22:18 PM PDT 24 73416446 ps
T1196 /workspace/coverage/cover_reg_top/34.otp_ctrl_intr_test.631298966 Jul 27 05:23:01 PM PDT 24 Jul 27 05:23:03 PM PDT 24 113957898 ps
T257 /workspace/coverage/cover_reg_top/15.otp_ctrl_tl_intg_err.2712349355 Jul 27 05:22:44 PM PDT 24 Jul 27 05:23:03 PM PDT 24 1345728842 ps
T1197 /workspace/coverage/cover_reg_top/6.otp_ctrl_tl_errors.70256920 Jul 27 05:22:13 PM PDT 24 Jul 27 05:22:18 PM PDT 24 106372695 ps
T351 /workspace/coverage/cover_reg_top/6.otp_ctrl_csr_rw.1171377454 Jul 27 05:22:14 PM PDT 24 Jul 27 05:22:16 PM PDT 24 577070252 ps
T263 /workspace/coverage/cover_reg_top/7.otp_ctrl_csr_mem_rw_with_rand_reset.4266935774 Jul 27 05:22:26 PM PDT 24 Jul 27 05:22:28 PM PDT 24 73370135 ps
T1198 /workspace/coverage/cover_reg_top/0.otp_ctrl_mem_partial_access.1203145504 Jul 27 05:21:40 PM PDT 24 Jul 27 05:21:41 PM PDT 24 142461938 ps
T1199 /workspace/coverage/cover_reg_top/10.otp_ctrl_csr_mem_rw_with_rand_reset.4275534393 Jul 27 05:22:26 PM PDT 24 Jul 27 05:22:28 PM PDT 24 256880504 ps
T350 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_mem_rw_with_rand_reset.1419222328 Jul 27 05:22:15 PM PDT 24 Jul 27 05:22:18 PM PDT 24 223461486 ps
T1200 /workspace/coverage/cover_reg_top/21.otp_ctrl_intr_test.2532713137 Jul 27 05:22:50 PM PDT 24 Jul 27 05:22:52 PM PDT 24 640443074 ps
T1201 /workspace/coverage/cover_reg_top/12.otp_ctrl_intr_test.2011230341 Jul 27 05:22:37 PM PDT 24 Jul 27 05:22:38 PM PDT 24 43307108 ps
T1202 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_mem_rw_with_rand_reset.2959360303 Jul 27 05:21:51 PM PDT 24 Jul 27 05:21:54 PM PDT 24 108469140 ps
T258 /workspace/coverage/cover_reg_top/8.otp_ctrl_tl_intg_err.2161189 Jul 27 05:22:25 PM PDT 24 Jul 27 05:22:44 PM PDT 24 1299359823 ps
T1203 /workspace/coverage/cover_reg_top/9.otp_ctrl_tl_errors.2700177296 Jul 27 05:22:25 PM PDT 24 Jul 27 05:22:28 PM PDT 24 63703736 ps
T1204 /workspace/coverage/cover_reg_top/3.otp_ctrl_mem_walk.275807641 Jul 27 05:22:01 PM PDT 24 Jul 27 05:22:03 PM PDT 24 36113530 ps
T1205 /workspace/coverage/cover_reg_top/9.otp_ctrl_csr_mem_rw_with_rand_reset.548009493 Jul 27 05:22:25 PM PDT 24 Jul 27 05:22:28 PM PDT 24 415621012 ps
T1206 /workspace/coverage/cover_reg_top/42.otp_ctrl_intr_test.504318111 Jul 27 05:22:59 PM PDT 24 Jul 27 05:23:00 PM PDT 24 40658440 ps
T296 /workspace/coverage/cover_reg_top/5.otp_ctrl_same_csr_outstanding.556555674 Jul 27 05:22:15 PM PDT 24 Jul 27 05:22:18 PM PDT 24 127048450 ps
T259 /workspace/coverage/cover_reg_top/18.otp_ctrl_tl_intg_err.2691951034 Jul 27 05:22:48 PM PDT 24 Jul 27 05:23:11 PM PDT 24 10356039923 ps
T1207 /workspace/coverage/cover_reg_top/4.otp_ctrl_mem_walk.2410525166 Jul 27 05:22:14 PM PDT 24 Jul 27 05:22:16 PM PDT 24 151069634 ps
T1208 /workspace/coverage/cover_reg_top/9.otp_ctrl_intr_test.3965895 Jul 27 05:22:26 PM PDT 24 Jul 27 05:22:28 PM PDT 24 140951128 ps
T1209 /workspace/coverage/cover_reg_top/2.otp_ctrl_intr_test.342840839 Jul 27 05:21:52 PM PDT 24 Jul 27 05:21:53 PM PDT 24 78352600 ps
T306 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_bit_bash.2673404027 Jul 27 05:21:52 PM PDT 24 Jul 27 05:22:00 PM PDT 24 562462297 ps
T1210 /workspace/coverage/cover_reg_top/36.otp_ctrl_intr_test.564296603 Jul 27 05:22:59 PM PDT 24 Jul 27 05:23:00 PM PDT 24 39850419 ps
T1211 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_hw_reset.2199390753 Jul 27 05:21:39 PM PDT 24 Jul 27 05:21:41 PM PDT 24 1044869777 ps
T265 /workspace/coverage/cover_reg_top/12.otp_ctrl_tl_intg_err.2499526564 Jul 27 05:22:38 PM PDT 24 Jul 27 05:22:50 PM PDT 24 889393704 ps
T297 /workspace/coverage/cover_reg_top/4.otp_ctrl_same_csr_outstanding.2271898576 Jul 27 05:22:15 PM PDT 24 Jul 27 05:22:17 PM PDT 24 104449765 ps
T1212 /workspace/coverage/cover_reg_top/22.otp_ctrl_intr_test.2849509978 Jul 27 05:22:50 PM PDT 24 Jul 27 05:22:52 PM PDT 24 70368566 ps
T298 /workspace/coverage/cover_reg_top/12.otp_ctrl_same_csr_outstanding.1019293324 Jul 27 05:22:40 PM PDT 24 Jul 27 05:22:44 PM PDT 24 263796509 ps
T1213 /workspace/coverage/cover_reg_top/5.otp_ctrl_tl_errors.558946216 Jul 27 05:22:15 PM PDT 24 Jul 27 05:22:20 PM PDT 24 149678442 ps
T1214 /workspace/coverage/cover_reg_top/43.otp_ctrl_intr_test.1212546053 Jul 27 05:22:58 PM PDT 24 Jul 27 05:23:00 PM PDT 24 79311151 ps
T266 /workspace/coverage/cover_reg_top/1.otp_ctrl_tl_intg_err.1645855572 Jul 27 05:21:51 PM PDT 24 Jul 27 05:22:14 PM PDT 24 4229188776 ps
T1215 /workspace/coverage/cover_reg_top/46.otp_ctrl_intr_test.1061819269 Jul 27 05:22:58 PM PDT 24 Jul 27 05:23:00 PM PDT 24 126938847 ps
T1216 /workspace/coverage/cover_reg_top/2.otp_ctrl_tl_intg_err.3790944792 Jul 27 05:21:52 PM PDT 24 Jul 27 05:22:14 PM PDT 24 10239502694 ps
T1217 /workspace/coverage/cover_reg_top/35.otp_ctrl_intr_test.881616069 Jul 27 05:23:04 PM PDT 24 Jul 27 05:23:05 PM PDT 24 39731955 ps
T1218 /workspace/coverage/cover_reg_top/0.otp_ctrl_tl_errors.1472643519 Jul 27 05:21:39 PM PDT 24 Jul 27 05:21:44 PM PDT 24 69767001 ps
T1219 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_mem_rw_with_rand_reset.1782869235 Jul 27 05:22:15 PM PDT 24 Jul 27 05:22:18 PM PDT 24 147982623 ps
T299 /workspace/coverage/cover_reg_top/3.otp_ctrl_same_csr_outstanding.705611751 Jul 27 05:22:16 PM PDT 24 Jul 27 05:22:18 PM PDT 24 166028525 ps
T300 /workspace/coverage/cover_reg_top/16.otp_ctrl_csr_rw.3684867049 Jul 27 05:22:49 PM PDT 24 Jul 27 05:22:51 PM PDT 24 44175246 ps
T1220 /workspace/coverage/cover_reg_top/47.otp_ctrl_intr_test.1497602171 Jul 27 05:23:00 PM PDT 24 Jul 27 05:23:02 PM PDT 24 569482787 ps
T279 /workspace/coverage/cover_reg_top/12.otp_ctrl_csr_rw.1768634917 Jul 27 05:22:40 PM PDT 24 Jul 27 05:22:42 PM PDT 24 47086435 ps
T1221 /workspace/coverage/cover_reg_top/19.otp_ctrl_intr_test.672936562 Jul 27 05:22:49 PM PDT 24 Jul 27 05:22:50 PM PDT 24 40365043 ps
T1222 /workspace/coverage/cover_reg_top/8.otp_ctrl_csr_mem_rw_with_rand_reset.253382084 Jul 27 05:22:24 PM PDT 24 Jul 27 05:22:27 PM PDT 24 257476924 ps
T1223 /workspace/coverage/cover_reg_top/14.otp_ctrl_intr_test.1745201713 Jul 27 05:22:38 PM PDT 24 Jul 27 05:22:39 PM PDT 24 43470925 ps
T286 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_bit_bash.2697648184 Jul 27 05:22:15 PM PDT 24 Jul 27 05:22:18 PM PDT 24 136746602 ps
T280 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_rw.117605331 Jul 27 05:22:02 PM PDT 24 Jul 27 05:22:04 PM PDT 24 126911519 ps
T335 /workspace/coverage/cover_reg_top/7.otp_ctrl_tl_intg_err.2125060573 Jul 27 05:22:24 PM PDT 24 Jul 27 05:22:44 PM PDT 24 1448381127 ps
T301 /workspace/coverage/cover_reg_top/17.otp_ctrl_same_csr_outstanding.1987317921 Jul 27 05:22:49 PM PDT 24 Jul 27 05:22:52 PM PDT 24 93894808 ps
T1224 /workspace/coverage/cover_reg_top/20.otp_ctrl_intr_test.2684421096 Jul 27 05:22:52 PM PDT 24 Jul 27 05:22:53 PM PDT 24 144013805 ps
T302 /workspace/coverage/cover_reg_top/8.otp_ctrl_same_csr_outstanding.2917428492 Jul 27 05:22:25 PM PDT 24 Jul 27 05:22:28 PM PDT 24 213908628 ps
T1225 /workspace/coverage/cover_reg_top/33.otp_ctrl_intr_test.1588469913 Jul 27 05:22:59 PM PDT 24 Jul 27 05:23:01 PM PDT 24 40390448 ps
T1226 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_hw_reset.1999160782 Jul 27 05:22:02 PM PDT 24 Jul 27 05:22:05 PM PDT 24 395690822 ps
T1227 /workspace/coverage/cover_reg_top/13.otp_ctrl_intr_test.1349891338 Jul 27 05:22:40 PM PDT 24 Jul 27 05:22:41 PM PDT 24 45411558 ps
T1228 /workspace/coverage/cover_reg_top/7.otp_ctrl_csr_rw.837271630 Jul 27 05:22:28 PM PDT 24 Jul 27 05:22:30 PM PDT 24 40974330 ps
T1229 /workspace/coverage/cover_reg_top/4.otp_ctrl_tl_errors.2379666812 Jul 27 05:22:14 PM PDT 24 Jul 27 05:22:19 PM PDT 24 181328925 ps
T287 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_aliasing.3264451981 Jul 27 05:21:51 PM PDT 24 Jul 27 05:21:56 PM PDT 24 79179738 ps
T332 /workspace/coverage/cover_reg_top/13.otp_ctrl_tl_intg_err.2804769790 Jul 27 05:22:39 PM PDT 24 Jul 27 05:22:58 PM PDT 24 2596087567 ps
T1230 /workspace/coverage/cover_reg_top/17.otp_ctrl_csr_mem_rw_with_rand_reset.2073220809 Jul 27 05:22:48 PM PDT 24 Jul 27 05:22:52 PM PDT 24 1597213704 ps
T336 /workspace/coverage/cover_reg_top/4.otp_ctrl_tl_intg_err.1510676553 Jul 27 05:22:15 PM PDT 24 Jul 27 05:22:49 PM PDT 24 20302699016 ps
T1231 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_bit_bash.670966496 Jul 27 05:22:03 PM PDT 24 Jul 27 05:22:12 PM PDT 24 528946344 ps
T1232 /workspace/coverage/cover_reg_top/17.otp_ctrl_intr_test.399594335 Jul 27 05:22:50 PM PDT 24 Jul 27 05:22:52 PM PDT 24 156682969 ps
T1233 /workspace/coverage/cover_reg_top/14.otp_ctrl_tl_errors.786656758 Jul 27 05:22:36 PM PDT 24 Jul 27 05:22:41 PM PDT 24 248987051 ps
T1234 /workspace/coverage/cover_reg_top/18.otp_ctrl_intr_test.2801498965 Jul 27 05:22:48 PM PDT 24 Jul 27 05:22:49 PM PDT 24 140783824 ps
T1235 /workspace/coverage/cover_reg_top/15.otp_ctrl_tl_errors.1544073551 Jul 27 05:22:39 PM PDT 24 Jul 27 05:22:47 PM PDT 24 2599307549 ps
T1236 /workspace/coverage/cover_reg_top/6.otp_ctrl_tl_intg_err.3513357687 Jul 27 05:22:14 PM PDT 24 Jul 27 05:22:26 PM PDT 24 2443796020 ps
T1237 /workspace/coverage/cover_reg_top/32.otp_ctrl_intr_test.128993765 Jul 27 05:23:00 PM PDT 24 Jul 27 05:23:01 PM PDT 24 42056046 ps
T1238 /workspace/coverage/cover_reg_top/8.otp_ctrl_csr_rw.2839659934 Jul 27 05:22:26 PM PDT 24 Jul 27 05:22:28 PM PDT 24 136239434 ps
T1239 /workspace/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.2374986928 Jul 27 05:21:40 PM PDT 24 Jul 27 05:21:43 PM PDT 24 186302445 ps
T290 /workspace/coverage/cover_reg_top/9.otp_ctrl_csr_rw.2200906110 Jul 27 05:22:25 PM PDT 24 Jul 27 05:22:27 PM PDT 24 114152937 ps
T1240 /workspace/coverage/cover_reg_top/13.otp_ctrl_tl_errors.2997100368 Jul 27 05:22:36 PM PDT 24 Jul 27 05:22:44 PM PDT 24 248585469 ps
T333 /workspace/coverage/cover_reg_top/14.otp_ctrl_tl_intg_err.1587712537 Jul 27 05:22:37 PM PDT 24 Jul 27 05:22:56 PM PDT 24 5040162010 ps
T1241 /workspace/coverage/cover_reg_top/15.otp_ctrl_csr_mem_rw_with_rand_reset.2098531669 Jul 27 05:22:38 PM PDT 24 Jul 27 05:22:41 PM PDT 24 104561553 ps
T1242 /workspace/coverage/cover_reg_top/5.otp_ctrl_intr_test.697613473 Jul 27 05:22:14 PM PDT 24 Jul 27 05:22:16 PM PDT 24 600699941 ps
T1243 /workspace/coverage/cover_reg_top/27.otp_ctrl_intr_test.481532466 Jul 27 05:22:59 PM PDT 24 Jul 27 05:23:00 PM PDT 24 42058694 ps
T1244 /workspace/coverage/cover_reg_top/7.otp_ctrl_tl_errors.1896839021 Jul 27 05:22:14 PM PDT 24 Jul 27 05:22:20 PM PDT 24 176372818 ps
T334 /workspace/coverage/cover_reg_top/0.otp_ctrl_tl_intg_err.3556381909 Jul 27 05:21:39 PM PDT 24 Jul 27 05:22:01 PM PDT 24 4780499336 ps
T1245 /workspace/coverage/cover_reg_top/41.otp_ctrl_intr_test.229555888 Jul 27 05:23:00 PM PDT 24 Jul 27 05:23:02 PM PDT 24 40995723 ps
T1246 /workspace/coverage/cover_reg_top/16.otp_ctrl_csr_mem_rw_with_rand_reset.3769108915 Jul 27 05:22:50 PM PDT 24 Jul 27 05:22:52 PM PDT 24 281717649 ps
T1247 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_mem_rw_with_rand_reset.2343138592 Jul 27 05:21:39 PM PDT 24 Jul 27 05:21:41 PM PDT 24 187736325 ps
T337 /workspace/coverage/cover_reg_top/5.otp_ctrl_tl_intg_err.3317987397 Jul 27 05:22:15 PM PDT 24 Jul 27 05:22:32 PM PDT 24 10204871038 ps
T1248 /workspace/coverage/cover_reg_top/1.otp_ctrl_mem_partial_access.1641000876 Jul 27 05:21:50 PM PDT 24 Jul 27 05:21:52 PM PDT 24 98499256 ps
T1249 /workspace/coverage/cover_reg_top/11.otp_ctrl_csr_mem_rw_with_rand_reset.1598916599 Jul 27 05:22:27 PM PDT 24 Jul 27 05:22:29 PM PDT 24 69183352 ps
T1250 /workspace/coverage/cover_reg_top/4.otp_ctrl_intr_test.1093738719 Jul 27 05:22:15 PM PDT 24 Jul 27 05:22:16 PM PDT 24 40688638 ps
T1251 /workspace/coverage/cover_reg_top/1.otp_ctrl_same_csr_outstanding.738184144 Jul 27 05:21:51 PM PDT 24 Jul 27 05:21:53 PM PDT 24 45681535 ps
T1252 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_hw_reset.1413623320 Jul 27 05:22:02 PM PDT 24 Jul 27 05:22:05 PM PDT 24 180889634 ps
T1253 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_aliasing.51973334 Jul 27 05:22:14 PM PDT 24 Jul 27 05:22:20 PM PDT 24 85158049 ps
T1254 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_bit_bash.732392314 Jul 27 05:21:39 PM PDT 24 Jul 27 05:21:44 PM PDT 24 190383531 ps
T1255 /workspace/coverage/cover_reg_top/23.otp_ctrl_intr_test.2245210317 Jul 27 05:22:54 PM PDT 24 Jul 27 05:22:56 PM PDT 24 574434563 ps
T1256 /workspace/coverage/cover_reg_top/37.otp_ctrl_intr_test.2258166925 Jul 27 05:23:00 PM PDT 24 Jul 27 05:23:02 PM PDT 24 41498690 ps
T1257 /workspace/coverage/cover_reg_top/6.otp_ctrl_csr_mem_rw_with_rand_reset.1314413382 Jul 27 05:22:14 PM PDT 24 Jul 27 05:22:18 PM PDT 24 191339799 ps
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