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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13875 1 T1 4 T2 4 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13875 1 T1 4 T2 4 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10064 1 T1 1 T2 2 T3 12
true 16315 1 T1 4 T2 5 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10925 1 T1 2 T2 2 T3 16
true 16375 1 T1 4 T2 5 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 102 1 T7 2 T65 6 T91 2
others[1] 66 1 T98 2 T114 2 T225 2
others[2] 70 1 T3 2 T65 2 T107 2
others[3] 84 1 T6 2 T16 2 T92 2
others[4] 80 1 T7 2 T65 2 T91 2
others[5] 102 1 T16 2 T33 2 T222 2
others[6] 76 1 T225 2 T342 2 T343 2
others[7] 102 1 T33 2 T94 2 T98 8
false 13875 1 T1 4 T2 4 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T16 2 T33 2 T186 2
others[1] 84 1 T16 2 T65 2 T91 2
others[2] 100 1 T3 2 T7 2 T65 2
others[3] 92 1 T3 2 T65 2 T94 2
others[4] 80 1 T7 2 T91 2 T98 2
others[5] 64 1 T65 4 T91 2 T93 2
others[6] 72 1 T3 2 T6 2 T16 2
others[7] 94 1 T6 2 T7 4 T59 2
false 13875 1 T1 4 T2 4 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 74 1 T3 2 T91 2 T107 2
others[1] 54 1 T243 2 T344 2 T280 2
others[2] 90 1 T65 2 T91 2 T98 2
others[3] 68 1 T93 2 T98 2 T114 2
others[4] 78 1 T3 2 T16 2 T92 2
others[5] 76 1 T98 2 T114 2 T225 2
others[6] 82 1 T65 4 T94 2 T98 2
others[7] 102 1 T59 2 T98 4 T114 2
false 13875 1 T1 4 T2 4 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 46 1 T16 2 T98 2 T186 2
others[1] 58 1 T59 2 T94 2 T114 2
others[2] 50 1 T16 2 T71 2 T225 2
others[3] 66 1 T6 2 T93 2 T71 2
others[4] 62 1 T16 2 T93 2 T345 2
others[5] 52 1 T7 2 T98 2 T51 2
others[6] 56 1 T65 2 T114 2 T126 2
others[7] 66 1 T7 2 T65 2 T107 2
false 13875 1 T1 4 T2 4 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T65 2 T71 2 T114 2
others[1] 98 1 T65 2 T91 2 T98 2
others[2] 80 1 T65 2 T71 2 T98 2
others[3] 88 1 T65 2 T91 4 T98 2
others[4] 100 1 T65 2 T94 2 T98 4
others[5] 90 1 T3 2 T98 2 T126 4
others[6] 78 1 T16 2 T70 2 T107 2
others[7] 108 1 T7 2 T16 2 T50 2
false 13875 1 T1 4 T2 4 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 34 1 T114 4 T186 2 T162 2
others[1] 54 1 T16 4 T114 2 T187 2
others[2] 34 1 T92 2 T346 2 T27 2
others[3] 36 1 T162 2 T87 2 T347 4
others[4] 34 1 T185 2 T187 2 T348 2
others[5] 48 1 T70 2 T186 2 T162 2
others[6] 36 1 T65 2 T50 2 T184 2
others[7] 22 1 T349 2 T221 4 T350 2
false 13875 1 T1 4 T2 4 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T65 4 T91 2 T92 2
others[1] 94 1 T3 2 T7 4 T33 2
others[2] 62 1 T71 2 T98 4 T107 2
others[3] 96 1 T65 2 T91 2 T98 10
others[4] 68 1 T6 2 T7 2 T93 2
others[5] 76 1 T70 2 T351 2 T187 2
others[6] 94 1 T65 4 T94 2 T98 2
others[7] 102 1 T7 2 T16 2 T93 4
false 13875 1 T1 4 T2 4 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T65 4 T91 2 T186 4
others[1] 84 1 T6 2 T91 2 T98 2
others[2] 98 1 T16 2 T65 2 T93 2
others[3] 80 1 T65 2 T98 2 T114 2
others[4] 70 1 T6 2 T65 2 T94 2
others[5] 80 1 T7 2 T187 2 T27 2
others[6] 52 1 T71 2 T98 2 T107 2
others[7] 100 1 T65 2 T98 4 T107 2
false 13875 1 T1 4 T2 4 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 104 1 T33 2 T94 2 T98 8
others[1] 76 1 T114 2 T342 2 T352 2
others[2] 74 1 T16 2 T98 2 T107 2
others[3] 86 1 T59 2 T71 2 T98 4
others[4] 66 1 T16 2 T91 2 T107 2
others[5] 62 1 T16 2 T98 2 T114 2
others[6] 106 1 T98 2 T107 2 T114 2
others[7] 76 1 T7 4 T225 2 T185 2
false 13875 1 T1 4 T2 4 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 100 1 T7 2 T93 2 T98 2
others[1] 78 1 T3 2 T94 2 T98 2
others[2] 58 1 T6 2 T16 2 T98 2
others[3] 92 1 T98 2 T107 2 T353 2
others[4] 78 1 T16 4 T65 2 T91 2
others[5] 98 1 T65 2 T33 2 T70 2
others[6] 74 1 T16 2 T65 4 T98 4
others[7] 76 1 T7 2 T16 2 T70 2
false 13875 1 T1 4 T2 4 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 118 1 T91 2 T93 2 T351 2
others[1] 76 1 T3 2 T98 2 T114 2
others[2] 80 1 T6 2 T16 2 T65 2
others[3] 84 1 T3 2 T16 2 T93 2
others[4] 90 1 T7 2 T98 2 T354 2
others[5] 84 1 T16 2 T98 2 T107 2
others[6] 86 1 T59 2 T16 2 T33 2
others[7] 112 1 T16 2 T70 2 T93 2
false 13875 1 T1 4 T2 4 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 32 1 T14 2 T17 1 T355 1
others[1] 31 1 T17 1 T240 1 T18 1
others[2] 46 1 T224 1 T18 3 T196 2
others[3] 47 1 T98 2 T196 2 T19 2
others[4] 43 1 T70 2 T240 1 T72 1
others[5] 31 1 T114 2 T212 2 T19 1
others[6] 45 1 T14 1 T17 1 T198 2
others[7] 52 1 T72 2 T196 2 T220 2
false 13875 1 T1 4 T2 4 T3 19
true 2223 1 T2 1 T3 5 T6 3


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 42 1 T72 1 T98 2 T18 1
others[1] 41 1 T240 1 T72 1 T18 2
others[2] 42 1 T18 1 T196 1 T212 1
others[3] 27 1 T224 2 T212 1 T19 1
others[4] 32 1 T14 1 T17 1 T18 1
others[5] 54 1 T70 2 T17 2 T18 1
others[6] 39 1 T14 2 T240 1 T114 2
others[7] 50 1 T72 1 T196 1 T220 2
false 11355 1 T1 3 T2 2 T3 18
true 18526 1 T1 5 T2 5 T3 24


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 60 1 T222 2 T356 2 T346 2
others[1] 90 1 T65 2 T93 4 T71 2
others[2] 106 1 T16 2 T33 2 T98 2
others[3] 78 1 T65 4 T92 2 T114 2
others[4] 90 1 T65 2 T91 2 T33 2
others[5] 82 1 T98 2 T107 2 T222 2
others[6] 76 1 T6 2 T7 4 T16 2
others[7] 100 1 T3 2 T91 2 T354 2
false 7830 1 T1 3 T2 2 T3 1
true 16417 1 T1 5 T2 5 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 76 1 T7 2 T16 2 T65 2
others[1] 64 1 T7 2 T93 2 T98 2
others[2] 86 1 T6 2 T7 2 T59 2
others[3] 86 1 T93 2 T71 2 T98 4
others[4] 94 1 T3 2 T6 2 T7 2
others[5] 84 1 T65 4 T93 2 T225 2
others[6] 78 1 T65 4 T91 4 T33 2
others[7] 106 1 T3 4 T16 2 T65 2
false 6995 1 T1 1 T2 2 T3 1
true 16190 1 T1 4 T2 5 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 72 1 T65 2 T92 2 T114 2
others[1] 72 1 T3 4 T98 2 T107 2
others[2] 86 1 T59 2 T98 2 T187 4
others[3] 70 1 T93 2 T98 4 T114 2
others[4] 98 1 T91 2 T94 2 T98 2
others[5] 76 1 T91 2 T114 2 T184 2
others[6] 60 1 T65 2 T98 2 T225 2
others[7] 90 1 T16 2 T65 2 T98 2
false 7471 1 T1 2 T2 2 T3 1
true 16213 1 T1 4 T2 5 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 33 1 T9 1 T224 1 T107 2
others[1] 23 1 T14 3 T196 1 T212 1
others[2] 38 1 T14 2 T17 1 T72 1
others[3] 30 1 T72 1 T224 1 T18 1
others[4] 39 1 T9 1 T240 1 T72 1
others[5] 39 1 T9 1 T224 1 T19 1
others[6] 30 1 T15 1 T224 1 T198 2
others[7] 43 1 T14 1 T17 1 T72 1
false 11286 1 T1 2 T2 2 T3 17
true 18464 1 T1 4 T2 5 T3 27


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 40 1 T71 2 T221 2 T344 2
others[1] 76 1 T7 4 T98 2 T126 2
others[2] 68 1 T16 2 T93 2 T114 2
others[3] 42 1 T126 2 T357 2 T358 2
others[4] 52 1 T65 2 T107 2 T345 2
others[5] 74 1 T16 4 T126 4 T279 2
others[6] 44 1 T65 2 T225 2 T126 2
others[7] 60 1 T6 2 T59 2 T93 2
false 9050 1 T1 2 T2 2 T3 1
true 16402 1 T1 4 T2 5 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 27 1 T9 1 T241 1 T18 3
others[1] 26 1 T240 1 T212 1 T310 2
others[2] 21 1 T18 1 T196 1 T346 2
others[3] 26 1 T9 1 T18 1 T19 1
others[4] 48 1 T14 2 T72 3 T224 1
others[5] 31 1 T14 2 T18 2 T355 1
others[6] 31 1 T14 1 T15 1 T17 1
others[7] 44 1 T3 2 T72 1 T224 1
false 11247 1 T1 2 T2 2 T3 17
true 18445 1 T1 4 T2 5 T3 25


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 106 1 T91 2 T107 2 T184 2
others[1] 64 1 T65 4 T91 2 T225 2
others[2] 98 1 T16 2 T50 2 T71 2
others[3] 90 1 T93 2 T98 2 T359 2
others[4] 76 1 T7 2 T71 2 T98 4
others[5] 96 1 T16 2 T98 2 T114 2
others[6] 76 1 T65 2 T94 2 T98 2
others[7] 130 1 T3 2 T65 4 T91 2
false 7719 1 T1 2 T2 2 T3 1
true 16325 1 T1 4 T2 5 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 28 1 T9 1 T15 1 T225 2
others[1] 22 1 T114 2 T220 1 T212 1
others[2] 37 1 T14 3 T17 1 T240 1
others[3] 36 1 T9 1 T196 1 T349 2
others[4] 37 1 T14 1 T224 1 T18 3
others[5] 50 1 T70 2 T17 1 T72 1
others[6] 35 1 T107 2 T196 1 T19 2
others[7] 49 1 T3 2 T9 1 T240 2
false 11205 1 T1 2 T2 2 T3 17
true 18434 1 T1 4 T2 5 T3 27


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 38 1 T70 2 T186 2 T162 2
others[1] 36 1 T16 2 T92 2 T186 2
others[2] 34 1 T114 4 T184 2 T187 4
others[3] 38 1 T50 2 T185 2 T346 2
others[4] 30 1 T65 2 T27 4 T350 2
others[5] 32 1 T162 2 T349 2 T360 2
others[6] 36 1 T114 2 T162 2 T343 2
others[7] 54 1 T16 2 T27 2 T348 2
false 9638 1 T1 2 T2 2 T3 17
true 16365 1 T1 4 T2 5 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 72 1 T3 2 T94 2 T98 4
others[1] 74 1 T6 2 T16 2 T65 4
others[2] 78 1 T65 2 T91 2 T70 2
others[3] 92 1 T7 2 T92 2 T98 4
others[4] 90 1 T93 2 T71 2 T94 2
others[5] 86 1 T7 2 T114 6 T343 2
others[6] 80 1 T7 2 T65 2 T91 2
others[7] 106 1 T7 2 T65 2 T98 6
false 7175 1 T1 1 T2 2 T3 2
true 16193 1 T1 4 T2 5 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T65 4 T71 2 T94 2
others[1] 82 1 T98 2 T107 2 T351 2
others[2] 76 1 T98 4 T107 2 T186 2
others[3] 96 1 T6 2 T7 2 T65 6
others[4] 80 1 T114 2 T345 2 T186 4
others[5] 60 1 T91 2 T361 2 T279 2
others[6] 72 1 T6 2 T16 2 T65 2
others[7] 96 1 T98 2 T185 2 T360 2
false 7175 1 T1 1 T2 2 T3 2
true 16193 1 T1 4 T2 5 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T98 2 T221 2 T279 4
others[1] 76 1 T98 4 T114 2 T342 2
others[2] 90 1 T16 4 T33 2 T71 2
others[3] 60 1 T94 2 T107 4 T114 4
others[4] 84 1 T221 4 T243 2 T362 2
others[5] 70 1 T98 4 T351 2 T186 2
others[6] 76 1 T59 2 T16 2 T98 2
others[7] 98 1 T7 4 T91 2 T98 2
false 6564 1 T1 1 T2 2 T3 8
true 16190 1 T1 4 T2 5 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 78 1 T65 2 T98 6 T342 2
others[1] 78 1 T33 2 T70 4 T114 2
others[2] 110 1 T16 2 T65 2 T98 4
others[3] 52 1 T16 4 T98 2 T185 2
others[4] 76 1 T7 2 T16 2 T91 2
others[5] 90 1 T3 2 T6 2 T7 2
others[6] 68 1 T16 2 T93 2 T98 2
others[7] 102 1 T65 2 T94 2 T225 2
false 6564 1 T1 1 T2 2 T3 8
true 16190 1 T1 4 T2 5 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 58 1 T65 2 T50 2 T91 2
others[1] 56 1 T3 2 T93 2 T94 2
others[2] 68 1 T65 2 T98 4 T114 2
others[3] 54 1 T7 2 T65 2 T91 2
others[4] 72 1 T16 2 T91 2 T70 2
others[5] 62 1 T7 2 T71 2 T98 2
others[6] 48 1 T184 2 T342 2 T221 2
others[7] 60 1 T65 2 T98 4 T186 4
false 6891 1 T1 1 T2 2 T3 4
true 17471 1 T1 4 T2 6 T3 21


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 64 1 T7 4 T16 2 T98 2
others[1] 58 1 T16 2 T93 4 T98 2
others[2] 60 1 T3 2 T65 2 T107 2
others[3] 66 1 T65 2 T94 2 T98 2
others[4] 66 1 T65 2 T93 2 T94 2
others[5] 66 1 T3 2 T16 2 T98 2
others[6] 62 1 T91 2 T98 2 T114 2
others[7] 80 1 T16 2 T50 2 T94 2
false 6891 1 T1 1 T2 2 T3 4
true 17471 1 T1 4 T2 6 T3 21


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 44 1 T14 2 T72 1 T18 1
others[1] 28 1 T224 1 T18 1 T220 1
others[2] 46 1 T65 2 T17 1 T72 1
others[3] 35 1 T98 2 T196 1 T218 1
others[4] 28 1 T3 2 T14 1 T72 1
others[5] 32 1 T14 1 T240 1 T220 1
others[6] 18 1 T363 1 T364 1 T365 1
others[7] 45 1 T15 1 T241 1 T107 2
false 11442 1 T1 3 T2 2 T3 18
true 18588 1 T1 5 T2 5 T3 27


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T98 2 T184 2 T351 2
others[1] 102 1 T6 2 T59 2 T16 2
others[2] 92 1 T7 2 T33 2 T94 2
others[3] 70 1 T3 2 T16 2 T65 2
others[4] 94 1 T16 4 T98 4 T107 2
others[5] 104 1 T16 2 T70 2 T107 2
others[6] 64 1 T98 2 T114 2 T126 2
others[7] 108 1 T3 2 T91 2 T93 2
false 7787 1 T1 3 T2 2 T3 1
true 16368 1 T1 5 T2 5 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 34 1 T9 1 T14 2 T240 1
others[1] 28 1 T17 1 T72 1 T198 2
others[2] 31 1 T14 1 T224 1 T196 1
others[3] 31 1 T9 2 T212 1 T304 1
others[4] 40 1 T15 1 T224 1 T107 2
others[5] 28 1 T14 2 T17 1 T72 2
others[6] 33 1 T18 1 T186 2 T212 1
others[7] 50 1 T14 1 T18 2 T196 1
false 13875 1 T1 4 T2 4 T3 19
true 2220 1 T2 1 T3 8 T6 5

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%