Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
84.44 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv



Summary for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 18 1 17 94.44
Crosses 72 13 59 81.94


Variables for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
err_code_vals 7 1 6 85.71 100 1 1 0
partition 11 0 11 100.00 100 1 1 0


Crosses for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
dai_err_code_for_all_partitions 72 13 59 81.94 100 1 1 0


Summary for Variable err_code_vals

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 7 1 6 85.71


User Defined Bins for err_code_vals

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
macro_err 0 1 1


Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_err 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err 43255 1 T1 25 T2 166 T6 44
access_err 62378 1 T1 111 T2 504 T4 37
write_blank_err 422 1 T1 1 T99 1 T12 1
ecc_uncorr_err 68915 1 T1 461 T6 44 T99 712
ecc_corr_err 1539 1 T6 7 T8 54 T128 5
no_err 89357 1 T1 165 T2 761 T3 24



Summary for Variable partition

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 11 0 11 100.00


User Defined Bins for partition

Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_idx 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
life_cycle 639 1 T1 4 T12 6 T13 6
secret2 23776 1 T1 25 T2 291 T4 30
secret1 27184 1 T1 37 T2 112 T3 4
secret0 35240 1 T1 487 T2 113 T3 7
hw_cfg1 41872 1 T1 19 T2 140 T3 2
hw_cfg0 23806 1 T1 42 T2 116 T4 28
rot_creator_auth_state 21252 1 T1 18 T2 118 T3 3
rot_creator_auth_codesign 21741 1 T1 29 T2 121 T3 3
owner_sw_cfg 19259 1 T1 32 T2 159 T3 2
creator_sw_cfg 19256 1 T1 18 T2 97 T4 14
vendor_test 31841 1 T1 52 T2 164 T3 3



Summary for Cross dai_err_code_for_all_partitions

Samples crossed: err_code_vals partition
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
TOTAL 72 13 59 81.94 13
Automatically Generated Cross Bins 72 13 59 81.94 13
User Defined Cross Bins 0 0 0


Automatically Generated Cross Bins for dai_err_code_for_all_partitions

Uncovered bins
err_code_valspartitionCOUNTAT LEASTNUMBERSTATUS
[fsm_err] [life_cycle] 0 1 1
[ecc_corr_err] [vendor_test] 0 1 1
[macro_err] [secret2 , secret1 , secret0 , hw_cfg1 , hw_cfg0 , rot_creator_auth_state , rot_creator_auth_codesign , owner_sw_cfg , creator_sw_cfg , vendor_test] -- -- 10
[no_err] [life_cycle] 0 1 1


Covered bins
err_code_valspartitionCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err secret2 4043 1 T2 166 T154 37 T337 504
fsm_err secret1 4321 1 T200 305 T91 370 T226 133
fsm_err secret0 3925 1 T222 53 T91 60 T142 19
fsm_err hw_cfg1 4087 1 T11 70 T338 78 T339 84
fsm_err hw_cfg0 2819 1 T141 107 T132 112 T340 186
fsm_err rot_creator_auth_state 2998 1 T153 3 T341 91 T132 78
fsm_err rot_creator_auth_codesign 2937 1 T190 342 T193 49 T56 410
fsm_err owner_sw_cfg 2156 1 T158 15 T90 289 T342 139
fsm_err creator_sw_cfg 1665 1 T6 21 T185 46 T343 256
fsm_err vendor_test 14304 1 T1 25 T6 23 T14 531
access_err life_cycle 639 1 T1 4 T12 6 T13 6
access_err secret2 10768 1 T1 5 T2 99 T4 18
access_err secret1 6315 1 T1 13 T5 5 T8 4
access_err secret0 5020 1 T1 12 T2 4 T4 1
access_err hw_cfg1 1320 1 T1 5 T2 10 T4 2
access_err hw_cfg0 2237 1 T1 15 T2 1 T5 3
access_err rot_creator_auth_state 5880 1 T1 2 T2 77 T4 4
access_err rot_creator_auth_codesign 8083 1 T1 15 T2 66 T4 2
access_err owner_sw_cfg 6846 1 T1 21 T2 102 T4 2
access_err creator_sw_cfg 7714 1 T1 9 T2 50 T5 3
access_err vendor_test 7556 1 T1 10 T2 95 T4 8
write_blank_err secret2 8 1 T85 1 T344 1 T345 1
write_blank_err secret1 22 1 T11 1 T91 1 T346 1
write_blank_err secret0 45 1 T1 1 T12 1 T31 1
write_blank_err hw_cfg1 78 1 T99 1 T13 1 T90 1
write_blank_err hw_cfg0 18 1 T159 1 T346 2 T347 1
write_blank_err rot_creator_auth_state 141 1 T31 1 T90 4 T91 7
write_blank_err rot_creator_auth_codesign 47 1 T91 2 T198 1 T248 8
write_blank_err owner_sw_cfg 28 1 T90 1 T150 2 T59 1
write_blank_err creator_sw_cfg 20 1 T31 1 T150 5 T345 3
write_blank_err vendor_test 15 1 T91 1 T198 2 T151 3
ecc_uncorr_err secret2 3544 1 T128 26 T165 29 T166 63
ecc_uncorr_err secret1 7792 1 T128 9 T158 31 T11 58
ecc_uncorr_err secret0 17875 1 T1 461 T12 569 T158 30
ecc_uncorr_err hw_cfg1 25349 1 T6 6 T99 712 T13 300
ecc_uncorr_err hw_cfg0 6101 1 T158 85 T159 700 T165 26
ecc_uncorr_err rot_creator_auth_state 3935 1 T128 11 T154 71 T31 580
ecc_uncorr_err rot_creator_auth_codesign 1615 1 T158 33 T154 36 T166 52
ecc_uncorr_err owner_sw_cfg 807 1 T6 25 T154 39 T217 73
ecc_uncorr_err creator_sw_cfg 1897 1 T6 13 T128 10 T158 31
ecc_corr_err secret2 84 1 T8 2 T158 1 T154 2
ecc_corr_err secret1 99 1 T6 3 T8 3 T158 1
ecc_corr_err secret0 195 1 T6 3 T8 8 T154 3
ecc_corr_err hw_cfg1 349 1 T8 29 T128 1 T158 6
ecc_corr_err hw_cfg0 315 1 T8 7 T165 3 T36 5
ecc_corr_err rot_creator_auth_state 110 1 T6 1 T165 4 T36 4
ecc_corr_err rot_creator_auth_codesign 161 1 T8 4 T128 1 T158 1
ecc_corr_err owner_sw_cfg 103 1 T128 3 T158 2 T36 5
ecc_corr_err creator_sw_cfg 123 1 T8 1 T158 1 T36 2
no_err secret2 5329 1 T1 20 T2 26 T4 12
no_err secret1 8635 1 T1 24 T2 112 T3 4
no_err secret0 8180 1 T1 13 T2 109 T3 7
no_err hw_cfg1 10689 1 T1 14 T2 130 T3 2
no_err hw_cfg0 12316 1 T1 27 T2 115 T4 28
no_err rot_creator_auth_state 8188 1 T1 16 T2 41 T3 3
no_err rot_creator_auth_codesign 8898 1 T1 14 T2 55 T3 3
no_err owner_sw_cfg 9319 1 T1 11 T2 57 T3 2
no_err creator_sw_cfg 7837 1 T1 9 T2 47 T4 14
no_err vendor_test 9966 1 T1 17 T2 69 T3 3


User Defined Cross Bins for dai_err_code_for_all_partitions

Excluded/Illegal bins
NAMECOUNTSTATUS
vendor_test_ecc_uncorrectable_err 0 Illegal
life_cycle_ignore 0 Excluded

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