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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14759 1 T1 4 T2 14 T3 13


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14759 1 T1 4 T2 14 T3 13


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10582 1 T1 1 T2 13 T3 9
true 17212 1 T1 4 T2 18 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 11509 1 T1 1 T2 13 T3 9
true 17275 1 T1 4 T2 18 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 78 1 T24 2 T101 2 T70 2
others[1] 98 1 T96 2 T104 2 T69 2
others[2] 100 1 T34 2 T95 2 T99 2
others[3] 66 1 T338 2 T252 2 T255 2
others[4] 108 1 T34 2 T97 2 T100 2
others[5] 82 1 T24 2 T101 4 T49 4
others[6] 124 1 T24 2 T34 4 T95 2
others[7] 102 1 T96 2 T71 2 T97 4
false 14759 1 T1 4 T2 14 T3 13


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 108 1 T95 2 T101 2 T70 4
others[1] 86 1 T101 2 T70 2 T55 2
others[2] 92 1 T178 2 T42 2 T165 2
others[3] 84 1 T24 2 T101 2 T70 6
others[4] 86 1 T24 2 T95 2 T179 2
others[5] 92 1 T69 2 T70 2 T94 2
others[6] 88 1 T95 2 T96 2 T71 2
others[7] 110 1 T97 2 T105 2 T100 2
false 14759 1 T1 4 T2 14 T3 13


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 114 1 T95 2 T104 2 T97 2
others[1] 118 1 T97 2 T99 2 T101 2
others[2] 120 1 T70 2 T159 2 T290 2
others[3] 98 1 T70 8 T165 2 T339 2
others[4] 76 1 T34 4 T101 2 T70 4
others[5] 68 1 T8 2 T70 2 T340 2
others[6] 82 1 T98 2 T70 2 T49 2
others[7] 112 1 T96 2 T71 2 T97 2
false 14759 1 T1 4 T2 14 T3 13


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 52 1 T252 2 T137 2 T341 2
others[1] 70 1 T8 2 T99 2 T291 2
others[2] 74 1 T95 6 T70 2 T140 2
others[3] 62 1 T24 2 T97 2 T179 2
others[4] 78 1 T69 2 T97 2 T339 2
others[5] 60 1 T34 2 T96 2 T159 2
others[6] 56 1 T97 2 T342 2 T343 2
others[7] 76 1 T8 2 T24 2 T34 2
false 14759 1 T1 4 T2 14 T3 13


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 100 1 T101 2 T70 4 T290 2
others[1] 92 1 T96 2 T94 2 T178 2
others[2] 124 1 T70 2 T178 2 T55 2
others[3] 86 1 T101 4 T291 2 T339 2
others[4] 102 1 T104 2 T101 2 T159 2
others[5] 96 1 T34 2 T70 2 T212 2
others[6] 114 1 T95 2 T97 2 T100 2
others[7] 108 1 T34 2 T104 2 T97 2
false 14759 1 T1 4 T2 14 T3 13


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 42 1 T101 4 T140 2 T338 2
others[1] 46 1 T105 2 T100 2 T101 2
others[2] 40 1 T101 4 T70 2 T344 2
others[3] 40 1 T97 4 T100 2 T185 2
others[4] 34 1 T71 2 T100 2 T178 2
others[5] 36 1 T101 2 T180 2 T345 2
others[6] 42 1 T70 2 T140 2 T180 2
others[7] 50 1 T70 4 T346 2 T347 2
false 14759 1 T1 4 T2 14 T3 13


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 104 1 T101 2 T70 6 T348 2
others[1] 92 1 T8 2 T96 2 T55 2
others[2] 88 1 T34 4 T97 2 T165 2
others[3] 108 1 T97 4 T100 2 T101 2
others[4] 102 1 T71 2 T99 2 T100 4
others[5] 98 1 T223 2 T55 2 T140 2
others[6] 102 1 T96 2 T98 2 T101 2
others[7] 128 1 T97 2 T101 2 T70 2
false 14759 1 T1 4 T2 14 T3 13


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 104 1 T24 2 T104 2 T70 2
others[1] 88 1 T8 2 T34 2 T97 4
others[2] 114 1 T97 4 T99 2 T70 2
others[3] 110 1 T8 2 T98 2 T100 2
others[4] 110 1 T24 2 T101 4 T70 4
others[5] 112 1 T95 2 T96 2 T70 4
others[6] 78 1 T71 2 T97 2 T349 2
others[7] 134 1 T8 2 T97 2 T70 4
false 14759 1 T1 4 T2 14 T3 13


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 116 1 T96 2 T99 2 T338 4
others[1] 114 1 T95 2 T99 2 T105 2
others[2] 104 1 T100 2 T101 2 T338 2
others[3] 90 1 T105 4 T179 4 T350 2
others[4] 114 1 T34 2 T97 2 T70 2
others[5] 86 1 T24 2 T34 2 T96 2
others[6] 120 1 T97 2 T70 4 T178 4
others[7] 110 1 T8 2 T101 2 T70 2
false 14759 1 T1 4 T2 14 T3 13


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 118 1 T96 2 T71 2 T97 2
others[1] 114 1 T34 2 T97 2 T101 4
others[2] 108 1 T104 2 T101 2 T70 2
others[3] 94 1 T95 2 T97 2 T212 2
others[4] 116 1 T8 2 T34 2 T97 2
others[5] 90 1 T8 2 T104 2 T101 2
others[6] 82 1 T157 2 T290 2 T178 2
others[7] 118 1 T8 2 T24 2 T34 2
false 14759 1 T1 4 T2 14 T3 13


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T8 2 T70 2 T159 2
others[1] 100 1 T97 2 T70 2 T179 4
others[2] 76 1 T70 2 T349 2 T351 2
others[3] 90 1 T71 2 T100 2 T70 2
others[4] 98 1 T97 2 T70 2 T159 2
others[5] 88 1 T34 2 T96 2 T97 2
others[6] 126 1 T34 2 T101 2 T291 2
others[7] 106 1 T95 2 T97 2 T223 2
false 14759 1 T1 4 T2 14 T3 13


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 45 1 T101 2 T122 2 T131 1
others[1] 31 1 T2 1 T33 1 T239 1
others[2] 28 1 T8 2 T14 1 T240 2
others[3] 33 1 T2 1 T239 1 T300 1
others[4] 49 1 T14 1 T101 2 T131 1
others[5] 41 1 T6 1 T14 1 T130 1
others[6] 25 1 T142 2 T310 1 T302 1
others[7] 39 1 T240 1 T131 2 T352 1
false 14758 1 T1 4 T2 14 T3 13
true 2455 1 T2 3 T3 2 T4 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 32 1 T6 1 T101 2 T122 1
others[1] 42 1 T239 1 T240 1 T131 3
others[2] 39 1 T8 2 T14 1 T131 1
others[3] 39 1 T2 1 T14 1 T240 1
others[4] 38 1 T339 2 T142 1 T300 1
others[5] 32 1 T14 1 T131 1 T16 1
others[6] 30 1 T101 2 T122 1 T130 1
others[7] 38 1 T2 1 T33 1 T239 1
false 11956 1 T1 1 T2 13 T3 9
true 19653 1 T1 4 T2 20 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T101 2 T70 2 T140 2
others[1] 78 1 T69 2 T97 2 T255 2
others[2] 126 1 T24 2 T34 2 T95 2
others[3] 82 1 T34 4 T96 2 T71 2
others[4] 82 1 T99 2 T100 2 T101 2
others[5] 82 1 T104 2 T100 2 T49 2
others[6] 86 1 T95 2 T96 2 T101 2
others[7] 126 1 T24 4 T34 2 T97 2
false 7896 1 T1 1 T2 13 T3 9
true 17312 1 T1 4 T2 18 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T71 2 T104 2 T70 2
others[1] 86 1 T95 2 T101 2 T70 8
others[2] 100 1 T24 4 T95 2 T42 2
others[3] 82 1 T70 2 T179 2 T339 2
others[4] 72 1 T96 2 T70 2 T179 2
others[5] 122 1 T69 2 T105 2 T100 2
others[6] 86 1 T101 4 T291 2 T178 2
others[7] 100 1 T95 2 T97 2 T225 2
false 7015 1 T1 1 T2 13 T3 3
true 17070 1 T1 4 T2 18 T3 14


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 102 1 T70 4 T159 2 T179 4
others[1] 78 1 T8 2 T97 4 T70 2
others[2] 88 1 T34 2 T98 2 T70 2
others[3] 104 1 T70 2 T49 2 T165 2
others[4] 92 1 T104 2 T97 2 T101 2
others[5] 108 1 T96 2 T99 2 T70 4
others[6] 88 1 T34 2 T95 2 T70 2
others[7] 128 1 T71 2 T101 2 T159 2
false 7529 1 T1 1 T2 13 T3 3
true 17106 1 T1 4 T2 18 T3 14


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 29 1 T6 1 T125 1 T122 1
others[1] 45 1 T14 1 T33 1 T164 1
others[2] 34 1 T14 1 T122 1 T131 1
others[3] 30 1 T125 1 T101 2 T122 1
others[4] 39 1 T6 1 T122 2 T131 1
others[5] 34 1 T6 1 T122 1 T240 1
others[6] 38 1 T122 2 T240 1 T131 1
others[7] 37 1 T125 1 T122 1 T159 2
false 11899 1 T1 1 T2 13 T3 9
true 19630 1 T1 4 T2 20 T3 18


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 62 1 T165 2 T179 2 T339 2
others[1] 74 1 T69 2 T353 2 T257 2
others[2] 58 1 T8 2 T95 4 T291 2
others[3] 62 1 T8 2 T24 2 T34 2
others[4] 78 1 T95 2 T97 2 T70 2
others[5] 60 1 T97 2 T349 2 T339 2
others[6] 64 1 T24 2 T97 2 T99 2
others[7] 70 1 T34 2 T96 2 T255 2
false 9113 1 T1 1 T2 13 T3 9
true 17297 1 T1 4 T2 18 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 24 1 T131 1 T221 1 T142 1
others[1] 33 1 T14 1 T122 1 T240 1
others[2] 44 1 T122 2 T239 1 T240 1
others[3] 27 1 T2 1 T14 1 T125 1
others[4] 24 1 T6 1 T33 2 T130 2
others[5] 35 1 T122 1 T240 2 T142 1
others[6] 40 1 T14 1 T122 1 T130 1
others[7] 30 1 T125 1 T122 2 T179 2
false 11853 1 T1 1 T2 13 T3 9
true 19590 1 T1 4 T2 20 T3 18


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 112 1 T95 2 T97 2 T212 2
others[1] 70 1 T101 2 T342 2 T354 2
others[2] 124 1 T104 2 T100 2 T101 4
others[3] 104 1 T101 2 T70 2 T159 2
others[4] 88 1 T96 2 T70 4 T179 2
others[5] 92 1 T97 2 T100 2 T70 2
others[6] 110 1 T34 4 T99 2 T101 2
others[7] 122 1 T104 2 T101 2 T178 4
false 7881 1 T1 1 T2 13 T3 9
true 17227 1 T1 4 T2 18 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 31 1 T33 1 T122 1 T130 1
others[1] 48 1 T2 1 T70 2 T131 2
others[2] 42 1 T14 1 T130 1 T240 1
others[3] 31 1 T14 1 T95 2 T33 1
others[4] 35 1 T125 1 T159 2 T240 2
others[5] 36 1 T125 1 T33 1 T122 1
others[6] 48 1 T122 2 T131 1 T164 1
others[7] 38 1 T5 2 T122 1 T221 1
false 11801 1 T1 1 T2 13 T3 9
true 19550 1 T1 4 T2 19 T3 19


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 38 1 T100 2 T101 2 T70 2
others[1] 24 1 T101 4 T347 2 T355 2
others[2] 48 1 T180 2 T185 2 T356 2
others[3] 46 1 T105 2 T140 4 T179 2
others[4] 46 1 T101 2 T70 2 T140 2
others[5] 36 1 T100 2 T101 2 T178 2
others[6] 48 1 T71 2 T100 2 T101 2
others[7] 44 1 T97 4 T70 6 T180 2
false 10220 1 T1 1 T2 13 T3 9
true 17274 1 T1 4 T2 18 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 128 1 T96 2 T97 2 T70 6
others[1] 84 1 T101 2 T92 2 T55 2
others[2] 94 1 T34 2 T96 2 T70 4
others[3] 90 1 T71 2 T98 2 T101 2
others[4] 88 1 T34 2 T97 2 T99 2
others[5] 104 1 T100 4 T101 2 T165 2
others[6] 112 1 T101 2 T92 2 T290 2
others[7] 122 1 T8 2 T97 4 T101 2
false 7105 1 T1 1 T2 13 T3 6
true 17070 1 T1 4 T2 18 T3 15


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T8 2 T95 2 T96 2
others[1] 116 1 T97 4 T101 4 T70 4
others[2] 88 1 T97 2 T98 2 T105 2
others[3] 112 1 T101 2 T70 2 T165 2
others[4] 108 1 T71 2 T104 2 T97 2
others[5] 102 1 T24 2 T70 4 T49 4
others[6] 102 1 T8 4 T101 2 T70 4
others[7] 124 1 T24 2 T34 2 T97 2
false 7105 1 T1 1 T2 13 T3 6
true 17070 1 T1 4 T2 18 T3 15


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 108 1 T105 4 T100 2 T165 2
others[1] 76 1 T34 2 T178 4 T353 2
others[2] 112 1 T96 2 T70 2 T291 2
others[3] 68 1 T96 2 T70 2 T55 2
others[4] 118 1 T34 2 T97 2 T70 2
others[5] 92 1 T49 2 T342 2 T338 2
others[6] 140 1 T8 2 T24 2 T97 2
others[7] 140 1 T95 2 T99 2 T105 2
false 6549 1 T1 1 T2 13 T3 7
true 17067 1 T1 4 T2 18 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 104 1 T34 2 T95 2 T71 2
others[1] 88 1 T34 2 T100 2 T70 2
others[2] 104 1 T101 2 T70 4 T159 2
others[3] 98 1 T8 2 T24 2 T34 2
others[4] 98 1 T8 2 T97 2 T70 2
others[5] 120 1 T97 2 T101 2 T178 2
others[6] 116 1 T104 2 T101 4 T70 2
others[7] 112 1 T8 2 T95 2 T96 2
false 6549 1 T1 1 T2 13 T3 7
true 17067 1 T1 4 T2 18 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 58 1 T69 2 T97 2 T165 2
others[1] 72 1 T95 2 T70 6 T94 2
others[2] 54 1 T70 2 T178 2 T353 2
others[3] 86 1 T70 2 T349 2 T180 4
others[4] 88 1 T105 2 T101 2 T178 2
others[5] 82 1 T104 2 T97 2 T70 6
others[6] 78 1 T8 2 T70 2 T92 2
others[7] 58 1 T101 2 T70 2 T346 2
false 7062 1 T1 1 T2 12 T3 4
true 18510 1 T1 4 T2 23 T3 16


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 72 1 T95 2 T97 4 T101 2
others[1] 48 1 T34 2 T70 2 T55 2
others[2] 68 1 T34 4 T97 2 T101 2
others[3] 60 1 T339 2 T180 2 T342 6
others[4] 66 1 T70 2 T349 2 T351 2
others[5] 76 1 T70 2 T92 2 T55 2
others[6] 72 1 T70 2 T92 2 T94 2
others[7] 68 1 T34 2 T95 2 T70 2
false 7062 1 T1 1 T2 12 T3 4
true 18510 1 T1 4 T2 23 T3 16


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 39 1 T101 2 T122 1 T131 1
others[1] 40 1 T2 1 T14 1 T157 2
others[2] 26 1 T125 1 T130 1 T131 1
others[3] 31 1 T6 1 T101 2 T130 1
others[4] 46 1 T2 1 T14 1 T239 1
others[5] 28 1 T6 1 T130 1 T131 1
others[6] 32 1 T70 2 T122 1 T130 1
others[7] 49 1 T33 1 T122 1 T130 1
false 12032 1 T1 2 T2 13 T3 9
true 19737 1 T1 5 T2 20 T3 18


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 100 1 T8 2 T95 2 T96 2
others[1] 94 1 T97 4 T70 2 T140 2
others[2] 88 1 T97 2 T101 2 T70 4
others[3] 118 1 T34 2 T105 2 T159 2
others[4] 98 1 T34 2 T101 2 T70 2
others[5] 98 1 T97 2 T223 2 T165 2
others[6] 82 1 T159 2 T349 4 T357 2
others[7] 102 1 T71 2 T100 2 T70 2
false 7853 1 T1 1 T2 13 T3 9
true 17283 1 T1 4 T2 18 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 36 1 T125 1 T221 1 T358 2
others[1] 33 1 T125 1 T101 2 T131 1
others[2] 46 1 T6 1 T122 2 T239 1
others[3] 31 1 T122 1 T240 1 T131 1
others[4] 41 1 T6 1 T125 1 T122 1
others[5] 30 1 T33 1 T164 1 T221 2
others[6] 32 1 T14 1 T122 3 T131 2
others[7] 38 1 T6 1 T14 1 T122 2
false 14759 1 T1 4 T2 14 T3 13
true 2473 1 T2 3 T3 1 T4 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%