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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13999 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13999 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 9993 1 T1 3 T2 2 T3 1
true 16412 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10911 1 T1 4 T2 2 T3 1
true 16482 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T7 2 T59 2 T93 2
others[1] 76 1 T12 2 T7 2 T203 2
others[2] 92 1 T7 12 T59 2 T200 2
others[3] 88 1 T12 2 T7 2 T59 2
others[4] 102 1 T95 2 T105 2 T236 2
others[5] 88 1 T7 2 T59 2 T93 2
others[6] 96 1 T5 2 T12 2 T59 2
others[7] 76 1 T12 2 T7 2 T91 2
false 13999 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T12 4 T7 2 T93 2
others[1] 74 1 T12 2 T7 2 T236 2
others[2] 94 1 T7 4 T59 2 T93 2
others[3] 82 1 T5 2 T7 2 T93 2
others[4] 66 1 T12 4 T92 2 T93 2
others[5] 88 1 T7 2 T59 2 T95 4
others[6] 116 1 T7 2 T59 4 T93 2
others[7] 94 1 T5 2 T59 2 T44 4
false 13999 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 122 1 T7 2 T95 2 T201 4
others[1] 90 1 T7 4 T105 2 T200 2
others[2] 68 1 T12 2 T7 2 T93 2
others[3] 108 1 T12 2 T7 4 T95 2
others[4] 90 1 T7 2 T59 2 T394 2
others[5] 78 1 T12 2 T7 2 T95 2
others[6] 78 1 T91 2 T59 2 T95 2
others[7] 100 1 T12 2 T59 2 T94 2
false 13999 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 66 1 T7 2 T59 2 T95 2
others[1] 64 1 T12 2 T59 2 T395 2
others[2] 64 1 T7 4 T92 2 T95 4
others[3] 72 1 T7 2 T91 2 T59 2
others[4] 52 1 T12 2 T7 2 T203 2
others[5] 52 1 T12 2 T7 2 T59 4
others[6] 80 1 T12 4 T7 4 T59 2
others[7] 76 1 T12 2 T59 2 T92 2
false 13999 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 106 1 T12 4 T7 2 T91 2
others[1] 86 1 T92 4 T95 2 T142 2
others[2] 80 1 T12 4 T7 2 T92 2
others[3] 96 1 T12 4 T7 2 T59 4
others[4] 110 1 T7 2 T59 4 T93 2
others[5] 92 1 T5 2 T12 2 T7 4
others[6] 82 1 T5 2 T38 2 T202 2
others[7] 116 1 T12 6 T7 2 T59 2
false 13999 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 44 1 T12 2 T38 2 T95 2
others[1] 36 1 T7 2 T95 2 T396 2
others[2] 40 1 T12 4 T7 2 T97 2
others[3] 30 1 T12 2 T97 2 T394 2
others[4] 42 1 T12 2 T7 2 T94 2
others[5] 30 1 T394 2 T397 2 T84 4
others[6] 44 1 T7 2 T38 4 T59 2
others[7] 30 1 T7 2 T204 2 T398 2
false 13999 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T12 2 T7 2 T59 2
others[1] 80 1 T7 2 T93 2 T236 2
others[2] 94 1 T7 2 T59 4 T98 2
others[3] 86 1 T59 2 T97 4 T200 2
others[4] 88 1 T12 2 T7 2 T59 2
others[5] 98 1 T12 2 T7 2 T91 2
others[6] 90 1 T7 4 T92 2 T97 2
others[7] 108 1 T5 2 T12 2 T7 2
false 13999 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T12 2 T91 2 T95 2
others[1] 100 1 T12 2 T7 4 T98 4
others[2] 98 1 T7 2 T59 2 T92 2
others[3] 88 1 T7 2 T93 2 T95 2
others[4] 104 1 T12 2 T7 4 T91 2
others[5] 112 1 T5 2 T12 2 T7 2
others[6] 80 1 T59 2 T97 2 T122 2
others[7] 90 1 T95 6 T105 4 T399 2
false 13999 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 108 1 T12 4 T7 2 T92 2
others[1] 90 1 T12 2 T7 6 T398 4
others[2] 68 1 T95 2 T97 2 T394 2
others[3] 80 1 T200 2 T400 2 T142 2
others[4] 86 1 T203 2 T142 2 T401 2
others[5] 70 1 T59 2 T94 2 T95 2
others[6] 98 1 T12 2 T7 4 T59 2
others[7] 86 1 T12 2 T92 2 T96 2
false 13999 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T7 2 T94 2 T236 2
others[1] 86 1 T12 4 T91 4 T95 2
others[2] 88 1 T7 2 T94 2 T95 2
others[3] 62 1 T91 2 T59 2 T95 2
others[4] 98 1 T12 4 T59 2 T93 2
others[5] 102 1 T5 2 T92 2 T44 4
others[6] 104 1 T5 2 T12 2 T7 2
others[7] 106 1 T12 2 T7 4 T59 6
false 13999 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T12 2 T105 2 T202 2
others[1] 90 1 T12 2 T95 2 T44 2
others[2] 90 1 T7 2 T91 2 T92 2
others[3] 116 1 T5 2 T7 4 T59 2
others[4] 82 1 T12 2 T7 8 T59 2
others[5] 94 1 T7 4 T91 2 T59 2
others[6] 74 1 T7 2 T59 2 T94 2
others[7] 114 1 T5 2 T12 4 T7 2
false 13999 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 42 1 T14 3 T133 1 T15 1
others[1] 30 1 T7 2 T8 1 T9 1
others[2] 49 1 T7 2 T59 2 T93 2
others[3] 48 1 T12 2 T8 1 T9 1
others[4] 33 1 T9 2 T14 1 T16 1
others[5] 47 1 T9 1 T133 1 T15 1
others[6] 25 1 T14 1 T15 1 T134 1
others[7] 49 1 T8 1 T59 2 T14 2
false 13999 1 T1 4 T2 3 T3 4
true 2303 1 T1 1 T5 5 T11 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 45 1 T9 2 T14 1 T15 3
others[1] 31 1 T7 2 T14 1 T133 1
others[2] 55 1 T8 1 T9 2 T59 2
others[3] 35 1 T59 2 T14 1 T134 2
others[4] 45 1 T9 1 T93 2 T14 4
others[5] 40 1 T8 1 T14 1 T133 1
others[6] 34 1 T12 2 T7 2 T14 1
others[7] 39 1 T8 1 T14 3 T44 2
false 11377 1 T1 4 T2 2 T3 1
true 18698 1 T1 5 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 78 1 T7 2 T59 2 T93 2
others[1] 102 1 T7 4 T59 4 T95 2
others[2] 82 1 T12 2 T7 2 T97 2
others[3] 68 1 T7 2 T44 2 T402 2
others[4] 100 1 T12 2 T94 2 T236 2
others[5] 88 1 T7 6 T91 2 T95 2
others[6] 82 1 T12 4 T7 2 T59 4
others[7] 106 1 T5 2 T7 4 T59 2
false 7821 1 T1 2 T2 2 T3 1
true 16534 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 64 1 T92 2 T200 2 T203 2
others[1] 102 1 T5 2 T7 4 T93 4
others[2] 92 1 T5 2 T12 2 T59 2
others[3] 74 1 T12 2 T7 2 T59 2
others[4] 78 1 T12 4 T7 2 T59 2
others[5] 76 1 T7 4 T59 2 T95 2
others[6] 82 1 T12 2 T7 2 T200 2
others[7] 130 1 T59 2 T93 2 T95 4
false 6754 1 T1 1 T2 1 T3 1
true 16297 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T7 4 T401 2 T403 2
others[1] 78 1 T200 2 T201 2 T202 2
others[2] 88 1 T12 2 T7 2 T59 2
others[3] 94 1 T95 6 T236 2 T264 2
others[4] 74 1 T94 2 T394 2 T66 4
others[5] 110 1 T12 2 T7 2 T91 2
others[6] 82 1 T12 4 T7 6 T95 2
others[7] 114 1 T7 2 T93 2 T95 2
false 7254 1 T1 2 T2 2 T3 1
true 16319 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 43 1 T133 1 T15 2 T134 1
others[1] 35 1 T12 2 T59 2 T133 2
others[2] 34 1 T14 1 T44 2 T134 1
others[3] 37 1 T12 2 T8 1 T9 2
others[4] 46 1 T7 2 T8 1 T9 1
others[5] 29 1 T133 1 T134 1 T142 2
others[6] 38 1 T9 2 T14 2 T95 2
others[7] 32 1 T8 1 T133 1 T15 2
false 11313 1 T1 4 T2 2 T3 1
true 18640 1 T1 5 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 62 1 T12 2 T59 2 T95 4
others[1] 64 1 T12 2 T7 2 T59 2
others[2] 56 1 T12 2 T7 2 T400 2
others[3] 70 1 T12 4 T59 2 T92 2
others[4] 66 1 T7 2 T91 2 T95 2
others[5] 68 1 T7 2 T59 4 T44 2
others[6] 50 1 T7 2 T44 2 T202 2
others[7] 90 1 T12 2 T7 6 T59 4
false 8948 1 T1 4 T2 2 T3 1
true 16529 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 35 1 T8 1 T14 3 T15 3
others[1] 36 1 T14 2 T15 1 T359 2
others[2] 30 1 T14 1 T15 1 T145 1
others[3] 33 1 T8 1 T14 1 T254 1
others[4] 22 1 T141 1 T134 2 T46 2
others[5] 26 1 T9 1 T15 1 T261 2
others[6] 35 1 T14 3 T15 1 T152 2
others[7] 42 1 T12 2 T95 2 T15 1
false 11273 1 T1 4 T2 2 T3 1
true 18627 1 T1 5 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 120 1 T12 4 T7 2 T38 2
others[1] 114 1 T12 2 T59 4 T92 2
others[2] 100 1 T7 4 T91 2 T59 2
others[3] 80 1 T12 2 T7 4 T93 2
others[4] 94 1 T12 6 T59 2 T93 2
others[5] 102 1 T5 2 T12 6 T92 2
others[6] 72 1 T7 2 T93 2 T95 2
others[7] 86 1 T5 2 T7 2 T59 2
false 7700 1 T1 2 T2 2 T3 1
true 16473 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 41 1 T7 2 T8 1 T9 1
others[1] 29 1 T9 1 T59 2 T14 2
others[2] 43 1 T59 2 T92 2 T14 1
others[3] 29 1 T9 1 T133 1 T97 2
others[4] 31 1 T108 2 T9 1 T98 2
others[5] 30 1 T8 2 T15 1 T134 1
others[6] 34 1 T8 1 T9 2 T133 1
others[7] 35 1 T7 2 T60 2 T14 1
false 11237 1 T1 4 T2 2 T3 1
true 18593 1 T1 5 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 32 1 T59 2 T97 2 T200 2
others[1] 50 1 T12 2 T7 2 T38 2
others[2] 40 1 T12 2 T7 2 T27 2
others[3] 48 1 T7 2 T38 2 T204 2
others[4] 26 1 T7 2 T97 2 T404 2
others[5] 24 1 T12 2 T7 2 T95 2
others[6] 34 1 T12 2 T38 2 T201 2
others[7] 42 1 T12 2 T94 2 T264 2
false 9737 1 T1 2 T2 2 T3 1
true 16498 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 92 1 T12 2 T59 4 T97 4
others[1] 94 1 T5 2 T59 4 T92 2
others[2] 82 1 T12 2 T7 4 T59 2
others[3] 60 1 T59 2 T66 2 T403 2
others[4] 96 1 T94 2 T404 2 T399 2
others[5] 96 1 T7 4 T95 2 T405 2
others[6] 94 1 T7 2 T217 2 T398 2
others[7] 116 1 T12 4 T7 6 T91 2
false 6956 1 T1 4 T2 1 T3 1
true 16296 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T7 4 T95 2 T97 2
others[1] 108 1 T7 2 T93 2 T95 4
others[2] 78 1 T12 2 T7 2 T94 2
others[3] 72 1 T7 2 T59 2 T95 2
others[4] 106 1 T12 2 T95 2 T394 2
others[5] 102 1 T5 2 T7 4 T92 2
others[6] 84 1 T12 2 T59 2 T403 2
others[7] 130 1 T12 2 T91 4 T59 2
false 6956 1 T1 4 T2 1 T3 1
true 16296 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 108 1 T12 2 T7 4 T92 2
others[1] 74 1 T59 2 T97 2 T405 2
others[2] 74 1 T7 4 T94 2 T95 2
others[3] 82 1 T12 4 T95 2 T44 2
others[4] 94 1 T12 2 T7 2 T92 2
others[5] 98 1 T44 2 T96 2 T394 2
others[6] 86 1 T7 2 T59 2 T401 2
others[7] 70 1 T12 2 T236 2 T398 2
false 6388 1 T1 1 T2 2 T3 1
true 16289 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T5 4 T93 2 T95 2
others[1] 68 1 T12 2 T59 2 T95 2
others[2] 82 1 T12 4 T91 2 T92 2
others[3] 90 1 T12 2 T91 2 T95 4
others[4] 100 1 T12 2 T59 2 T94 4
others[5] 98 1 T91 2 T95 2 T44 4
others[6] 110 1 T12 2 T7 4 T59 4
others[7] 100 1 T7 6 T59 2 T95 6
false 6388 1 T1 1 T2 2 T3 1
true 16289 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T7 2 T94 2 T95 2
others[1] 92 1 T12 2 T59 4 T95 2
others[2] 60 1 T7 4 T59 4 T44 2
others[3] 60 1 T5 2 T7 2 T94 2
others[4] 80 1 T12 2 T95 2 T204 2
others[5] 52 1 T7 2 T59 2 T94 2
others[6] 48 1 T12 2 T7 2 T98 2
others[7] 80 1 T7 6 T94 2 T98 4
false 6773 1 T1 2 T2 1 T3 1
true 17623 1 T1 6 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T12 4 T7 4 T142 4
others[1] 58 1 T7 2 T59 2 T105 2
others[2] 60 1 T12 2 T95 4 T142 4
others[3] 76 1 T91 2 T95 2 T44 2
others[4] 66 1 T5 2 T200 2 T201 2
others[5] 76 1 T7 2 T97 2 T236 2
others[6] 46 1 T12 2 T98 2 T264 2
others[7] 50 1 T7 4 T38 2 T93 2
false 6773 1 T1 2 T2 1 T3 1
true 17623 1 T1 6 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 22 1 T133 1 T15 2 T134 1
others[1] 36 1 T8 1 T14 1 T133 1
others[2] 35 1 T108 2 T8 1 T14 2
others[3] 34 1 T217 2 T254 1 T287 1
others[4] 38 1 T8 1 T9 1 T14 2
others[5] 28 1 T14 1 T15 1 T142 2
others[6] 41 1 T14 3 T133 2 T15 1
others[7] 39 1 T14 1 T94 2 T133 1
false 11450 1 T1 4 T2 2 T3 2
true 18743 1 T1 5 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 78 1 T12 4 T91 2 T95 2
others[1] 84 1 T7 4 T59 2 T94 2
others[2] 76 1 T7 2 T95 2 T96 2
others[3] 116 1 T5 2 T12 2 T7 4
others[4] 98 1 T7 4 T202 2 T395 2
others[5] 76 1 T7 4 T59 2 T92 2
others[6] 110 1 T12 2 T7 2 T105 2
others[7] 116 1 T5 2 T12 2 T7 2
false 7739 1 T1 2 T2 2 T3 1
true 16506 1 T1 4 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 31 1 T8 1 T59 2 T14 1
others[1] 32 1 T12 2 T8 1 T9 2
others[2] 32 1 T15 2 T261 1 T406 1
others[3] 48 1 T12 2 T8 1 T14 1
others[4] 36 1 T9 1 T152 1 T16 1
others[5] 30 1 T7 2 T14 1 T94 2
others[6] 32 1 T9 1 T14 1 T15 2
others[7] 53 1 T9 1 T133 1 T134 1
false 13999 1 T1 4 T2 3 T3 4
true 2293 1 T1 1 T5 6 T12 28


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 29 1 T8 1 T14 3 T15 1
others[1] 28 1 T14 1 T15 2 T152 1
others[2] 38 1 T14 1 T15 1 T134 2
others[3] 39 1 T14 1 T15 1 T261 1
others[4] 33 1 T9 1 T152 1 T359 2
others[5] 34 1 T14 1 T95 2 T15 1
others[6] 24 1 T15 1 T134 1 T152 1
others[7] 35 1 T12 2 T8 1 T14 3
false 13999 1 T1 4 T2 3 T3 4
true 2296 1 T1 1 T5 5 T12 29

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%