SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
84.44 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 18 | 1 | 17 | 94.44 |
Crosses | 72 | 13 | 59 | 81.94 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
err_code_vals | 7 | 1 | 6 | 85.71 | 100 | 1 | 1 | 0 | |
partition | 11 | 0 | 11 | 100.00 | 100 | 1 | 1 | 0 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
dai_err_code_for_all_partitions | 72 | 13 | 59 | 81.94 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 7 | 1 | 6 | 85.71 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
macro_err | 0 | 1 | 1 |
NAME | COUNT | STATUS |
illegal_err | 0 | Illegal |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
fsm_err | 51192 | 1 | T11 | 67 | T12 | 219 | T7 | 56 | ||||
access_err | 64929 | 1 | T1 | 26 | T5 | 168 | T11 | 4 | ||||
write_blank_err | 352 | 1 | T7 | 3 | T8 | 3 | T9 | 7 | ||||
ecc_uncorr_err | 63481 | 1 | T7 | 581 | T106 | 6 | T8 | 928 | ||||
ecc_corr_err | 1470 | 1 | T7 | 2 | T106 | 4 | T8 | 1 | ||||
no_err | 92304 | 1 | T1 | 39 | T2 | 17 | T5 | 193 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 11 | 0 | 11 | 100.00 |
NAME | COUNT | STATUS |
illegal_idx | 0 | Excluded |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
life_cycle | 685 | 1 | T7 | 7 | T8 | 6 | T9 | 5 | ||||
secret2 | 22586 | 1 | T1 | 6 | T2 | 1 | T5 | 19 | ||||
secret1 | 29824 | 1 | T1 | 5 | T2 | 2 | T5 | 34 | ||||
secret0 | 33593 | 1 | T1 | 2 | T5 | 30 | T11 | 3 | ||||
hw_cfg1 | 35849 | 1 | T1 | 12 | T5 | 35 | T11 | 4 | ||||
hw_cfg0 | 27508 | 1 | T1 | 3 | T2 | 10 | T5 | 51 | ||||
rot_creator_auth_state | 24677 | 1 | T1 | 4 | T2 | 1 | T5 | 34 | ||||
rot_creator_auth_codesign | 21740 | 1 | T1 | 3 | T5 | 35 | T11 | 3 | ||||
owner_sw_cfg | 21393 | 1 | T1 | 3 | T5 | 42 | T12 | 75 | ||||
creator_sw_cfg | 21563 | 1 | T1 | 20 | T5 | 58 | T11 | 2 | ||||
vendor_test | 34310 | 1 | T1 | 7 | T2 | 3 | T5 | 23 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL | 72 | 13 | 59 | 81.94 | 13 |
Automatically Generated Cross Bins | 72 | 13 | 59 | 81.94 | 13 |
User Defined Cross Bins | 0 | 0 | 0 |
err_code_vals | partition | COUNT | AT LEAST | NUMBER | STATUS |
[fsm_err] | [life_cycle] | 0 | 1 | 1 | |
[ecc_corr_err] | [vendor_test] | 0 | 1 | 1 | |
[macro_err] | [secret2 , secret1 , secret0 , hw_cfg1 , hw_cfg0 , rot_creator_auth_state , rot_creator_auth_codesign , owner_sw_cfg , creator_sw_cfg , vendor_test] | -- | -- | 10 | |
[no_err] | [life_cycle] | 0 | 1 | 1 |
err_code_vals | partition | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
fsm_err | secret2 | 2624 | 1 | T174 | 171 | T177 | 93 | T153 | 8 | ||||
fsm_err | secret1 | 4538 | 1 | T349 | 223 | T248 | 34 | T15 | 67 | ||||
fsm_err | secret0 | 2493 | 1 | T8 | 265 | T16 | 143 | T145 | 170 | ||||
fsm_err | hw_cfg1 | 2503 | 1 | T134 | 193 | T351 | 35 | T146 | 20 | ||||
fsm_err | hw_cfg0 | 6424 | 1 | T12 | 202 | T102 | 16 | T199 | 55 | ||||
fsm_err | rot_creator_auth_state | 5483 | 1 | T106 | 2 | T161 | 20 | T173 | 64 | ||||
fsm_err | rot_creator_auth_codesign | 3708 | 1 | T160 | 480 | T8 | 295 | T352 | 67 | ||||
fsm_err | owner_sw_cfg | 3553 | 1 | T171 | 25 | T353 | 256 | T354 | 164 | ||||
fsm_err | creator_sw_cfg | 3799 | 1 | T355 | 219 | T193 | 14 | T16 | 150 | ||||
fsm_err | vendor_test | 16067 | 1 | T11 | 67 | T12 | 17 | T7 | 56 | ||||
access_err | life_cycle | 685 | 1 | T7 | 7 | T8 | 6 | T9 | 5 | ||||
access_err | secret2 | 11520 | 1 | T1 | 6 | T5 | 6 | T12 | 35 | ||||
access_err | secret1 | 6017 | 1 | T1 | 2 | T5 | 27 | T12 | 17 | ||||
access_err | secret0 | 4890 | 1 | T1 | 2 | T5 | 17 | T12 | 14 | ||||
access_err | hw_cfg1 | 1323 | 1 | T1 | 1 | T5 | 1 | T11 | 4 | ||||
access_err | hw_cfg0 | 2228 | 1 | T5 | 19 | T12 | 14 | T7 | 58 | ||||
access_err | rot_creator_auth_state | 6359 | 1 | T1 | 2 | T5 | 7 | T12 | 17 | ||||
access_err | rot_creator_auth_codesign | 8212 | 1 | T1 | 2 | T5 | 24 | T12 | 49 | ||||
access_err | owner_sw_cfg | 7305 | 1 | T5 | 22 | T12 | 12 | T13 | 3 | ||||
access_err | creator_sw_cfg | 8471 | 1 | T1 | 9 | T5 | 33 | T12 | 28 | ||||
access_err | vendor_test | 7919 | 1 | T1 | 2 | T5 | 12 | T12 | 27 | ||||
write_blank_err | secret2 | 6 | 1 | T137 | 2 | T356 | 1 | T357 | 1 | ||||
write_blank_err | secret1 | 19 | 1 | T59 | 1 | T358 | 1 | T134 | 1 | ||||
write_blank_err | secret0 | 52 | 1 | T9 | 1 | T134 | 1 | T346 | 1 | ||||
write_blank_err | hw_cfg1 | 69 | 1 | T7 | 2 | T8 | 1 | T9 | 1 | ||||
write_blank_err | hw_cfg0 | 13 | 1 | T8 | 1 | T95 | 1 | T359 | 1 | ||||
write_blank_err | rot_creator_auth_state | 95 | 1 | T8 | 1 | T9 | 1 | T59 | 6 | ||||
write_blank_err | rot_creator_auth_codesign | 44 | 1 | T9 | 3 | T95 | 3 | T358 | 2 | ||||
write_blank_err | owner_sw_cfg | 15 | 1 | T287 | 2 | T360 | 2 | T120 | 4 | ||||
write_blank_err | creator_sw_cfg | 19 | 1 | T9 | 1 | T361 | 1 | T130 | 1 | ||||
write_blank_err | vendor_test | 20 | 1 | T7 | 1 | T362 | 1 | T363 | 2 | ||||
ecc_uncorr_err | secret2 | 3321 | 1 | T171 | 15 | T153 | 2 | T193 | 21 | ||||
ecc_uncorr_err | secret1 | 9703 | 1 | T59 | 553 | T159 | 54 | T358 | 630 | ||||
ecc_uncorr_err | secret0 | 17358 | 1 | T9 | 605 | T156 | 5 | T159 | 129 | ||||
ecc_uncorr_err | hw_cfg1 | 20482 | 1 | T7 | 581 | T8 | 530 | T9 | 121 | ||||
ecc_uncorr_err | hw_cfg0 | 6088 | 1 | T8 | 398 | T95 | 199 | T171 | 11 | ||||
ecc_uncorr_err | rot_creator_auth_state | 4182 | 1 | T106 | 2 | T59 | 160 | T159 | 130 | ||||
ecc_uncorr_err | rot_creator_auth_codesign | 645 | 1 | T159 | 70 | T171 | 27 | T193 | 21 | ||||
ecc_uncorr_err | owner_sw_cfg | 946 | 1 | T106 | 4 | T161 | 21 | T207 | 194 | ||||
ecc_uncorr_err | creator_sw_cfg | 756 | 1 | T161 | 21 | T207 | 133 | T221 | 57 | ||||
ecc_corr_err | secret2 | 60 | 1 | T60 | 1 | T113 | 2 | T44 | 1 | ||||
ecc_corr_err | secret1 | 143 | 1 | T60 | 2 | T113 | 2 | T44 | 8 | ||||
ecc_corr_err | secret0 | 124 | 1 | T159 | 1 | T44 | 8 | T171 | 3 | ||||
ecc_corr_err | hw_cfg1 | 289 | 1 | T7 | 2 | T59 | 2 | T60 | 4 | ||||
ecc_corr_err | hw_cfg0 | 261 | 1 | T60 | 5 | T44 | 25 | T171 | 1 | ||||
ecc_corr_err | rot_creator_auth_state | 142 | 1 | T106 | 2 | T8 | 1 | T159 | 1 | ||||
ecc_corr_err | rot_creator_auth_codesign | 139 | 1 | T60 | 5 | T113 | 3 | T44 | 14 | ||||
ecc_corr_err | owner_sw_cfg | 139 | 1 | T106 | 2 | T159 | 3 | T44 | 5 | ||||
ecc_corr_err | creator_sw_cfg | 173 | 1 | T9 | 1 | T60 | 6 | T44 | 7 | ||||
no_err | secret2 | 5055 | 1 | T2 | 1 | T5 | 13 | T11 | 1 | ||||
no_err | secret1 | 9404 | 1 | T1 | 3 | T2 | 2 | T5 | 7 | ||||
no_err | secret0 | 8676 | 1 | T5 | 13 | T11 | 3 | T12 | 26 | ||||
no_err | hw_cfg1 | 11183 | 1 | T1 | 11 | T5 | 34 | T12 | 40 | ||||
no_err | hw_cfg0 | 12494 | 1 | T1 | 3 | T2 | 10 | T5 | 32 | ||||
no_err | rot_creator_auth_state | 8416 | 1 | T1 | 2 | T2 | 1 | T5 | 27 | ||||
no_err | rot_creator_auth_codesign | 8992 | 1 | T1 | 1 | T5 | 11 | T11 | 3 | ||||
no_err | owner_sw_cfg | 9435 | 1 | T1 | 3 | T5 | 20 | T12 | 63 | ||||
no_err | creator_sw_cfg | 8345 | 1 | T1 | 11 | T5 | 25 | T11 | 2 | ||||
no_err | vendor_test | 10304 | 1 | T1 | 5 | T2 | 3 | T5 | 11 |
NAME | COUNT | STATUS |
vendor_test_ecc_uncorrectable_err | 0 | Illegal |
life_cycle_ignore | 0 | Excluded |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |