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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14472 1 T1 11 T2 3 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14472 1 T1 11 T2 3 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10221 1 T1 8 T2 2 T3 94
true 16804 1 T1 11 T2 4 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 11123 1 T1 8 T2 3 T3 105
true 16853 1 T1 11 T2 4 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 102 1 T3 6 T6 2 T101 2
others[1] 78 1 T3 2 T104 2 T70 2
others[2] 94 1 T3 6 T15 2 T6 2
others[3] 108 1 T6 2 T102 2 T172 2
others[4] 96 1 T3 4 T103 2 T110 2
others[5] 108 1 T6 2 T107 2 T171 2
others[6] 112 1 T3 4 T6 6 T105 2
others[7] 116 1 T3 2 T101 2 T110 2
false 14472 1 T1 11 T2 3 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 90 1 T3 2 T6 4 T110 2
others[1] 102 1 T3 4 T105 2 T106 2
others[2] 82 1 T15 4 T67 2 T110 2
others[3] 116 1 T3 6 T67 2 T207 2
others[4] 96 1 T3 2 T6 2 T257 2
others[5] 88 1 T3 2 T6 2 T160 2
others[6] 82 1 T3 2 T104 2 T312 2
others[7] 84 1 T6 4 T102 2 T67 2
false 14472 1 T1 11 T2 3 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 104 1 T3 6 T6 2 T102 2
others[1] 114 1 T15 2 T6 2 T103 2
others[2] 84 1 T3 4 T105 2 T204 2
others[3] 106 1 T3 2 T101 2 T104 2
others[4] 96 1 T3 6 T356 2 T82 2
others[5] 92 1 T3 2 T6 4 T67 2
others[6] 78 1 T207 2 T125 2 T242 2
others[7] 94 1 T3 2 T102 2 T68 2
false 14472 1 T1 11 T2 3 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 68 1 T3 2 T6 2 T67 4
others[1] 54 1 T6 2 T125 2 T230 2
others[2] 42 1 T6 2 T67 2 T315 2
others[3] 64 1 T15 2 T110 2 T357 2
others[4] 80 1 T3 4 T6 2 T204 2
others[5] 62 1 T3 2 T15 2 T6 4
others[6] 106 1 T6 2 T103 2 T67 2
others[7] 76 1 T110 2 T205 2 T164 2
false 14472 1 T1 11 T2 3 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 72 1 T6 2 T104 4 T110 2
others[1] 130 1 T6 6 T102 2 T105 4
others[2] 104 1 T3 6 T70 2 T160 4
others[3] 92 1 T3 4 T15 2 T6 2
others[4] 116 1 T3 4 T15 2 T6 4
others[5] 134 1 T3 2 T6 4 T104 2
others[6] 92 1 T3 2 T315 2 T207 2
others[7] 108 1 T6 2 T101 2 T204 4
false 14472 1 T1 11 T2 3 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 46 1 T3 2 T6 4 T207 2
others[1] 44 1 T3 4 T176 4 T69 2
others[2] 42 1 T3 2 T171 2 T358 2
others[3] 24 1 T6 2 T104 2 T105 2
others[4] 54 1 T3 2 T107 4 T125 2
others[5] 56 1 T3 4 T125 4 T230 2
others[6] 52 1 T6 4 T160 4 T206 2
others[7] 32 1 T3 2 T107 2 T359 2
false 14472 1 T1 11 T2 3 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 114 1 T3 2 T6 2 T160 2
others[1] 108 1 T101 2 T125 2 T356 2
others[2] 102 1 T3 6 T6 2 T104 2
others[3] 88 1 T6 2 T106 2 T107 2
others[4] 96 1 T1 2 T3 2 T103 2
others[5] 122 1 T3 2 T15 2 T6 4
others[6] 84 1 T103 2 T68 2 T160 2
others[7] 80 1 T3 2 T6 4 T101 2
false 14472 1 T1 11 T2 3 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T6 4 T171 2 T315 2
others[1] 88 1 T3 2 T15 2 T6 2
others[2] 122 1 T3 4 T6 2 T105 2
others[3] 116 1 T3 2 T6 4 T103 2
others[4] 100 1 T3 4 T6 2 T105 4
others[5] 92 1 T70 2 T206 2 T125 4
others[6] 124 1 T6 2 T67 2 T105 2
others[7] 122 1 T3 2 T66 2 T103 2
false 14472 1 T1 11 T2 3 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T3 2 T100 2 T6 4
others[1] 96 1 T15 4 T360 2 T207 2
others[2] 102 1 T6 4 T101 2 T103 2
others[3] 106 1 T3 2 T6 2 T103 2
others[4] 104 1 T104 2 T68 2 T360 2
others[5] 102 1 T6 6 T67 2 T107 4
others[6] 84 1 T3 4 T6 4 T105 2
others[7] 124 1 T3 2 T6 2 T104 2
false 14472 1 T1 11 T2 3 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 100 1 T3 2 T172 2 T171 2
others[1] 96 1 T3 2 T6 2 T101 2
others[2] 86 1 T6 2 T104 2 T203 2
others[3] 94 1 T3 4 T15 2 T6 2
others[4] 102 1 T6 4 T102 2 T268 2
others[5] 74 1 T3 4 T6 4 T104 2
others[6] 78 1 T3 2 T107 2 T160 2
others[7] 124 1 T3 2 T15 2 T6 2
false 14472 1 T1 11 T2 3 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T6 2 T103 2 T105 2
others[1] 98 1 T3 2 T15 2 T102 2
others[2] 124 1 T6 4 T107 2 T70 2
others[3] 90 1 T3 10 T6 2 T101 2
others[4] 124 1 T3 4 T257 2 T268 2
others[5] 92 1 T15 2 T6 2 T110 2
others[6] 112 1 T1 2 T6 4 T67 2
others[7] 80 1 T3 4 T6 2 T204 2
false 14472 1 T1 11 T2 3 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 14 1 T6 2 T211 2 T10 1
others[1] 7 1 T5 1 T358 2 T305 1
others[2] 14 1 T331 2 T9 1 T174 2
others[3] 21 1 T26 3 T125 2 T361 1
others[4] 6 1 T26 2 T361 1 T35 1
others[5] 23 1 T206 2 T26 1 T214 2
others[6] 21 1 T357 2 T26 1 T242 2
others[7] 19 1 T66 2 T105 2 T213 2
false 14472 1 T1 11 T2 3 T3 141
true 2235 1 T1 2 T3 44 T4 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 12 1 T331 2 T206 2 T214 2
others[1] 20 1 T26 2 T213 2 T174 2
others[2] 11 1 T5 1 T35 1 T362 2
others[3] 10 1 T105 2 T26 1 T363 1
others[4] 19 1 T6 2 T211 2 T26 1
others[5] 22 1 T66 2 T179 2 T361 1
others[6] 16 1 T26 2 T10 1 T242 2
others[7] 15 1 T9 1 T357 2 T26 1
false 11586 1 T1 8 T2 3 T3 109
true 19087 1 T1 13 T2 4 T3 185


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T3 2 T6 2 T110 2
others[1] 100 1 T3 4 T6 2 T68 2
others[2] 92 1 T15 2 T102 2 T106 2
others[3] 134 1 T3 8 T101 2 T102 2
others[4] 104 1 T3 2 T6 4 T104 2
others[5] 90 1 T3 2 T6 2 T101 2
others[6] 110 1 T3 4 T105 2 T268 2
others[7] 100 1 T3 2 T6 4 T102 2
false 7576 1 T1 8 T2 3 T3 22
true 16890 1 T1 11 T2 4 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 90 1 T3 2 T6 2 T311 2
others[1] 98 1 T3 2 T15 2 T6 2
others[2] 94 1 T204 2 T211 2 T215 2
others[3] 90 1 T3 8 T6 4 T67 2
others[4] 84 1 T6 2 T67 2 T312 2
others[5] 76 1 T6 2 T67 2 T204 2
others[6] 102 1 T3 4 T102 2 T110 4
others[7] 106 1 T3 2 T15 2 T105 2
false 6723 1 T1 3 T2 2 T3 25
true 16664 1 T1 11 T2 4 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T3 4 T67 2 T105 2
others[1] 122 1 T3 2 T172 2 T207 2
others[2] 92 1 T3 4 T101 2 T102 2
others[3] 82 1 T3 2 T103 2 T107 2
others[4] 86 1 T3 2 T6 4 T110 2
others[5] 98 1 T3 8 T6 2 T205 2
others[6] 88 1 T6 2 T102 2 T215 2
others[7] 104 1 T15 2 T104 2 T105 2
false 7249 1 T1 4 T2 3 T3 31
true 16694 1 T1 11 T2 4 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 9 1 T7 1 T364 1 T365 2
others[1] 11 1 T101 2 T26 1 T363 1
others[2] 7 1 T319 2 T364 1 T366 2
others[3] 17 1 T26 1 T361 1 T364 1
others[4] 19 1 T101 2 T26 1 T11 2
others[5] 16 1 T26 1 T321 2 T367 2
others[6] 22 1 T66 2 T11 1 T364 1
others[7] 11 1 T11 1 T245 1 T368 2
false 11511 1 T1 8 T2 3 T3 109
true 19061 1 T1 14 T2 4 T3 187


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 48 1 T3 2 T15 2 T315 2
others[1] 78 1 T6 2 T67 4 T369 2
others[2] 62 1 T3 2 T6 4 T204 2
others[3] 70 1 T110 2 T315 2 T215 2
others[4] 86 1 T3 4 T6 2 T67 2
others[5] 64 1 T6 2 T67 2 T360 2
others[6] 54 1 T110 2 T203 2 T357 2
others[7] 90 1 T15 2 T6 4 T103 2
false 8783 1 T1 5 T2 3 T3 71
true 16887 1 T1 11 T2 4 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 8 1 T7 1 T11 2 T370 2
others[1] 8 1 T7 1 T361 1 T371 2
others[2] 17 1 T7 1 T70 2 T26 1
others[3] 12 1 T6 2 T26 3 T27 2
others[4] 20 1 T26 1 T11 1 T271 1
others[5] 12 1 T26 1 T69 2 T372 1
others[6] 11 1 T270 1 T370 2 T373 2
others[7] 23 1 T7 1 T331 2 T26 1
false 11467 1 T1 8 T2 3 T3 109
true 19038 1 T1 14 T2 4 T3 181


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 112 1 T3 4 T15 2 T103 2
others[1] 102 1 T6 2 T160 2 T164 2
others[2] 102 1 T6 4 T70 2 T211 2
others[3] 104 1 T3 8 T15 2 T6 6
others[4] 100 1 T6 2 T101 4 T105 2
others[5] 100 1 T3 2 T105 2 T110 2
others[6] 100 1 T6 2 T104 2 T257 2
others[7] 128 1 T3 4 T6 4 T101 2
false 7518 1 T1 3 T2 3 T3 20
true 16824 1 T1 11 T2 4 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 9 1 T6 2 T26 1 T138 1
others[1] 11 1 T101 2 T7 1 T11 1
others[2] 15 1 T357 2 T26 1 T270 1
others[3] 17 1 T374 2 T372 1 T364 1
others[4] 8 1 T364 1 T138 1 T375 2
others[5] 20 1 T26 1 T35 2 T371 2
others[6] 12 1 T7 1 T27 2 T371 2
others[7] 17 1 T5 1 T105 2 T9 1
false 11422 1 T1 8 T2 3 T3 109
true 18996 1 T1 15 T2 4 T3 181


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 32 1 T3 2 T230 2 T321 2
others[1] 48 1 T160 2 T207 2 T356 2
others[2] 46 1 T3 2 T6 2 T104 2
others[3] 36 1 T3 2 T6 2 T206 2
others[4] 46 1 T3 2 T6 2 T105 2
others[5] 50 1 T3 4 T6 2 T107 2
others[6] 40 1 T3 2 T125 2 T176 2
others[7] 52 1 T3 2 T6 2 T107 4
false 9909 1 T1 8 T2 3 T3 58
true 16864 1 T1 11 T2 4 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T3 2 T6 4 T205 2
others[1] 100 1 T107 4 T257 2 T160 2
others[2] 108 1 T3 4 T357 2 T369 2
others[3] 98 1 T3 2 T6 2 T101 2
others[4] 88 1 T3 6 T6 2 T204 2
others[5] 106 1 T15 2 T6 4 T101 2
others[6] 86 1 T1 2 T6 2 T103 2
others[7] 112 1 T70 2 T207 2 T358 2
false 6820 1 T1 1 T2 2 T3 21
true 16670 1 T1 11 T2 4 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 106 1 T103 2 T105 2 T110 2
others[1] 124 1 T3 2 T6 4 T66 2
others[2] 110 1 T3 2 T6 6 T103 2
others[3] 98 1 T160 2 T125 2 T376 2
others[4] 92 1 T3 2 T6 2 T105 2
others[5] 86 1 T3 2 T123 2 T206 2
others[6] 106 1 T15 2 T6 2 T105 2
others[7] 128 1 T3 6 T6 2 T205 2
false 6820 1 T1 1 T2 2 T3 21
true 16670 1 T1 11 T2 4 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T6 2 T203 2 T315 2
others[1] 90 1 T103 2 T67 2 T206 2
others[2] 102 1 T15 2 T6 2 T204 4
others[3] 108 1 T3 2 T100 2 T6 2
others[4] 88 1 T6 4 T103 2 T105 2
others[5] 106 1 T3 2 T101 2 T104 2
others[6] 118 1 T3 2 T15 2 T6 6
others[7] 118 1 T3 4 T6 6 T107 4
false 6269 1 T1 3 T2 2 T3 28
true 16665 1 T1 11 T2 4 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 106 1 T3 2 T6 6 T107 2
others[1] 90 1 T6 2 T103 2 T107 2
others[2] 92 1 T3 2 T6 2 T104 2
others[3] 100 1 T102 2 T104 2 T203 2
others[4] 102 1 T3 4 T15 2 T6 2
others[5] 84 1 T15 2 T67 2 T257 2
others[6] 78 1 T3 4 T6 4 T360 2
others[7] 102 1 T3 4 T101 2 T104 2
false 6269 1 T1 3 T2 2 T3 28
true 16665 1 T1 11 T2 4 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 78 1 T3 2 T15 4 T6 2
others[1] 66 1 T3 2 T15 2 T105 6
others[2] 66 1 T3 2 T105 4 T70 2
others[3] 54 1 T3 2 T204 2 T125 2
others[4] 58 1 T3 2 T103 2 T203 2
others[5] 60 1 T3 2 T107 2 T257 2
others[6] 64 1 T211 2 T125 4 T174 2
others[7] 94 1 T3 2 T6 8 T107 2
false 6746 1 T1 6 T2 2 T3 24
true 17970 1 T1 12 T2 4 T3 150


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 78 1 T3 4 T6 2 T68 2
others[1] 58 1 T3 2 T101 2 T360 2
others[2] 74 1 T3 2 T101 2 T312 2
others[3] 52 1 T3 2 T105 2 T205 2
others[4] 76 1 T107 2 T204 2 T205 2
others[5] 58 1 T3 2 T15 2 T105 2
others[6] 48 1 T3 2 T160 2 T230 2
others[7] 84 1 T3 4 T70 2 T205 2
false 6746 1 T1 6 T2 2 T3 24
true 17970 1 T1 12 T2 4 T3 150


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 10 1 T358 2 T364 1 T247 2
others[1] 24 1 T26 1 T213 2 T121 2
others[2] 5 1 T26 1 T361 1 T377 1
others[3] 13 1 T125 2 T69 2 T372 1
others[4] 17 1 T6 2 T176 2 T214 2
others[5] 12 1 T26 1 T271 1 T366 4
others[6] 15 1 T9 2 T378 2 T363 2
others[7] 8 1 T101 2 T363 1 T379 2
false 11673 1 T1 8 T2 3 T3 110
true 19133 1 T1 15 T2 4 T3 179


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T3 4 T15 2 T6 2
others[1] 106 1 T6 4 T67 2 T105 2
others[2] 102 1 T3 2 T6 4 T103 2
others[3] 86 1 T3 2 T101 2 T110 4
others[4] 106 1 T15 2 T6 2 T70 2
others[5] 100 1 T6 2 T257 2 T125 2
others[6] 104 1 T3 10 T105 2 T70 2
others[7] 122 1 T1 2 T3 2 T6 2
false 7544 1 T1 3 T2 3 T3 28
true 16862 1 T1 11 T2 4 T3 141


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 15 1 T11 1 T364 1 T365 2
others[1] 21 1 T380 2 T381 1 T305 1
others[2] 11 1 T26 1 T361 1 T382 2
others[3] 10 1 T26 2 T383 2 T384 2
others[4] 19 1 T66 2 T321 2 T385 2
others[5] 6 1 T11 2 T377 1 T139 1
others[6] 11 1 T101 2 T7 1 T26 1
others[7] 19 1 T101 2 T11 1 T372 1
false 14472 1 T1 11 T2 3 T3 141
true 2267 1 T1 3 T3 46 T4 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%