Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
94.89 93.78 96.20 95.67 91.89 97.10 96.34 93.28


Total test records in report: 1290
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html

T1052 /workspace/coverage/default/209.otp_ctrl_init_fail.2421538122 Aug 12 05:54:49 PM PDT 24 Aug 12 05:54:55 PM PDT 24 570659652 ps
T1053 /workspace/coverage/default/150.otp_ctrl_init_fail.982992873 Aug 12 05:54:29 PM PDT 24 Aug 12 05:54:32 PM PDT 24 311251403 ps
T1054 /workspace/coverage/default/26.otp_ctrl_parallel_key_req.1996579207 Aug 12 05:52:25 PM PDT 24 Aug 12 05:53:06 PM PDT 24 2257048187 ps
T1055 /workspace/coverage/default/28.otp_ctrl_macro_errs.3761443077 Aug 12 05:52:36 PM PDT 24 Aug 12 05:53:04 PM PDT 24 8973218081 ps
T1056 /workspace/coverage/default/11.otp_ctrl_test_access.993416762 Aug 12 05:51:33 PM PDT 24 Aug 12 05:51:42 PM PDT 24 817711509 ps
T1057 /workspace/coverage/default/145.otp_ctrl_init_fail.929609240 Aug 12 05:54:26 PM PDT 24 Aug 12 05:54:30 PM PDT 24 200333835 ps
T1058 /workspace/coverage/default/207.otp_ctrl_init_fail.725454291 Aug 12 05:54:44 PM PDT 24 Aug 12 05:54:48 PM PDT 24 232866349 ps
T1059 /workspace/coverage/default/177.otp_ctrl_parallel_lc_esc.2305215068 Aug 12 05:54:40 PM PDT 24 Aug 12 05:54:47 PM PDT 24 950457085 ps
T1060 /workspace/coverage/default/47.otp_ctrl_alert_test.164975631 Aug 12 05:53:31 PM PDT 24 Aug 12 05:53:33 PM PDT 24 111677888 ps
T1061 /workspace/coverage/default/22.otp_ctrl_check_fail.2656621672 Aug 12 05:52:11 PM PDT 24 Aug 12 05:52:29 PM PDT 24 1265759109 ps
T1062 /workspace/coverage/default/40.otp_ctrl_parallel_lc_esc.3031910917 Aug 12 05:53:10 PM PDT 24 Aug 12 05:53:18 PM PDT 24 365031985 ps
T1063 /workspace/coverage/default/151.otp_ctrl_parallel_lc_esc.1410153084 Aug 12 05:54:31 PM PDT 24 Aug 12 05:54:35 PM PDT 24 297094124 ps
T1064 /workspace/coverage/default/31.otp_ctrl_stress_all.2769769311 Aug 12 05:52:39 PM PDT 24 Aug 12 05:54:04 PM PDT 24 9933014061 ps
T1065 /workspace/coverage/default/3.otp_ctrl_init_fail.3164451258 Aug 12 05:51:12 PM PDT 24 Aug 12 05:51:16 PM PDT 24 231410484 ps
T1066 /workspace/coverage/default/75.otp_ctrl_parallel_lc_esc.3195620780 Aug 12 05:53:52 PM PDT 24 Aug 12 05:53:56 PM PDT 24 555624683 ps
T1067 /workspace/coverage/default/7.otp_ctrl_smoke.638302145 Aug 12 05:51:18 PM PDT 24 Aug 12 05:51:22 PM PDT 24 312082191 ps
T1068 /workspace/coverage/default/20.otp_ctrl_parallel_key_req.1603583333 Aug 12 05:52:03 PM PDT 24 Aug 12 05:52:23 PM PDT 24 1675872500 ps
T1069 /workspace/coverage/default/41.otp_ctrl_dai_lock.615348647 Aug 12 05:53:10 PM PDT 24 Aug 12 05:53:26 PM PDT 24 2180649132 ps
T1070 /workspace/coverage/default/26.otp_ctrl_dai_errs.2044032461 Aug 12 05:52:30 PM PDT 24 Aug 12 05:52:47 PM PDT 24 273974667 ps
T1071 /workspace/coverage/default/135.otp_ctrl_parallel_lc_esc.3898046088 Aug 12 05:54:25 PM PDT 24 Aug 12 05:54:31 PM PDT 24 198665353 ps
T1072 /workspace/coverage/default/93.otp_ctrl_init_fail.3068494448 Aug 12 05:54:01 PM PDT 24 Aug 12 05:54:06 PM PDT 24 545246680 ps
T1073 /workspace/coverage/default/194.otp_ctrl_parallel_lc_esc.121545004 Aug 12 05:54:45 PM PDT 24 Aug 12 05:54:56 PM PDT 24 1300555767 ps
T1074 /workspace/coverage/default/23.otp_ctrl_smoke.260136888 Aug 12 05:52:18 PM PDT 24 Aug 12 05:52:28 PM PDT 24 437642366 ps
T1075 /workspace/coverage/default/47.otp_ctrl_dai_lock.237134997 Aug 12 05:53:27 PM PDT 24 Aug 12 05:53:32 PM PDT 24 2389756585 ps
T1076 /workspace/coverage/default/83.otp_ctrl_parallel_lc_esc.2390291848 Aug 12 05:54:03 PM PDT 24 Aug 12 05:54:17 PM PDT 24 3060297347 ps
T1077 /workspace/coverage/default/78.otp_ctrl_parallel_lc_esc.3820443804 Aug 12 05:53:57 PM PDT 24 Aug 12 05:54:04 PM PDT 24 305862546 ps
T1078 /workspace/coverage/default/84.otp_ctrl_init_fail.860721670 Aug 12 05:54:02 PM PDT 24 Aug 12 05:54:06 PM PDT 24 170414466 ps
T1079 /workspace/coverage/default/36.otp_ctrl_smoke.4183455271 Aug 12 05:52:49 PM PDT 24 Aug 12 05:53:01 PM PDT 24 5276611871 ps
T1080 /workspace/coverage/default/47.otp_ctrl_check_fail.1342952168 Aug 12 05:53:24 PM PDT 24 Aug 12 05:53:33 PM PDT 24 623730507 ps
T309 /workspace/coverage/default/37.otp_ctrl_stress_all_with_rand_reset.3795006118 Aug 12 05:52:57 PM PDT 24 Aug 12 05:54:22 PM PDT 24 4930920498 ps
T1081 /workspace/coverage/default/93.otp_ctrl_stress_all_with_rand_reset.3101049651 Aug 12 05:54:04 PM PDT 24 Aug 12 05:55:18 PM PDT 24 6102767108 ps
T1082 /workspace/coverage/default/279.otp_ctrl_init_fail.1362767064 Aug 12 05:55:03 PM PDT 24 Aug 12 05:55:08 PM PDT 24 510960070 ps
T1083 /workspace/coverage/default/29.otp_ctrl_parallel_lc_esc.2002849573 Aug 12 05:52:32 PM PDT 24 Aug 12 05:52:41 PM PDT 24 297072941 ps
T1084 /workspace/coverage/default/29.otp_ctrl_test_access.653622628 Aug 12 05:52:32 PM PDT 24 Aug 12 05:52:47 PM PDT 24 1100914130 ps
T1085 /workspace/coverage/default/22.otp_ctrl_regwen.3877954134 Aug 12 05:52:09 PM PDT 24 Aug 12 05:52:15 PM PDT 24 1761933798 ps
T1086 /workspace/coverage/default/42.otp_ctrl_regwen.490574822 Aug 12 05:53:16 PM PDT 24 Aug 12 05:53:28 PM PDT 24 296272915 ps
T1087 /workspace/coverage/default/32.otp_ctrl_init_fail.788932911 Aug 12 05:52:42 PM PDT 24 Aug 12 05:52:47 PM PDT 24 505306492 ps
T1088 /workspace/coverage/default/49.otp_ctrl_parallel_lc_esc.2941401855 Aug 12 05:53:35 PM PDT 24 Aug 12 05:53:54 PM PDT 24 745892275 ps
T1089 /workspace/coverage/default/250.otp_ctrl_init_fail.3773242978 Aug 12 05:54:52 PM PDT 24 Aug 12 05:54:56 PM PDT 24 314884445 ps
T1090 /workspace/coverage/default/28.otp_ctrl_parallel_lc_esc.1385393908 Aug 12 05:52:42 PM PDT 24 Aug 12 05:53:04 PM PDT 24 1290220795 ps
T1091 /workspace/coverage/default/51.otp_ctrl_init_fail.1300658363 Aug 12 05:53:41 PM PDT 24 Aug 12 05:53:45 PM PDT 24 196298680 ps
T1092 /workspace/coverage/default/11.otp_ctrl_smoke.2626317171 Aug 12 05:51:37 PM PDT 24 Aug 12 05:51:46 PM PDT 24 284290397 ps
T1093 /workspace/coverage/default/45.otp_ctrl_macro_errs.3571487370 Aug 12 05:53:21 PM PDT 24 Aug 12 05:54:01 PM PDT 24 2319936816 ps
T1094 /workspace/coverage/default/149.otp_ctrl_parallel_lc_esc.2989644321 Aug 12 05:54:30 PM PDT 24 Aug 12 05:54:36 PM PDT 24 392560222 ps
T1095 /workspace/coverage/default/23.otp_ctrl_test_access.1681905894 Aug 12 05:52:24 PM PDT 24 Aug 12 05:52:38 PM PDT 24 1590066029 ps
T60 /workspace/coverage/default/4.otp_ctrl_init_fail.1934713824 Aug 12 05:51:12 PM PDT 24 Aug 12 05:51:17 PM PDT 24 336285932 ps
T1096 /workspace/coverage/default/132.otp_ctrl_parallel_lc_esc.2447693311 Aug 12 05:54:19 PM PDT 24 Aug 12 05:54:27 PM PDT 24 2861418494 ps
T1097 /workspace/coverage/default/135.otp_ctrl_init_fail.4235260768 Aug 12 05:54:26 PM PDT 24 Aug 12 05:54:32 PM PDT 24 447425124 ps
T244 /workspace/coverage/default/284.otp_ctrl_init_fail.255477308 Aug 12 05:55:05 PM PDT 24 Aug 12 05:55:09 PM PDT 24 153549815 ps
T1098 /workspace/coverage/default/9.otp_ctrl_test_access.3072856024 Aug 12 05:51:26 PM PDT 24 Aug 12 05:51:51 PM PDT 24 2215626328 ps
T1099 /workspace/coverage/default/37.otp_ctrl_dai_lock.3825444647 Aug 12 05:52:55 PM PDT 24 Aug 12 05:53:10 PM PDT 24 6289491355 ps
T1100 /workspace/coverage/default/67.otp_ctrl_init_fail.2176639902 Aug 12 05:53:46 PM PDT 24 Aug 12 05:53:51 PM PDT 24 1784434158 ps
T353 /workspace/coverage/default/33.otp_ctrl_regwen.3539955969 Aug 12 05:52:47 PM PDT 24 Aug 12 05:52:52 PM PDT 24 478674867 ps
T1101 /workspace/coverage/default/204.otp_ctrl_init_fail.2480495458 Aug 12 05:54:44 PM PDT 24 Aug 12 05:54:49 PM PDT 24 271825138 ps
T1102 /workspace/coverage/default/15.otp_ctrl_parallel_lc_esc.3359595465 Aug 12 05:51:55 PM PDT 24 Aug 12 05:51:58 PM PDT 24 1099216405 ps
T1103 /workspace/coverage/default/1.otp_ctrl_smoke.3413739388 Aug 12 05:51:03 PM PDT 24 Aug 12 05:51:17 PM PDT 24 4689661442 ps
T1104 /workspace/coverage/default/6.otp_ctrl_stress_all_with_rand_reset.3682656393 Aug 12 05:51:18 PM PDT 24 Aug 12 05:53:17 PM PDT 24 7876067585 ps
T1105 /workspace/coverage/default/17.otp_ctrl_parallel_lc_esc.1595141094 Aug 12 05:51:53 PM PDT 24 Aug 12 05:52:03 PM PDT 24 835877835 ps
T1106 /workspace/coverage/default/17.otp_ctrl_check_fail.3495301518 Aug 12 05:51:56 PM PDT 24 Aug 12 05:52:05 PM PDT 24 1178954377 ps
T1107 /workspace/coverage/default/128.otp_ctrl_parallel_lc_esc.1677504305 Aug 12 05:54:26 PM PDT 24 Aug 12 05:54:40 PM PDT 24 2956841058 ps
T1108 /workspace/coverage/default/23.otp_ctrl_dai_lock.1808779124 Aug 12 05:52:19 PM PDT 24 Aug 12 05:52:44 PM PDT 24 2699161619 ps
T1109 /workspace/coverage/default/12.otp_ctrl_alert_test.3211897606 Aug 12 05:51:35 PM PDT 24 Aug 12 05:51:37 PM PDT 24 87271193 ps
T1110 /workspace/coverage/default/228.otp_ctrl_init_fail.402102106 Aug 12 05:54:55 PM PDT 24 Aug 12 05:55:00 PM PDT 24 121632663 ps
T1111 /workspace/coverage/default/81.otp_ctrl_init_fail.147141140 Aug 12 05:53:51 PM PDT 24 Aug 12 05:53:55 PM PDT 24 152639810 ps
T1112 /workspace/coverage/default/238.otp_ctrl_init_fail.3008722627 Aug 12 05:54:53 PM PDT 24 Aug 12 05:55:00 PM PDT 24 2395912718 ps
T1113 /workspace/coverage/default/158.otp_ctrl_parallel_lc_esc.1704049962 Aug 12 05:54:31 PM PDT 24 Aug 12 05:54:39 PM PDT 24 848919626 ps
T1114 /workspace/coverage/default/197.otp_ctrl_parallel_lc_esc.231266886 Aug 12 05:54:48 PM PDT 24 Aug 12 05:54:52 PM PDT 24 326970620 ps
T1115 /workspace/coverage/default/296.otp_ctrl_init_fail.4134183106 Aug 12 05:55:05 PM PDT 24 Aug 12 05:55:09 PM PDT 24 319239402 ps
T1116 /workspace/coverage/default/48.otp_ctrl_macro_errs.830762788 Aug 12 05:53:32 PM PDT 24 Aug 12 05:53:37 PM PDT 24 174303617 ps
T1117 /workspace/coverage/default/42.otp_ctrl_dai_lock.874148599 Aug 12 05:53:14 PM PDT 24 Aug 12 05:53:33 PM PDT 24 1221921462 ps
T1118 /workspace/coverage/default/11.otp_ctrl_init_fail.779192473 Aug 12 05:51:40 PM PDT 24 Aug 12 05:51:45 PM PDT 24 429284276 ps
T1119 /workspace/coverage/default/33.otp_ctrl_smoke.2551457826 Aug 12 05:52:40 PM PDT 24 Aug 12 05:52:47 PM PDT 24 356390200 ps
T1120 /workspace/coverage/default/11.otp_ctrl_macro_errs.3551539199 Aug 12 05:51:33 PM PDT 24 Aug 12 05:51:39 PM PDT 24 2279380663 ps
T1121 /workspace/coverage/default/40.otp_ctrl_parallel_key_req.2299359696 Aug 12 05:53:10 PM PDT 24 Aug 12 05:53:28 PM PDT 24 5207602428 ps
T1122 /workspace/coverage/default/171.otp_ctrl_init_fail.1914481064 Aug 12 05:54:38 PM PDT 24 Aug 12 05:54:42 PM PDT 24 191974297 ps
T1123 /workspace/coverage/default/16.otp_ctrl_stress_all_with_rand_reset.4288321275 Aug 12 05:51:54 PM PDT 24 Aug 12 05:54:10 PM PDT 24 3347498904 ps
T1124 /workspace/coverage/default/1.otp_ctrl_parallel_key_req.1595192930 Aug 12 05:51:10 PM PDT 24 Aug 12 05:51:26 PM PDT 24 708982369 ps
T58 /workspace/coverage/default/44.otp_ctrl_init_fail.2746562779 Aug 12 05:53:17 PM PDT 24 Aug 12 05:53:21 PM PDT 24 277926713 ps
T1125 /workspace/coverage/default/99.otp_ctrl_parallel_lc_esc.3401486400 Aug 12 05:54:08 PM PDT 24 Aug 12 05:54:13 PM PDT 24 199277820 ps
T1126 /workspace/coverage/default/104.otp_ctrl_init_fail.2528582149 Aug 12 05:54:08 PM PDT 24 Aug 12 05:54:13 PM PDT 24 2310978823 ps
T1127 /workspace/coverage/default/70.otp_ctrl_parallel_lc_esc.162450323 Aug 12 05:53:46 PM PDT 24 Aug 12 05:53:50 PM PDT 24 245350220 ps
T1128 /workspace/coverage/default/6.otp_ctrl_parallel_lc_esc.3502527173 Aug 12 05:51:17 PM PDT 24 Aug 12 05:51:22 PM PDT 24 2190770621 ps
T1129 /workspace/coverage/default/38.otp_ctrl_dai_errs.2460337678 Aug 12 05:53:06 PM PDT 24 Aug 12 05:53:44 PM PDT 24 5255691353 ps
T124 /workspace/coverage/default/188.otp_ctrl_parallel_lc_esc.2891104498 Aug 12 05:54:49 PM PDT 24 Aug 12 05:55:00 PM PDT 24 712546696 ps
T1130 /workspace/coverage/default/28.otp_ctrl_alert_test.2886867802 Aug 12 05:52:33 PM PDT 24 Aug 12 05:52:35 PM PDT 24 88028169 ps
T1131 /workspace/coverage/default/46.otp_ctrl_parallel_lc_req.4208379175 Aug 12 05:53:25 PM PDT 24 Aug 12 05:53:40 PM PDT 24 465031159 ps
T1132 /workspace/coverage/default/41.otp_ctrl_smoke.2270127426 Aug 12 05:53:09 PM PDT 24 Aug 12 05:53:15 PM PDT 24 821489471 ps
T1133 /workspace/coverage/default/98.otp_ctrl_init_fail.3417763565 Aug 12 05:54:08 PM PDT 24 Aug 12 05:54:12 PM PDT 24 165715618 ps
T1134 /workspace/coverage/default/2.otp_ctrl_dai_lock.1609308781 Aug 12 05:51:09 PM PDT 24 Aug 12 05:51:34 PM PDT 24 2496948872 ps
T1135 /workspace/coverage/default/29.otp_ctrl_check_fail.2666046112 Aug 12 05:52:32 PM PDT 24 Aug 12 05:53:08 PM PDT 24 13838545142 ps
T1136 /workspace/coverage/default/179.otp_ctrl_parallel_lc_esc.4145165914 Aug 12 05:54:39 PM PDT 24 Aug 12 05:55:01 PM PDT 24 707021859 ps
T1137 /workspace/coverage/default/47.otp_ctrl_smoke.3093823634 Aug 12 05:53:35 PM PDT 24 Aug 12 05:53:42 PM PDT 24 534587039 ps
T128 /workspace/coverage/default/38.otp_ctrl_check_fail.1667907334 Aug 12 05:53:02 PM PDT 24 Aug 12 05:53:40 PM PDT 24 3257579739 ps
T1138 /workspace/coverage/default/108.otp_ctrl_parallel_lc_esc.2965921516 Aug 12 05:54:16 PM PDT 24 Aug 12 05:54:26 PM PDT 24 661899922 ps
T352 /workspace/coverage/default/6.otp_ctrl_regwen.1896859741 Aug 12 05:51:19 PM PDT 24 Aug 12 05:51:26 PM PDT 24 289504703 ps
T1139 /workspace/coverage/default/144.otp_ctrl_init_fail.1814184606 Aug 12 05:54:24 PM PDT 24 Aug 12 05:54:28 PM PDT 24 191601107 ps
T61 /workspace/coverage/default/118.otp_ctrl_init_fail.793588984 Aug 12 05:54:13 PM PDT 24 Aug 12 05:54:19 PM PDT 24 723570350 ps
T1140 /workspace/coverage/default/169.otp_ctrl_parallel_lc_esc.15683778 Aug 12 05:54:29 PM PDT 24 Aug 12 05:55:01 PM PDT 24 4069057780 ps
T1141 /workspace/coverage/default/127.otp_ctrl_parallel_lc_esc.3164910561 Aug 12 05:54:25 PM PDT 24 Aug 12 05:54:30 PM PDT 24 158298506 ps
T1142 /workspace/coverage/default/80.otp_ctrl_init_fail.3334026876 Aug 12 05:53:54 PM PDT 24 Aug 12 05:53:59 PM PDT 24 158311211 ps
T1143 /workspace/coverage/default/3.otp_ctrl_alert_test.1220975043 Aug 12 05:51:25 PM PDT 24 Aug 12 05:51:27 PM PDT 24 77121649 ps
T1144 /workspace/coverage/default/33.otp_ctrl_parallel_key_req.4179954307 Aug 12 05:52:55 PM PDT 24 Aug 12 05:53:19 PM PDT 24 1971105216 ps
T1145 /workspace/coverage/default/47.otp_ctrl_parallel_key_req.3169491141 Aug 12 05:53:25 PM PDT 24 Aug 12 05:53:38 PM PDT 24 888175962 ps
T1146 /workspace/coverage/default/41.otp_ctrl_dai_errs.4085094080 Aug 12 05:53:09 PM PDT 24 Aug 12 05:53:38 PM PDT 24 3340368029 ps
T1147 /workspace/coverage/default/48.otp_ctrl_alert_test.2719337414 Aug 12 05:53:30 PM PDT 24 Aug 12 05:53:33 PM PDT 24 94288742 ps
T1148 /workspace/coverage/default/49.otp_ctrl_smoke.355882876 Aug 12 05:53:30 PM PDT 24 Aug 12 05:53:36 PM PDT 24 517286412 ps
T1149 /workspace/coverage/default/20.otp_ctrl_alert_test.242276541 Aug 12 05:52:07 PM PDT 24 Aug 12 05:52:09 PM PDT 24 83449062 ps
T1150 /workspace/coverage/default/49.otp_ctrl_regwen.1890947615 Aug 12 05:53:30 PM PDT 24 Aug 12 05:53:37 PM PDT 24 2149397335 ps
T1151 /workspace/coverage/default/27.otp_ctrl_check_fail.3898948964 Aug 12 05:52:25 PM PDT 24 Aug 12 05:52:33 PM PDT 24 403284987 ps
T1152 /workspace/coverage/default/218.otp_ctrl_init_fail.832832664 Aug 12 05:54:46 PM PDT 24 Aug 12 05:54:50 PM PDT 24 183114845 ps
T1153 /workspace/coverage/default/1.otp_ctrl_dai_errs.834023768 Aug 12 05:51:04 PM PDT 24 Aug 12 05:51:22 PM PDT 24 418732273 ps
T1154 /workspace/coverage/default/189.otp_ctrl_init_fail.3424625660 Aug 12 05:54:48 PM PDT 24 Aug 12 05:54:52 PM PDT 24 195815008 ps
T1155 /workspace/coverage/default/9.otp_ctrl_parallel_key_req.2084191062 Aug 12 05:51:24 PM PDT 24 Aug 12 05:51:34 PM PDT 24 2898806461 ps
T1156 /workspace/coverage/default/35.otp_ctrl_alert_test.3480224298 Aug 12 05:52:47 PM PDT 24 Aug 12 05:52:49 PM PDT 24 365191395 ps
T1157 /workspace/coverage/default/3.otp_ctrl_parallel_lc_req.3996694796 Aug 12 05:51:11 PM PDT 24 Aug 12 05:51:25 PM PDT 24 930570829 ps
T1158 /workspace/coverage/default/64.otp_ctrl_parallel_lc_esc.4028740433 Aug 12 05:53:46 PM PDT 24 Aug 12 05:53:51 PM PDT 24 2246726858 ps
T1159 /workspace/coverage/cover_reg_top/13.otp_ctrl_intr_test.2555054460 Aug 12 05:48:40 PM PDT 24 Aug 12 05:48:42 PM PDT 24 536584824 ps
T1160 /workspace/coverage/cover_reg_top/45.otp_ctrl_intr_test.3034280923 Aug 12 05:48:49 PM PDT 24 Aug 12 05:48:51 PM PDT 24 132147756 ps
T1161 /workspace/coverage/cover_reg_top/30.otp_ctrl_intr_test.2041219258 Aug 12 05:48:51 PM PDT 24 Aug 12 05:48:53 PM PDT 24 55182950 ps
T1162 /workspace/coverage/cover_reg_top/11.otp_ctrl_intr_test.486606534 Aug 12 05:48:36 PM PDT 24 Aug 12 05:48:37 PM PDT 24 70242761 ps
T264 /workspace/coverage/cover_reg_top/4.otp_ctrl_tl_intg_err.2360184887 Aug 12 05:48:04 PM PDT 24 Aug 12 05:48:14 PM PDT 24 1265749577 ps
T1163 /workspace/coverage/cover_reg_top/10.otp_ctrl_tl_errors.2721782894 Aug 12 05:48:21 PM PDT 24 Aug 12 05:48:25 PM PDT 24 161129561 ps
T1164 /workspace/coverage/cover_reg_top/6.otp_ctrl_tl_errors.1403426038 Aug 12 05:48:12 PM PDT 24 Aug 12 05:48:15 PM PDT 24 83155238 ps
T265 /workspace/coverage/cover_reg_top/10.otp_ctrl_tl_intg_err.4294808068 Aug 12 05:48:22 PM PDT 24 Aug 12 05:48:40 PM PDT 24 1273090748 ps
T1165 /workspace/coverage/cover_reg_top/31.otp_ctrl_intr_test.1626815837 Aug 12 05:48:57 PM PDT 24 Aug 12 05:48:58 PM PDT 24 150352760 ps
T1166 /workspace/coverage/cover_reg_top/42.otp_ctrl_intr_test.1938037826 Aug 12 05:48:50 PM PDT 24 Aug 12 05:48:52 PM PDT 24 78201390 ps
T266 /workspace/coverage/cover_reg_top/14.otp_ctrl_tl_intg_err.1739807181 Aug 12 05:48:26 PM PDT 24 Aug 12 05:48:47 PM PDT 24 1627272598 ps
T1167 /workspace/coverage/cover_reg_top/34.otp_ctrl_intr_test.3791590983 Aug 12 05:48:52 PM PDT 24 Aug 12 05:48:54 PM PDT 24 41287399 ps
T1168 /workspace/coverage/cover_reg_top/43.otp_ctrl_intr_test.1820317858 Aug 12 05:48:49 PM PDT 24 Aug 12 05:48:50 PM PDT 24 40423427 ps
T1169 /workspace/coverage/cover_reg_top/23.otp_ctrl_intr_test.3175972977 Aug 12 05:48:45 PM PDT 24 Aug 12 05:48:47 PM PDT 24 91769503 ps
T1170 /workspace/coverage/cover_reg_top/46.otp_ctrl_intr_test.389008713 Aug 12 05:48:53 PM PDT 24 Aug 12 05:48:55 PM PDT 24 79002100 ps
T272 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_hw_reset.3038080818 Aug 12 05:47:54 PM PDT 24 Aug 12 05:47:57 PM PDT 24 215764332 ps
T332 /workspace/coverage/cover_reg_top/5.otp_ctrl_tl_intg_err.843605862 Aug 12 05:48:16 PM PDT 24 Aug 12 05:48:27 PM PDT 24 637120213 ps
T273 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_bit_bash.2616477115 Aug 12 05:48:03 PM PDT 24 Aug 12 05:48:08 PM PDT 24 259819972 ps
T1171 /workspace/coverage/cover_reg_top/12.otp_ctrl_tl_errors.452411297 Aug 12 05:48:35 PM PDT 24 Aug 12 05:48:42 PM PDT 24 2502454741 ps
T1172 /workspace/coverage/cover_reg_top/13.otp_ctrl_csr_mem_rw_with_rand_reset.1414249790 Aug 12 05:48:34 PM PDT 24 Aug 12 05:48:37 PM PDT 24 134111565 ps
T1173 /workspace/coverage/cover_reg_top/26.otp_ctrl_intr_test.3035974192 Aug 12 05:48:41 PM PDT 24 Aug 12 05:48:42 PM PDT 24 39597309 ps
T1174 /workspace/coverage/cover_reg_top/16.otp_ctrl_csr_mem_rw_with_rand_reset.1841055557 Aug 12 05:48:37 PM PDT 24 Aug 12 05:48:40 PM PDT 24 199239370 ps
T286 /workspace/coverage/cover_reg_top/17.otp_ctrl_csr_rw.3367143344 Aug 12 05:48:36 PM PDT 24 Aug 12 05:48:38 PM PDT 24 91101938 ps
T1175 /workspace/coverage/cover_reg_top/44.otp_ctrl_intr_test.2416804289 Aug 12 05:48:50 PM PDT 24 Aug 12 05:48:52 PM PDT 24 53362781 ps
T274 /workspace/coverage/cover_reg_top/15.otp_ctrl_csr_rw.3099595033 Aug 12 05:48:36 PM PDT 24 Aug 12 05:48:38 PM PDT 24 56833989 ps
T1176 /workspace/coverage/cover_reg_top/17.otp_ctrl_csr_mem_rw_with_rand_reset.3464222041 Aug 12 05:48:34 PM PDT 24 Aug 12 05:48:37 PM PDT 24 228068960 ps
T297 /workspace/coverage/cover_reg_top/7.otp_ctrl_same_csr_outstanding.176459235 Aug 12 05:48:20 PM PDT 24 Aug 12 05:48:22 PM PDT 24 101102918 ps
T1177 /workspace/coverage/cover_reg_top/19.otp_ctrl_intr_test.789636113 Aug 12 05:48:45 PM PDT 24 Aug 12 05:48:46 PM PDT 24 103455786 ps
T275 /workspace/coverage/cover_reg_top/14.otp_ctrl_same_csr_outstanding.1572255322 Aug 12 05:48:35 PM PDT 24 Aug 12 05:48:37 PM PDT 24 82263315 ps
T276 /workspace/coverage/cover_reg_top/12.otp_ctrl_csr_rw.3897151716 Aug 12 05:48:35 PM PDT 24 Aug 12 05:48:37 PM PDT 24 146538854 ps
T277 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_hw_reset.1667592392 Aug 12 05:47:39 PM PDT 24 Aug 12 05:47:41 PM PDT 24 101252738 ps
T1178 /workspace/coverage/cover_reg_top/19.otp_ctrl_tl_errors.747976460 Aug 12 05:48:45 PM PDT 24 Aug 12 05:48:49 PM PDT 24 104698973 ps
T278 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_aliasing.930386288 Aug 12 05:48:02 PM PDT 24 Aug 12 05:48:09 PM PDT 24 602420470 ps
T338 /workspace/coverage/cover_reg_top/11.otp_ctrl_tl_intg_err.2169132451 Aug 12 05:48:36 PM PDT 24 Aug 12 05:48:59 PM PDT 24 2994026959 ps
T341 /workspace/coverage/cover_reg_top/18.otp_ctrl_tl_intg_err.263865061 Aug 12 05:48:40 PM PDT 24 Aug 12 05:49:03 PM PDT 24 9771957184 ps
T1179 /workspace/coverage/cover_reg_top/24.otp_ctrl_intr_test.1148446339 Aug 12 05:48:42 PM PDT 24 Aug 12 05:48:43 PM PDT 24 41336891 ps
T1180 /workspace/coverage/cover_reg_top/7.otp_ctrl_intr_test.4065600298 Aug 12 05:48:11 PM PDT 24 Aug 12 05:48:13 PM PDT 24 39635647 ps
T1181 /workspace/coverage/cover_reg_top/2.otp_ctrl_intr_test.3551084038 Aug 12 05:47:45 PM PDT 24 Aug 12 05:47:46 PM PDT 24 564972480 ps
T1182 /workspace/coverage/cover_reg_top/8.otp_ctrl_csr_mem_rw_with_rand_reset.1950096812 Aug 12 05:48:25 PM PDT 24 Aug 12 05:48:27 PM PDT 24 69623676 ps
T1183 /workspace/coverage/cover_reg_top/22.otp_ctrl_intr_test.3019794258 Aug 12 05:48:45 PM PDT 24 Aug 12 05:48:47 PM PDT 24 69592925 ps
T1184 /workspace/coverage/cover_reg_top/1.otp_ctrl_mem_partial_access.1718823099 Aug 12 05:47:37 PM PDT 24 Aug 12 05:47:39 PM PDT 24 74453300 ps
T1185 /workspace/coverage/cover_reg_top/20.otp_ctrl_intr_test.3246742673 Aug 12 05:48:41 PM PDT 24 Aug 12 05:48:42 PM PDT 24 75474604 ps
T1186 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_mem_rw_with_rand_reset.2925102979 Aug 12 05:48:03 PM PDT 24 Aug 12 05:48:05 PM PDT 24 70800797 ps
T1187 /workspace/coverage/cover_reg_top/5.otp_ctrl_csr_mem_rw_with_rand_reset.3882086173 Aug 12 05:48:14 PM PDT 24 Aug 12 05:48:17 PM PDT 24 371820797 ps
T1188 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_mem_rw_with_rand_reset.2241876998 Aug 12 05:47:55 PM PDT 24 Aug 12 05:47:59 PM PDT 24 101015373 ps
T1189 /workspace/coverage/cover_reg_top/21.otp_ctrl_intr_test.679122 Aug 12 05:48:43 PM PDT 24 Aug 12 05:48:45 PM PDT 24 128377127 ps
T337 /workspace/coverage/cover_reg_top/15.otp_ctrl_tl_intg_err.2717134103 Aug 12 05:48:38 PM PDT 24 Aug 12 05:49:03 PM PDT 24 5054892576 ps
T1190 /workspace/coverage/cover_reg_top/12.otp_ctrl_intr_test.2805314585 Aug 12 05:48:36 PM PDT 24 Aug 12 05:48:38 PM PDT 24 37633841 ps
T279 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_aliasing.3219164369 Aug 12 05:47:53 PM PDT 24 Aug 12 05:47:58 PM PDT 24 318200864 ps
T280 /workspace/coverage/cover_reg_top/5.otp_ctrl_same_csr_outstanding.704465304 Aug 12 05:48:13 PM PDT 24 Aug 12 05:48:15 PM PDT 24 57954246 ps
T281 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_bit_bash.298709006 Aug 12 05:47:46 PM PDT 24 Aug 12 05:48:03 PM PDT 24 6766687788 ps
T298 /workspace/coverage/cover_reg_top/18.otp_ctrl_same_csr_outstanding.2942291066 Aug 12 05:48:39 PM PDT 24 Aug 12 05:48:42 PM PDT 24 177974785 ps
T1191 /workspace/coverage/cover_reg_top/11.otp_ctrl_csr_mem_rw_with_rand_reset.1218409781 Aug 12 05:48:28 PM PDT 24 Aug 12 05:48:31 PM PDT 24 152131260 ps
T1192 /workspace/coverage/cover_reg_top/27.otp_ctrl_intr_test.3530680441 Aug 12 05:48:42 PM PDT 24 Aug 12 05:48:44 PM PDT 24 37790946 ps
T1193 /workspace/coverage/cover_reg_top/13.otp_ctrl_tl_intg_err.4199607902 Aug 12 05:48:26 PM PDT 24 Aug 12 05:48:37 PM PDT 24 2316708423 ps
T287 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_hw_reset.2604168992 Aug 12 05:48:03 PM PDT 24 Aug 12 05:48:05 PM PDT 24 69174233 ps
T1194 /workspace/coverage/cover_reg_top/16.otp_ctrl_intr_test.2311716880 Aug 12 05:48:35 PM PDT 24 Aug 12 05:48:36 PM PDT 24 156799014 ps
T1195 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_bit_bash.930761968 Aug 12 05:47:38 PM PDT 24 Aug 12 05:47:48 PM PDT 24 1946558159 ps
T1196 /workspace/coverage/cover_reg_top/2.otp_ctrl_mem_partial_access.3114272973 Aug 12 05:47:45 PM PDT 24 Aug 12 05:47:46 PM PDT 24 562347366 ps
T1197 /workspace/coverage/cover_reg_top/2.otp_ctrl_tl_errors.2715127541 Aug 12 05:47:47 PM PDT 24 Aug 12 05:47:54 PM PDT 24 325185346 ps
T1198 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_hw_reset.2155272564 Aug 12 05:47:45 PM PDT 24 Aug 12 05:47:48 PM PDT 24 1441648282 ps
T1199 /workspace/coverage/cover_reg_top/35.otp_ctrl_intr_test.2797226694 Aug 12 05:48:50 PM PDT 24 Aug 12 05:48:51 PM PDT 24 40352757 ps
T1200 /workspace/coverage/cover_reg_top/11.otp_ctrl_tl_errors.2681008453 Aug 12 05:48:27 PM PDT 24 Aug 12 05:48:32 PM PDT 24 148585500 ps
T1201 /workspace/coverage/cover_reg_top/2.otp_ctrl_mem_walk.2998427597 Aug 12 05:47:47 PM PDT 24 Aug 12 05:47:50 PM PDT 24 507423073 ps
T334 /workspace/coverage/cover_reg_top/0.otp_ctrl_tl_intg_err.238809466 Aug 12 05:47:32 PM PDT 24 Aug 12 05:47:53 PM PDT 24 4265613303 ps
T299 /workspace/coverage/cover_reg_top/19.otp_ctrl_csr_rw.3694480167 Aug 12 05:48:44 PM PDT 24 Aug 12 05:48:46 PM PDT 24 135850499 ps
T300 /workspace/coverage/cover_reg_top/9.otp_ctrl_same_csr_outstanding.1629827141 Aug 12 05:48:25 PM PDT 24 Aug 12 05:48:28 PM PDT 24 79688136 ps
T1202 /workspace/coverage/cover_reg_top/9.otp_ctrl_intr_test.2639809515 Aug 12 05:48:20 PM PDT 24 Aug 12 05:48:22 PM PDT 24 529615474 ps
T301 /workspace/coverage/cover_reg_top/6.otp_ctrl_same_csr_outstanding.4146833841 Aug 12 05:48:11 PM PDT 24 Aug 12 05:48:15 PM PDT 24 145663536 ps
T1203 /workspace/coverage/cover_reg_top/47.otp_ctrl_intr_test.651227594 Aug 12 05:48:51 PM PDT 24 Aug 12 05:48:53 PM PDT 24 136338722 ps
T1204 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_mem_rw_with_rand_reset.1904196218 Aug 12 05:47:42 PM PDT 24 Aug 12 05:47:44 PM PDT 24 272242661 ps
T1205 /workspace/coverage/cover_reg_top/28.otp_ctrl_intr_test.4293378995 Aug 12 05:48:57 PM PDT 24 Aug 12 05:48:59 PM PDT 24 600772719 ps
T1206 /workspace/coverage/cover_reg_top/1.otp_ctrl_intr_test.3356757463 Aug 12 05:47:38 PM PDT 24 Aug 12 05:47:40 PM PDT 24 85971290 ps
T1207 /workspace/coverage/cover_reg_top/14.otp_ctrl_csr_mem_rw_with_rand_reset.2741573957 Aug 12 05:48:39 PM PDT 24 Aug 12 05:48:42 PM PDT 24 74609328 ps
T1208 /workspace/coverage/cover_reg_top/48.otp_ctrl_intr_test.3143774640 Aug 12 05:48:55 PM PDT 24 Aug 12 05:48:57 PM PDT 24 557442552 ps
T302 /workspace/coverage/cover_reg_top/8.otp_ctrl_same_csr_outstanding.1670486256 Aug 12 05:48:20 PM PDT 24 Aug 12 05:48:23 PM PDT 24 45597383 ps
T1209 /workspace/coverage/cover_reg_top/25.otp_ctrl_intr_test.3355737806 Aug 12 05:48:44 PM PDT 24 Aug 12 05:48:45 PM PDT 24 38230179 ps
T340 /workspace/coverage/cover_reg_top/12.otp_ctrl_tl_intg_err.2329157428 Aug 12 05:48:34 PM PDT 24 Aug 12 05:48:48 PM PDT 24 10397871397 ps
T1210 /workspace/coverage/cover_reg_top/0.otp_ctrl_mem_walk.6093693 Aug 12 05:47:39 PM PDT 24 Aug 12 05:47:41 PM PDT 24 513447292 ps
T1211 /workspace/coverage/cover_reg_top/10.otp_ctrl_intr_test.3794356000 Aug 12 05:48:22 PM PDT 24 Aug 12 05:48:23 PM PDT 24 145054894 ps
T1212 /workspace/coverage/cover_reg_top/6.otp_ctrl_intr_test.345757109 Aug 12 05:48:11 PM PDT 24 Aug 12 05:48:12 PM PDT 24 37442613 ps
T1213 /workspace/coverage/cover_reg_top/12.otp_ctrl_same_csr_outstanding.262854910 Aug 12 05:48:33 PM PDT 24 Aug 12 05:48:38 PM PDT 24 253993032 ps
T1214 /workspace/coverage/cover_reg_top/11.otp_ctrl_csr_rw.2965425728 Aug 12 05:48:27 PM PDT 24 Aug 12 05:48:28 PM PDT 24 47041253 ps
T1215 /workspace/coverage/cover_reg_top/39.otp_ctrl_intr_test.3255848361 Aug 12 05:48:55 PM PDT 24 Aug 12 05:48:56 PM PDT 24 43546888 ps
T335 /workspace/coverage/cover_reg_top/6.otp_ctrl_tl_intg_err.4074474071 Aug 12 05:48:12 PM PDT 24 Aug 12 05:48:26 PM PDT 24 2603123479 ps
T336 /workspace/coverage/cover_reg_top/3.otp_ctrl_tl_intg_err.849837543 Aug 12 05:47:54 PM PDT 24 Aug 12 05:48:19 PM PDT 24 4978231971 ps
T1216 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_aliasing.1656617538 Aug 12 05:47:54 PM PDT 24 Aug 12 05:47:57 PM PDT 24 104896428 ps
T1217 /workspace/coverage/cover_reg_top/4.otp_ctrl_same_csr_outstanding.2186813396 Aug 12 05:48:03 PM PDT 24 Aug 12 05:48:05 PM PDT 24 169120314 ps
T1218 /workspace/coverage/cover_reg_top/17.otp_ctrl_intr_test.51962106 Aug 12 05:48:39 PM PDT 24 Aug 12 05:48:41 PM PDT 24 140994764 ps
T339 /workspace/coverage/cover_reg_top/16.otp_ctrl_tl_intg_err.3753915826 Aug 12 05:48:36 PM PDT 24 Aug 12 05:48:53 PM PDT 24 2360991058 ps
T1219 /workspace/coverage/cover_reg_top/18.otp_ctrl_csr_mem_rw_with_rand_reset.1620999644 Aug 12 05:48:34 PM PDT 24 Aug 12 05:48:37 PM PDT 24 137086410 ps
T1220 /workspace/coverage/cover_reg_top/4.otp_ctrl_mem_partial_access.3612336381 Aug 12 05:48:02 PM PDT 24 Aug 12 05:48:03 PM PDT 24 40273817 ps
T295 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_bit_bash.4000219446 Aug 12 05:47:54 PM PDT 24 Aug 12 05:48:04 PM PDT 24 477178756 ps
T1221 /workspace/coverage/cover_reg_top/17.otp_ctrl_same_csr_outstanding.1422496149 Aug 12 05:48:37 PM PDT 24 Aug 12 05:48:40 PM PDT 24 136318152 ps
T1222 /workspace/coverage/cover_reg_top/19.otp_ctrl_csr_mem_rw_with_rand_reset.2154740627 Aug 12 05:48:42 PM PDT 24 Aug 12 05:48:45 PM PDT 24 101106667 ps
T1223 /workspace/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.2330863653 Aug 12 05:47:38 PM PDT 24 Aug 12 05:47:41 PM PDT 24 205632394 ps
T1224 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_hw_reset.4080171780 Aug 12 05:47:39 PM PDT 24 Aug 12 05:47:41 PM PDT 24 71666117 ps
T1225 /workspace/coverage/cover_reg_top/36.otp_ctrl_intr_test.1526166493 Aug 12 05:48:57 PM PDT 24 Aug 12 05:48:58 PM PDT 24 143392204 ps
T1226 /workspace/coverage/cover_reg_top/7.otp_ctrl_csr_mem_rw_with_rand_reset.2967547412 Aug 12 05:48:21 PM PDT 24 Aug 12 05:48:24 PM PDT 24 157309264 ps
T1227 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_mem_rw_with_rand_reset.925327196 Aug 12 05:48:01 PM PDT 24 Aug 12 05:48:05 PM PDT 24 1069947842 ps
T1228 /workspace/coverage/cover_reg_top/41.otp_ctrl_intr_test.1194058475 Aug 12 05:48:54 PM PDT 24 Aug 12 05:48:56 PM PDT 24 45201397 ps
T1229 /workspace/coverage/cover_reg_top/6.otp_ctrl_csr_mem_rw_with_rand_reset.460523583 Aug 12 05:48:12 PM PDT 24 Aug 12 05:48:16 PM PDT 24 443250032 ps
T1230 /workspace/coverage/cover_reg_top/13.otp_ctrl_same_csr_outstanding.1065800453 Aug 12 05:48:37 PM PDT 24 Aug 12 05:48:40 PM PDT 24 183530601 ps
T1231 /workspace/coverage/cover_reg_top/18.otp_ctrl_tl_errors.2868729820 Aug 12 05:48:36 PM PDT 24 Aug 12 05:48:41 PM PDT 24 1022978208 ps
T288 /workspace/coverage/cover_reg_top/6.otp_ctrl_csr_rw.1473894032 Aug 12 05:48:13 PM PDT 24 Aug 12 05:48:15 PM PDT 24 49564674 ps
T1232 /workspace/coverage/cover_reg_top/7.otp_ctrl_tl_errors.2910343249 Aug 12 05:48:11 PM PDT 24 Aug 12 05:48:15 PM PDT 24 189548567 ps
T1233 /workspace/coverage/cover_reg_top/3.otp_ctrl_mem_partial_access.3358056095 Aug 12 05:47:54 PM PDT 24 Aug 12 05:47:56 PM PDT 24 71685193 ps
T289 /workspace/coverage/cover_reg_top/8.otp_ctrl_csr_rw.1582199312 Aug 12 05:48:20 PM PDT 24 Aug 12 05:48:22 PM PDT 24 147588537 ps
T1234 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_mem_rw_with_rand_reset.2465665462 Aug 12 05:47:45 PM PDT 24 Aug 12 05:47:48 PM PDT 24 292456551 ps
T1235 /workspace/coverage/cover_reg_top/1.otp_ctrl_mem_walk.1784466360 Aug 12 05:47:41 PM PDT 24 Aug 12 05:47:42 PM PDT 24 36944184 ps
T1236 /workspace/coverage/cover_reg_top/16.otp_ctrl_same_csr_outstanding.1436805402 Aug 12 05:48:36 PM PDT 24 Aug 12 05:48:39 PM PDT 24 1045174710 ps
T290 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_aliasing.2484575353 Aug 12 05:47:45 PM PDT 24 Aug 12 05:47:49 PM PDT 24 211110432 ps
T291 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_aliasing.420403756 Aug 12 05:47:39 PM PDT 24 Aug 12 05:47:45 PM PDT 24 158617486 ps
T1237 /workspace/coverage/cover_reg_top/9.otp_ctrl_tl_intg_err.556860083 Aug 12 05:48:20 PM PDT 24 Aug 12 05:48:40 PM PDT 24 1593454457 ps
T1238 /workspace/coverage/cover_reg_top/29.otp_ctrl_intr_test.450801835 Aug 12 05:48:51 PM PDT 24 Aug 12 05:48:52 PM PDT 24 76575201 ps
T1239 /workspace/coverage/cover_reg_top/8.otp_ctrl_intr_test.4215168708 Aug 12 05:48:18 PM PDT 24 Aug 12 05:48:20 PM PDT 24 151927307 ps
T1240 /workspace/coverage/cover_reg_top/0.otp_ctrl_mem_partial_access.2027201853 Aug 12 05:47:40 PM PDT 24 Aug 12 05:47:42 PM PDT 24 90160456 ps
T1241 /workspace/coverage/cover_reg_top/2.otp_ctrl_same_csr_outstanding.3385463160 Aug 12 05:47:53 PM PDT 24 Aug 12 05:47:56 PM PDT 24 238387791 ps
T1242 /workspace/coverage/cover_reg_top/16.otp_ctrl_tl_errors.2665610978 Aug 12 05:48:40 PM PDT 24 Aug 12 05:48:45 PM PDT 24 67394047 ps
T292 /workspace/coverage/cover_reg_top/10.otp_ctrl_csr_rw.3666032066 Aug 12 05:48:21 PM PDT 24 Aug 12 05:48:23 PM PDT 24 146131863 ps
T1243 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_bit_bash.1454245523 Aug 12 05:47:43 PM PDT 24 Aug 12 05:47:54 PM PDT 24 510502277 ps
T1244 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_rw.3922118442 Aug 12 05:48:04 PM PDT 24 Aug 12 05:48:06 PM PDT 24 101658560 ps
T1245 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_rw.1701473575 Aug 12 05:47:45 PM PDT 24 Aug 12 05:47:46 PM PDT 24 125332646 ps
T1246 /workspace/coverage/cover_reg_top/4.otp_ctrl_mem_walk.642025994 Aug 12 05:48:01 PM PDT 24 Aug 12 05:48:03 PM PDT 24 514003581 ps
T267 /workspace/coverage/cover_reg_top/8.otp_ctrl_tl_intg_err.3463142755 Aug 12 05:48:22 PM PDT 24 Aug 12 05:48:41 PM PDT 24 2476366705 ps
T1247 /workspace/coverage/cover_reg_top/9.otp_ctrl_csr_mem_rw_with_rand_reset.2823966929 Aug 12 05:48:19 PM PDT 24 Aug 12 05:48:22 PM PDT 24 75111242 ps
T1248 /workspace/coverage/cover_reg_top/9.otp_ctrl_tl_errors.2592296587 Aug 12 05:48:20 PM PDT 24 Aug 12 05:48:25 PM PDT 24 141968547 ps
T1249 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_rw.3786651917 Aug 12 05:47:43 PM PDT 24 Aug 12 05:47:45 PM PDT 24 52143892 ps
T310 /workspace/coverage/cover_reg_top/13.otp_ctrl_tl_errors.1061181182 Aug 12 05:48:35 PM PDT 24 Aug 12 05:48:40 PM PDT 24 229649594 ps
T1250 /workspace/coverage/cover_reg_top/1.otp_ctrl_same_csr_outstanding.2286975971 Aug 12 05:47:47 PM PDT 24 Aug 12 05:47:50 PM PDT 24 85890695 ps
T1251 /workspace/coverage/cover_reg_top/15.otp_ctrl_tl_errors.1191417143 Aug 12 05:48:36 PM PDT 24 Aug 12 05:48:39 PM PDT 24 187114102 ps
T1252 /workspace/coverage/cover_reg_top/5.otp_ctrl_intr_test.510728130 Aug 12 05:48:10 PM PDT 24 Aug 12 05:48:11 PM PDT 24 128766687 ps
T1253 /workspace/coverage/cover_reg_top/1.otp_ctrl_tl_errors.3349317672 Aug 12 05:47:40 PM PDT 24 Aug 12 05:47:47 PM PDT 24 2549318057 ps
T1254 /workspace/coverage/cover_reg_top/5.otp_ctrl_tl_errors.459711356 Aug 12 05:48:12 PM PDT 24 Aug 12 05:48:19 PM PDT 24 1667134654 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%