Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
84.44 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv



Summary for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 18 1 17 94.44
Crosses 72 13 59 81.94


Variables for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
err_code_vals 7 1 6 85.71 100 1 1 0
partition 11 0 11 100.00 100 1 1 0


Crosses for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
dai_err_code_for_all_partitions 72 13 59 81.94 100 1 1 0


Summary for Variable err_code_vals

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 7 1 6 85.71


User Defined Bins for err_code_vals

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
macro_err 0 1 1


Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_err 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err 43159 1 T1 530 T8 124 T5 151
access_err 46040 1 T1 9 T2 45 T4 23
write_blank_err 371 1 T6 1 T13 10 T14 1
ecc_uncorr_err 54097 1 T6 521 T13 476 T111 545
ecc_corr_err 1158 1 T111 16 T35 36 T145 6
no_err 66926 1 T1 60 T2 165 T4 30



Summary for Variable partition

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 11 0 11 100.00


User Defined Bins for partition

Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_idx 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
life_cycle 790 1 T6 3 T13 23 T14 17
secret2 18937 1 T1 6 T2 35 T4 4
secret1 27771 1 T1 536 T2 15 T4 3
secret0 27263 1 T1 10 T2 14 T4 6
hw_cfg1 28994 1 T1 1 T2 24 T4 1
hw_cfg0 23481 1 T2 38 T4 4 T8 3
rot_creator_auth_state 14731 1 T1 6 T2 15 T4 7
rot_creator_auth_codesign 16060 1 T1 15 T2 18 T4 5
owner_sw_cfg 14492 1 T1 8 T2 12 T4 1
creator_sw_cfg 15835 1 T1 10 T2 26 T4 10
vendor_test 23397 1 T1 7 T2 13 T4 12



Summary for Cross dai_err_code_for_all_partitions

Samples crossed: err_code_vals partition
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
TOTAL 72 13 59 81.94 13
Automatically Generated Cross Bins 72 13 59 81.94 13
User Defined Cross Bins 0 0 0


Automatically Generated Cross Bins for dai_err_code_for_all_partitions

Uncovered bins
err_code_valspartitionCOUNTAT LEASTNUMBERSTATUS
[fsm_err] [life_cycle] 0 1 1
[ecc_corr_err] [vendor_test] 0 1 1
[macro_err] [secret2 , secret1 , secret0 , hw_cfg1 , hw_cfg0 , rot_creator_auth_state , rot_creator_auth_codesign , owner_sw_cfg , creator_sw_cfg , vendor_test] -- -- 10
[no_err] [life_cycle] 0 1 1


Covered bins
err_code_valspartitionCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err secret2 2342 1 T121 463 T102 63 T307 170
fsm_err secret1 9344 1 T1 530 T308 104 T182 148
fsm_err secret0 3801 1 T28 129 T202 76 T154 320
fsm_err hw_cfg1 2250 1 T309 37 T163 22 T310 25
fsm_err hw_cfg0 5166 1 T157 66 T182 94 T311 17
fsm_err rot_creator_auth_state 1671 1 T8 124 T178 45 T312 153
fsm_err rot_creator_auth_codesign 2422 1 T17 33 T313 361 T314 50
fsm_err owner_sw_cfg 1930 1 T174 51 T245 275 T315 327
fsm_err creator_sw_cfg 4022 1 T5 151 T16 215 T233 52
fsm_err vendor_test 10211 1 T35 48 T115 30 T145 20
access_err life_cycle 790 1 T6 3 T13 23 T14 17
access_err secret2 7897 1 T2 12 T8 3 T5 21
access_err secret1 5183 1 T4 3 T29 15 T35 14
access_err secret0 4190 1 T1 2 T4 2 T5 4
access_err hw_cfg1 1152 1 T2 3 T5 6 T29 11
access_err hw_cfg0 2056 1 T29 5 T35 7 T16 58
access_err rot_creator_auth_state 3947 1 T2 4 T4 4 T5 19
access_err rot_creator_auth_codesign 5817 1 T1 7 T2 7 T4 4
access_err owner_sw_cfg 4509 1 T2 3 T5 15 T29 7
access_err creator_sw_cfg 5232 1 T2 11 T4 3 T5 7
access_err vendor_test 5267 1 T2 5 T4 7 T8 2
write_blank_err secret2 12 1 T316 1 T317 1 T318 1
write_blank_err secret1 17 1 T319 1 T307 1 T226 1
write_blank_err secret0 38 1 T13 1 T57 1 T209 1
write_blank_err hw_cfg1 54 1 T6 1 T170 1 T98 1
write_blank_err hw_cfg0 27 1 T148 1 T182 2 T187 1
write_blank_err rot_creator_auth_state 119 1 T13 2 T14 1 T320 1
write_blank_err rot_creator_auth_codesign 43 1 T57 2 T187 2 T307 1
write_blank_err owner_sw_cfg 33 1 T13 6 T209 1 T187 2
write_blank_err creator_sw_cfg 10 1 T307 2 T146 2 T318 3
write_blank_err vendor_test 18 1 T13 1 T321 1 T136 1
ecc_uncorr_err secret2 4498 1 T111 55 T322 58 T323 103
ecc_uncorr_err secret1 7410 1 T111 145 T171 115 T319 518
ecc_uncorr_err secret0 13264 1 T13 476 T111 116 T145 19
ecc_uncorr_err hw_cfg1 17695 1 T6 521 T111 120 T170 242
ecc_uncorr_err hw_cfg0 6705 1 T111 50 T174 58 T148 363
ecc_uncorr_err rot_creator_auth_state 2189 1 T14 626 T171 44 T174 71
ecc_uncorr_err rot_creator_auth_codesign 1135 1 T111 59 T171 37 T175 66
ecc_uncorr_err owner_sw_cfg 741 1 T145 20 T176 29 T208 65
ecc_uncorr_err creator_sw_cfg 460 1 T145 20 T171 71 T175 68
ecc_corr_err secret2 73 1 T35 9 T171 3 T42 2
ecc_corr_err secret1 82 1 T111 1 T68 2 T171 1
ecc_corr_err secret0 126 1 T111 8 T35 4 T68 1
ecc_corr_err hw_cfg1 174 1 T111 4 T35 3 T145 4
ecc_corr_err hw_cfg0 225 1 T111 1 T35 7 T68 8
ecc_corr_err rot_creator_auth_state 135 1 T111 1 T35 4 T68 3
ecc_corr_err rot_creator_auth_codesign 101 1 T79 1 T42 3 T77 1
ecc_corr_err owner_sw_cfg 132 1 T35 7 T145 1 T68 4
ecc_corr_err creator_sw_cfg 110 1 T111 1 T35 2 T145 1
no_err secret2 4115 1 T1 6 T2 23 T4 4
no_err secret1 5735 1 T1 6 T2 15 T8 2
no_err secret0 5844 1 T1 8 T2 14 T4 4
no_err hw_cfg1 7669 1 T1 1 T2 21 T4 1
no_err hw_cfg0 9302 1 T2 38 T4 4 T8 3
no_err rot_creator_auth_state 6670 1 T1 6 T2 11 T4 3
no_err rot_creator_auth_codesign 6542 1 T1 8 T2 11 T4 1
no_err owner_sw_cfg 7147 1 T1 8 T2 9 T4 1
no_err creator_sw_cfg 6001 1 T1 10 T2 15 T4 7
no_err vendor_test 7901 1 T1 7 T2 8 T4 5


User Defined Cross Bins for dai_err_code_for_all_partitions

Excluded/Illegal bins
NAMECOUNTSTATUS
vendor_test_ecc_uncorrectable_err 0 Illegal
life_cycle_ignore 0 Excluded

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