Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
94.82 93.81 96.15 95.75 91.41 97.10 96.34 93.21


Total test records in report: 1293
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html

T1058 /workspace/coverage/default/2.otp_ctrl_parallel_key_req.4184248751 Aug 16 06:17:26 PM PDT 24 Aug 16 06:17:53 PM PDT 24 2549347791 ps
T1059 /workspace/coverage/default/38.otp_ctrl_stress_all.1986221452 Aug 16 06:18:57 PM PDT 24 Aug 16 06:20:44 PM PDT 24 15697084932 ps
T1060 /workspace/coverage/default/157.otp_ctrl_parallel_lc_esc.2918324194 Aug 16 06:20:21 PM PDT 24 Aug 16 06:20:30 PM PDT 24 180538203 ps
T1061 /workspace/coverage/default/154.otp_ctrl_init_fail.286747282 Aug 16 06:20:15 PM PDT 24 Aug 16 06:20:21 PM PDT 24 655297692 ps
T1062 /workspace/coverage/default/29.otp_ctrl_stress_all_with_rand_reset.741632712 Aug 16 06:18:39 PM PDT 24 Aug 16 06:20:57 PM PDT 24 13846765051 ps
T1063 /workspace/coverage/default/41.otp_ctrl_parallel_lc_esc.153702002 Aug 16 06:19:09 PM PDT 24 Aug 16 06:19:23 PM PDT 24 892897187 ps
T1064 /workspace/coverage/default/6.otp_ctrl_check_fail.4003311358 Aug 16 06:17:34 PM PDT 24 Aug 16 06:17:39 PM PDT 24 138763730 ps
T1065 /workspace/coverage/default/42.otp_ctrl_parallel_lc_req.1575302527 Aug 16 06:19:10 PM PDT 24 Aug 16 06:19:25 PM PDT 24 581342147 ps
T1066 /workspace/coverage/default/46.otp_ctrl_init_fail.676356044 Aug 16 06:19:21 PM PDT 24 Aug 16 06:19:26 PM PDT 24 356739249 ps
T1067 /workspace/coverage/default/121.otp_ctrl_init_fail.649760497 Aug 16 06:20:12 PM PDT 24 Aug 16 06:20:17 PM PDT 24 133372374 ps
T1068 /workspace/coverage/default/279.otp_ctrl_init_fail.3944769163 Aug 16 06:20:57 PM PDT 24 Aug 16 06:21:01 PM PDT 24 294718786 ps
T1069 /workspace/coverage/default/293.otp_ctrl_init_fail.2709010535 Aug 16 06:20:54 PM PDT 24 Aug 16 06:20:59 PM PDT 24 467395164 ps
T1070 /workspace/coverage/default/52.otp_ctrl_parallel_lc_esc.2755680423 Aug 16 06:19:29 PM PDT 24 Aug 16 06:19:36 PM PDT 24 1672170283 ps
T1071 /workspace/coverage/default/54.otp_ctrl_parallel_lc_esc.747744615 Aug 16 06:19:32 PM PDT 24 Aug 16 06:19:36 PM PDT 24 426679083 ps
T1072 /workspace/coverage/default/2.otp_ctrl_background_chks.273015573 Aug 16 06:17:15 PM PDT 24 Aug 16 06:17:58 PM PDT 24 2745295442 ps
T385 /workspace/coverage/default/42.otp_ctrl_stress_all_with_rand_reset.989068094 Aug 16 06:19:12 PM PDT 24 Aug 16 06:21:13 PM PDT 24 51409092510 ps
T1073 /workspace/coverage/default/98.otp_ctrl_init_fail.1882562382 Aug 16 06:20:02 PM PDT 24 Aug 16 06:20:06 PM PDT 24 414361486 ps
T393 /workspace/coverage/default/48.otp_ctrl_check_fail.2035461316 Aug 16 06:19:32 PM PDT 24 Aug 16 06:20:07 PM PDT 24 3850260433 ps
T1074 /workspace/coverage/default/20.otp_ctrl_dai_lock.737354829 Aug 16 06:18:08 PM PDT 24 Aug 16 06:18:32 PM PDT 24 2377942814 ps
T1075 /workspace/coverage/default/35.otp_ctrl_parallel_key_req.2538528143 Aug 16 06:18:51 PM PDT 24 Aug 16 06:19:10 PM PDT 24 2873741229 ps
T1076 /workspace/coverage/default/116.otp_ctrl_parallel_lc_esc.1686803756 Aug 16 06:20:15 PM PDT 24 Aug 16 06:20:46 PM PDT 24 3878298816 ps
T1077 /workspace/coverage/default/20.otp_ctrl_smoke.3392509849 Aug 16 06:18:07 PM PDT 24 Aug 16 06:18:21 PM PDT 24 8025690192 ps
T1078 /workspace/coverage/default/66.otp_ctrl_stress_all_with_rand_reset.3273901779 Aug 16 06:19:39 PM PDT 24 Aug 16 06:20:48 PM PDT 24 2612928453 ps
T1079 /workspace/coverage/default/112.otp_ctrl_init_fail.3184459255 Aug 16 06:20:05 PM PDT 24 Aug 16 06:20:11 PM PDT 24 706524184 ps
T1080 /workspace/coverage/default/199.otp_ctrl_init_fail.1782371194 Aug 16 06:20:30 PM PDT 24 Aug 16 06:20:35 PM PDT 24 638917010 ps
T71 /workspace/coverage/default/162.otp_ctrl_parallel_lc_esc.2365703467 Aug 16 06:20:21 PM PDT 24 Aug 16 06:20:32 PM PDT 24 493425071 ps
T1081 /workspace/coverage/default/40.otp_ctrl_parallel_lc_esc.3201392970 Aug 16 06:19:12 PM PDT 24 Aug 16 06:19:17 PM PDT 24 118799072 ps
T1082 /workspace/coverage/default/1.otp_ctrl_parallel_lc_esc.1359570655 Aug 16 06:17:11 PM PDT 24 Aug 16 06:17:22 PM PDT 24 221727770 ps
T1083 /workspace/coverage/default/7.otp_ctrl_alert_test.659399751 Aug 16 06:17:41 PM PDT 24 Aug 16 06:17:43 PM PDT 24 161862045 ps
T1084 /workspace/coverage/default/61.otp_ctrl_init_fail.2758731129 Aug 16 06:19:37 PM PDT 24 Aug 16 06:19:43 PM PDT 24 196391946 ps
T1085 /workspace/coverage/default/40.otp_ctrl_smoke.2861286885 Aug 16 06:19:06 PM PDT 24 Aug 16 06:19:13 PM PDT 24 460048177 ps
T1086 /workspace/coverage/default/47.otp_ctrl_dai_lock.3258495300 Aug 16 06:19:18 PM PDT 24 Aug 16 06:19:30 PM PDT 24 1039814041 ps
T1087 /workspace/coverage/default/67.otp_ctrl_init_fail.3670062416 Aug 16 06:19:40 PM PDT 24 Aug 16 06:19:44 PM PDT 24 1976700977 ps
T1088 /workspace/coverage/default/24.otp_ctrl_init_fail.3461690542 Aug 16 06:18:21 PM PDT 24 Aug 16 06:18:25 PM PDT 24 346885885 ps
T1089 /workspace/coverage/default/69.otp_ctrl_init_fail.621541407 Aug 16 06:19:53 PM PDT 24 Aug 16 06:19:57 PM PDT 24 356821784 ps
T1090 /workspace/coverage/default/174.otp_ctrl_parallel_lc_esc.3762803680 Aug 16 06:20:23 PM PDT 24 Aug 16 06:20:32 PM PDT 24 491280534 ps
T1091 /workspace/coverage/default/3.otp_ctrl_init_fail.1156937318 Aug 16 06:17:24 PM PDT 24 Aug 16 06:17:31 PM PDT 24 2048343924 ps
T1092 /workspace/coverage/default/47.otp_ctrl_parallel_key_req.4109846751 Aug 16 06:19:23 PM PDT 24 Aug 16 06:19:45 PM PDT 24 1121256614 ps
T1093 /workspace/coverage/default/228.otp_ctrl_init_fail.3101333284 Aug 16 06:20:48 PM PDT 24 Aug 16 06:20:52 PM PDT 24 227036478 ps
T1094 /workspace/coverage/default/219.otp_ctrl_init_fail.445551211 Aug 16 06:20:48 PM PDT 24 Aug 16 06:20:52 PM PDT 24 378344224 ps
T1095 /workspace/coverage/default/1.otp_ctrl_smoke.2920976307 Aug 16 06:17:07 PM PDT 24 Aug 16 06:17:13 PM PDT 24 922143956 ps
T78 /workspace/coverage/default/283.otp_ctrl_init_fail.3028254018 Aug 16 06:20:53 PM PDT 24 Aug 16 06:20:59 PM PDT 24 2214182955 ps
T1096 /workspace/coverage/default/46.otp_ctrl_alert_test.2035967857 Aug 16 06:19:22 PM PDT 24 Aug 16 06:19:24 PM PDT 24 198792940 ps
T1097 /workspace/coverage/default/30.otp_ctrl_smoke.3795571954 Aug 16 06:18:40 PM PDT 24 Aug 16 06:18:44 PM PDT 24 211494072 ps
T1098 /workspace/coverage/default/55.otp_ctrl_init_fail.869467014 Aug 16 06:19:32 PM PDT 24 Aug 16 06:19:35 PM PDT 24 101420147 ps
T1099 /workspace/coverage/default/28.otp_ctrl_dai_lock.4054381495 Aug 16 06:18:42 PM PDT 24 Aug 16 06:19:00 PM PDT 24 1137777175 ps
T1100 /workspace/coverage/default/21.otp_ctrl_dai_lock.107340912 Aug 16 06:18:12 PM PDT 24 Aug 16 06:18:19 PM PDT 24 966727961 ps
T1101 /workspace/coverage/default/90.otp_ctrl_init_fail.3526620324 Aug 16 06:19:54 PM PDT 24 Aug 16 06:19:58 PM PDT 24 151099813 ps
T1102 /workspace/coverage/default/20.otp_ctrl_parallel_key_req.509983131 Aug 16 06:18:10 PM PDT 24 Aug 16 06:18:17 PM PDT 24 2528310503 ps
T1103 /workspace/coverage/default/15.otp_ctrl_dai_errs.213015884 Aug 16 06:17:53 PM PDT 24 Aug 16 06:18:23 PM PDT 24 3425581239 ps
T1104 /workspace/coverage/default/1.otp_ctrl_background_chks.1301608924 Aug 16 06:17:09 PM PDT 24 Aug 16 06:17:32 PM PDT 24 2054463652 ps
T1105 /workspace/coverage/default/297.otp_ctrl_init_fail.2338438630 Aug 16 06:20:59 PM PDT 24 Aug 16 06:21:02 PM PDT 24 118339129 ps
T1106 /workspace/coverage/default/44.otp_ctrl_alert_test.2822143229 Aug 16 06:19:17 PM PDT 24 Aug 16 06:19:19 PM PDT 24 53087711 ps
T1107 /workspace/coverage/default/32.otp_ctrl_stress_all_with_rand_reset.1222343420 Aug 16 06:18:45 PM PDT 24 Aug 16 06:20:53 PM PDT 24 9020041442 ps
T1108 /workspace/coverage/default/7.otp_ctrl_dai_errs.1590245549 Aug 16 06:17:45 PM PDT 24 Aug 16 06:18:12 PM PDT 24 1087099563 ps
T1109 /workspace/coverage/default/44.otp_ctrl_regwen.4232231804 Aug 16 06:19:12 PM PDT 24 Aug 16 06:19:18 PM PDT 24 739989154 ps
T53 /workspace/coverage/default/40.otp_ctrl_check_fail.833519527 Aug 16 06:19:07 PM PDT 24 Aug 16 06:19:30 PM PDT 24 1812445758 ps
T1110 /workspace/coverage/default/149.otp_ctrl_init_fail.3652169664 Aug 16 06:20:20 PM PDT 24 Aug 16 06:20:24 PM PDT 24 125790340 ps
T1111 /workspace/coverage/default/5.otp_ctrl_dai_errs.3085520795 Aug 16 06:17:37 PM PDT 24 Aug 16 06:18:06 PM PDT 24 5849984693 ps
T1112 /workspace/coverage/default/284.otp_ctrl_init_fail.1354485660 Aug 16 06:20:57 PM PDT 24 Aug 16 06:21:01 PM PDT 24 255982804 ps
T1113 /workspace/coverage/default/37.otp_ctrl_dai_lock.2175245734 Aug 16 06:18:56 PM PDT 24 Aug 16 06:19:02 PM PDT 24 166441754 ps
T1114 /workspace/coverage/default/1.otp_ctrl_parallel_key_req.1147484439 Aug 16 06:17:11 PM PDT 24 Aug 16 06:17:37 PM PDT 24 1974837763 ps
T1115 /workspace/coverage/default/212.otp_ctrl_init_fail.2077853467 Aug 16 06:20:44 PM PDT 24 Aug 16 06:20:49 PM PDT 24 126014281 ps
T1116 /workspace/coverage/default/263.otp_ctrl_init_fail.3535024592 Aug 16 06:20:57 PM PDT 24 Aug 16 06:21:01 PM PDT 24 359635112 ps
T1117 /workspace/coverage/default/48.otp_ctrl_parallel_lc_req.630393378 Aug 16 06:19:31 PM PDT 24 Aug 16 06:19:54 PM PDT 24 1669217376 ps
T1118 /workspace/coverage/default/119.otp_ctrl_parallel_lc_esc.1084080955 Aug 16 06:20:18 PM PDT 24 Aug 16 06:20:21 PM PDT 24 136870117 ps
T1119 /workspace/coverage/default/64.otp_ctrl_parallel_lc_esc.271191252 Aug 16 06:19:39 PM PDT 24 Aug 16 06:19:47 PM PDT 24 2217527248 ps
T1120 /workspace/coverage/default/43.otp_ctrl_init_fail.4046423996 Aug 16 06:19:15 PM PDT 24 Aug 16 06:19:18 PM PDT 24 105253073 ps
T1121 /workspace/coverage/default/186.otp_ctrl_init_fail.3890980457 Aug 16 06:20:32 PM PDT 24 Aug 16 06:20:35 PM PDT 24 234938505 ps
T1122 /workspace/coverage/default/93.otp_ctrl_stress_all_with_rand_reset.3413099001 Aug 16 06:19:55 PM PDT 24 Aug 16 06:20:37 PM PDT 24 2812840946 ps
T132 /workspace/coverage/default/36.otp_ctrl_parallel_lc_esc.3167037763 Aug 16 06:18:51 PM PDT 24 Aug 16 06:18:58 PM PDT 24 362724472 ps
T1123 /workspace/coverage/default/0.otp_ctrl_low_freq_read.3385637141 Aug 16 06:17:03 PM PDT 24 Aug 16 06:17:15 PM PDT 24 3444159981 ps
T1124 /workspace/coverage/default/49.otp_ctrl_init_fail.4288391249 Aug 16 06:19:28 PM PDT 24 Aug 16 06:19:32 PM PDT 24 107689167 ps
T1125 /workspace/coverage/default/23.otp_ctrl_parallel_key_req.4218700570 Aug 16 06:18:22 PM PDT 24 Aug 16 06:18:39 PM PDT 24 1598003253 ps
T1126 /workspace/coverage/default/31.otp_ctrl_check_fail.1519687094 Aug 16 06:18:43 PM PDT 24 Aug 16 06:19:10 PM PDT 24 1806827415 ps
T1127 /workspace/coverage/default/8.otp_ctrl_smoke.1026560055 Aug 16 06:17:42 PM PDT 24 Aug 16 06:17:51 PM PDT 24 578656639 ps
T1128 /workspace/coverage/default/31.otp_ctrl_macro_errs.2887915681 Aug 16 06:18:42 PM PDT 24 Aug 16 06:18:59 PM PDT 24 7596417594 ps
T1129 /workspace/coverage/default/68.otp_ctrl_init_fail.33603569 Aug 16 06:19:38 PM PDT 24 Aug 16 06:19:42 PM PDT 24 320295748 ps
T1130 /workspace/coverage/default/62.otp_ctrl_init_fail.2943399183 Aug 16 06:19:43 PM PDT 24 Aug 16 06:19:47 PM PDT 24 215834672 ps
T1131 /workspace/coverage/default/31.otp_ctrl_dai_errs.3124204103 Aug 16 06:18:43 PM PDT 24 Aug 16 06:18:55 PM PDT 24 217791917 ps
T1132 /workspace/coverage/default/49.otp_ctrl_regwen.2685297345 Aug 16 06:19:29 PM PDT 24 Aug 16 06:19:33 PM PDT 24 1388798093 ps
T119 /workspace/coverage/default/99.otp_ctrl_parallel_lc_esc.1645934373 Aug 16 06:20:01 PM PDT 24 Aug 16 06:20:05 PM PDT 24 185011659 ps
T1133 /workspace/coverage/default/8.otp_ctrl_regwen.269437461 Aug 16 06:17:41 PM PDT 24 Aug 16 06:17:46 PM PDT 24 1827510565 ps
T1134 /workspace/coverage/default/130.otp_ctrl_parallel_lc_esc.1936652750 Aug 16 06:20:12 PM PDT 24 Aug 16 06:20:22 PM PDT 24 417618169 ps
T1135 /workspace/coverage/default/10.otp_ctrl_macro_errs.1583230624 Aug 16 06:17:44 PM PDT 24 Aug 16 06:18:09 PM PDT 24 4475010840 ps
T1136 /workspace/coverage/default/94.otp_ctrl_stress_all_with_rand_reset.2259922810 Aug 16 06:19:55 PM PDT 24 Aug 16 06:20:47 PM PDT 24 1752873102 ps
T1137 /workspace/coverage/default/130.otp_ctrl_init_fail.2693961218 Aug 16 06:20:19 PM PDT 24 Aug 16 06:20:24 PM PDT 24 123578553 ps
T1138 /workspace/coverage/default/101.otp_ctrl_init_fail.1586434419 Aug 16 06:20:03 PM PDT 24 Aug 16 06:20:06 PM PDT 24 216517360 ps
T1139 /workspace/coverage/default/14.otp_ctrl_parallel_lc_req.4070141564 Aug 16 06:17:50 PM PDT 24 Aug 16 06:18:15 PM PDT 24 1507817940 ps
T1140 /workspace/coverage/default/89.otp_ctrl_parallel_lc_esc.3587494497 Aug 16 06:20:01 PM PDT 24 Aug 16 06:20:07 PM PDT 24 359775897 ps
T1141 /workspace/coverage/default/188.otp_ctrl_parallel_lc_esc.567439626 Aug 16 06:20:45 PM PDT 24 Aug 16 06:20:57 PM PDT 24 1614670228 ps
T311 /workspace/coverage/default/81.otp_ctrl_stress_all_with_rand_reset.1701669859 Aug 16 06:19:46 PM PDT 24 Aug 16 06:20:44 PM PDT 24 7595913061 ps
T1142 /workspace/coverage/default/30.otp_ctrl_alert_test.447902734 Aug 16 06:18:42 PM PDT 24 Aug 16 06:18:44 PM PDT 24 347717636 ps
T1143 /workspace/coverage/default/172.otp_ctrl_parallel_lc_esc.3083058534 Aug 16 06:20:26 PM PDT 24 Aug 16 06:20:32 PM PDT 24 283195970 ps
T1144 /workspace/coverage/default/65.otp_ctrl_init_fail.2226490951 Aug 16 06:19:43 PM PDT 24 Aug 16 06:19:47 PM PDT 24 408823902 ps
T1145 /workspace/coverage/default/97.otp_ctrl_init_fail.3072363236 Aug 16 06:20:03 PM PDT 24 Aug 16 06:20:07 PM PDT 24 102143535 ps
T1146 /workspace/coverage/default/217.otp_ctrl_init_fail.3125499315 Aug 16 06:20:41 PM PDT 24 Aug 16 06:20:45 PM PDT 24 444595269 ps
T1147 /workspace/coverage/default/102.otp_ctrl_parallel_lc_esc.3421868449 Aug 16 06:20:06 PM PDT 24 Aug 16 06:20:09 PM PDT 24 67219198 ps
T1148 /workspace/coverage/default/24.otp_ctrl_smoke.399495269 Aug 16 06:18:23 PM PDT 24 Aug 16 06:18:28 PM PDT 24 276279750 ps
T1149 /workspace/coverage/default/44.otp_ctrl_dai_lock.1153252270 Aug 16 06:19:12 PM PDT 24 Aug 16 06:19:46 PM PDT 24 13656731919 ps
T1150 /workspace/coverage/default/9.otp_ctrl_init_fail.1275506096 Aug 16 06:17:41 PM PDT 24 Aug 16 06:17:47 PM PDT 24 1873437587 ps
T1151 /workspace/coverage/default/48.otp_ctrl_parallel_key_req.3417385167 Aug 16 06:19:28 PM PDT 24 Aug 16 06:19:44 PM PDT 24 7553578677 ps
T1152 /workspace/coverage/default/5.otp_ctrl_parallel_key_req.773204544 Aug 16 06:17:39 PM PDT 24 Aug 16 06:17:51 PM PDT 24 676526994 ps
T1153 /workspace/coverage/default/4.otp_ctrl_smoke.2418631580 Aug 16 06:17:34 PM PDT 24 Aug 16 06:17:42 PM PDT 24 493223961 ps
T1154 /workspace/coverage/default/45.otp_ctrl_check_fail.2695808867 Aug 16 06:19:18 PM PDT 24 Aug 16 06:19:22 PM PDT 24 119664197 ps
T1155 /workspace/coverage/default/95.otp_ctrl_stress_all_with_rand_reset.91231971 Aug 16 06:19:56 PM PDT 24 Aug 16 06:21:33 PM PDT 24 11160186503 ps
T1156 /workspace/coverage/default/83.otp_ctrl_init_fail.2991201393 Aug 16 06:19:52 PM PDT 24 Aug 16 06:19:57 PM PDT 24 221270799 ps
T1157 /workspace/coverage/default/179.otp_ctrl_init_fail.696393117 Aug 16 06:20:27 PM PDT 24 Aug 16 06:20:31 PM PDT 24 150842136 ps
T1158 /workspace/coverage/default/30.otp_ctrl_init_fail.359519614 Aug 16 06:18:38 PM PDT 24 Aug 16 06:18:43 PM PDT 24 356975035 ps
T1159 /workspace/coverage/default/16.otp_ctrl_macro_errs.2298062831 Aug 16 06:18:02 PM PDT 24 Aug 16 06:18:27 PM PDT 24 3051294265 ps
T1160 /workspace/coverage/default/230.otp_ctrl_init_fail.3152606727 Aug 16 06:20:42 PM PDT 24 Aug 16 06:20:46 PM PDT 24 152182567 ps
T1161 /workspace/coverage/default/42.otp_ctrl_parallel_key_req.898631297 Aug 16 06:19:10 PM PDT 24 Aug 16 06:19:18 PM PDT 24 648630180 ps
T1162 /workspace/coverage/default/196.otp_ctrl_parallel_lc_esc.3067951902 Aug 16 06:20:44 PM PDT 24 Aug 16 06:20:50 PM PDT 24 471034120 ps
T386 /workspace/coverage/default/59.otp_ctrl_parallel_lc_esc.3854767488 Aug 16 06:19:40 PM PDT 24 Aug 16 06:19:55 PM PDT 24 651530239 ps
T1163 /workspace/coverage/default/43.otp_ctrl_parallel_lc_esc.3226397957 Aug 16 06:19:14 PM PDT 24 Aug 16 06:19:18 PM PDT 24 565573389 ps
T1164 /workspace/coverage/default/29.otp_ctrl_parallel_key_req.4178935990 Aug 16 06:18:42 PM PDT 24 Aug 16 06:19:02 PM PDT 24 812526310 ps
T1165 /workspace/coverage/default/17.otp_ctrl_smoke.4133616182 Aug 16 06:17:58 PM PDT 24 Aug 16 06:18:04 PM PDT 24 299090884 ps
T1166 /workspace/coverage/default/36.otp_ctrl_parallel_key_req.2078250172 Aug 16 06:18:46 PM PDT 24 Aug 16 06:19:02 PM PDT 24 647641827 ps
T254 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_mem_rw_with_rand_reset.517795016 Aug 16 06:10:44 PM PDT 24 Aug 16 06:10:46 PM PDT 24 118708367 ps
T258 /workspace/coverage/cover_reg_top/5.otp_ctrl_csr_mem_rw_with_rand_reset.960779029 Aug 16 06:11:02 PM PDT 24 Aug 16 06:11:05 PM PDT 24 138121057 ps
T255 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_bit_bash.643972896 Aug 16 06:10:44 PM PDT 24 Aug 16 06:10:56 PM PDT 24 6848358430 ps
T256 /workspace/coverage/cover_reg_top/16.otp_ctrl_csr_mem_rw_with_rand_reset.2216421093 Aug 16 06:11:35 PM PDT 24 Aug 16 06:11:39 PM PDT 24 1556147147 ps
T272 /workspace/coverage/cover_reg_top/11.otp_ctrl_csr_rw.2127014049 Aug 16 06:11:21 PM PDT 24 Aug 16 06:11:23 PM PDT 24 135004872 ps
T257 /workspace/coverage/cover_reg_top/17.otp_ctrl_same_csr_outstanding.1599105802 Aug 16 06:11:38 PM PDT 24 Aug 16 06:11:40 PM PDT 24 658567554 ps
T273 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_aliasing.1618235600 Aug 16 06:10:30 PM PDT 24 Aug 16 06:10:36 PM PDT 24 288631231 ps
T251 /workspace/coverage/cover_reg_top/10.otp_ctrl_tl_intg_err.1665008931 Aug 16 06:11:19 PM PDT 24 Aug 16 06:11:31 PM PDT 24 2492408156 ps
T1167 /workspace/coverage/cover_reg_top/8.otp_ctrl_csr_mem_rw_with_rand_reset.3428023358 Aug 16 06:11:19 PM PDT 24 Aug 16 06:11:21 PM PDT 24 260782097 ps
T1168 /workspace/coverage/cover_reg_top/1.otp_ctrl_intr_test.1796869466 Aug 16 06:10:38 PM PDT 24 Aug 16 06:10:40 PM PDT 24 72922572 ps
T1169 /workspace/coverage/cover_reg_top/40.otp_ctrl_intr_test.3480178547 Aug 16 06:11:44 PM PDT 24 Aug 16 06:11:46 PM PDT 24 79576705 ps
T1170 /workspace/coverage/cover_reg_top/38.otp_ctrl_intr_test.2652510985 Aug 16 06:11:44 PM PDT 24 Aug 16 06:11:46 PM PDT 24 68624856 ps
T1171 /workspace/coverage/cover_reg_top/9.otp_ctrl_intr_test.3649594646 Aug 16 06:11:21 PM PDT 24 Aug 16 06:11:22 PM PDT 24 71011351 ps
T1172 /workspace/coverage/cover_reg_top/34.otp_ctrl_intr_test.1724364160 Aug 16 06:11:45 PM PDT 24 Aug 16 06:11:47 PM PDT 24 41826739 ps
T1173 /workspace/coverage/cover_reg_top/8.otp_ctrl_tl_errors.3806690822 Aug 16 06:11:08 PM PDT 24 Aug 16 06:11:15 PM PDT 24 433348048 ps
T274 /workspace/coverage/cover_reg_top/15.otp_ctrl_same_csr_outstanding.150548086 Aug 16 06:11:29 PM PDT 24 Aug 16 06:11:32 PM PDT 24 457901918 ps
T275 /workspace/coverage/cover_reg_top/7.otp_ctrl_csr_rw.2245054959 Aug 16 06:11:08 PM PDT 24 Aug 16 06:11:09 PM PDT 24 145866114 ps
T276 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_hw_reset.1059849484 Aug 16 06:10:52 PM PDT 24 Aug 16 06:10:55 PM PDT 24 197728076 ps
T1174 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_mem_rw_with_rand_reset.1885177842 Aug 16 06:10:27 PM PDT 24 Aug 16 06:10:30 PM PDT 24 421895881 ps
T1175 /workspace/coverage/cover_reg_top/30.otp_ctrl_intr_test.3767581780 Aug 16 06:11:45 PM PDT 24 Aug 16 06:11:46 PM PDT 24 77056192 ps
T1176 /workspace/coverage/cover_reg_top/7.otp_ctrl_tl_errors.3503687180 Aug 16 06:11:10 PM PDT 24 Aug 16 06:11:15 PM PDT 24 224514317 ps
T252 /workspace/coverage/cover_reg_top/6.otp_ctrl_tl_intg_err.3471778769 Aug 16 06:10:59 PM PDT 24 Aug 16 06:11:10 PM PDT 24 785374977 ps
T1177 /workspace/coverage/cover_reg_top/12.otp_ctrl_csr_mem_rw_with_rand_reset.1723444438 Aug 16 06:11:27 PM PDT 24 Aug 16 06:11:30 PM PDT 24 227872523 ps
T1178 /workspace/coverage/cover_reg_top/18.otp_ctrl_tl_errors.1139246248 Aug 16 06:11:37 PM PDT 24 Aug 16 06:11:40 PM PDT 24 104270225 ps
T277 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_rw.1548118139 Aug 16 06:10:38 PM PDT 24 Aug 16 06:10:40 PM PDT 24 63311423 ps
T278 /workspace/coverage/cover_reg_top/4.otp_ctrl_same_csr_outstanding.279556582 Aug 16 06:11:00 PM PDT 24 Aug 16 06:11:02 PM PDT 24 50227300 ps
T1179 /workspace/coverage/cover_reg_top/6.otp_ctrl_tl_errors.1512880637 Aug 16 06:11:05 PM PDT 24 Aug 16 06:11:11 PM PDT 24 334280121 ps
T279 /workspace/coverage/cover_reg_top/16.otp_ctrl_csr_rw.3038633909 Aug 16 06:11:35 PM PDT 24 Aug 16 06:11:37 PM PDT 24 41368104 ps
T1180 /workspace/coverage/cover_reg_top/9.otp_ctrl_csr_mem_rw_with_rand_reset.2044818712 Aug 16 06:11:24 PM PDT 24 Aug 16 06:11:29 PM PDT 24 109640496 ps
T1181 /workspace/coverage/cover_reg_top/4.otp_ctrl_mem_walk.709814789 Aug 16 06:10:58 PM PDT 24 Aug 16 06:11:00 PM PDT 24 127441284 ps
T1182 /workspace/coverage/cover_reg_top/24.otp_ctrl_intr_test.2177743008 Aug 16 06:11:46 PM PDT 24 Aug 16 06:11:47 PM PDT 24 40867742 ps
T280 /workspace/coverage/cover_reg_top/13.otp_ctrl_csr_rw.1308688818 Aug 16 06:11:30 PM PDT 24 Aug 16 06:11:32 PM PDT 24 129521615 ps
T1183 /workspace/coverage/cover_reg_top/4.otp_ctrl_tl_errors.3956006213 Aug 16 06:10:51 PM PDT 24 Aug 16 06:10:57 PM PDT 24 174962484 ps
T253 /workspace/coverage/cover_reg_top/12.otp_ctrl_tl_intg_err.3980487042 Aug 16 06:11:19 PM PDT 24 Aug 16 06:11:30 PM PDT 24 2630468678 ps
T259 /workspace/coverage/cover_reg_top/17.otp_ctrl_tl_intg_err.3338121760 Aug 16 06:11:37 PM PDT 24 Aug 16 06:12:00 PM PDT 24 1805031284 ps
T329 /workspace/coverage/cover_reg_top/11.otp_ctrl_tl_intg_err.1718501161 Aug 16 06:11:21 PM PDT 24 Aug 16 06:11:43 PM PDT 24 18987133698 ps
T301 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_bit_bash.466859107 Aug 16 06:11:01 PM PDT 24 Aug 16 06:11:05 PM PDT 24 242613199 ps
T298 /workspace/coverage/cover_reg_top/12.otp_ctrl_same_csr_outstanding.1724382022 Aug 16 06:11:26 PM PDT 24 Aug 16 06:11:28 PM PDT 24 705210713 ps
T1184 /workspace/coverage/cover_reg_top/18.otp_ctrl_intr_test.4291374643 Aug 16 06:11:33 PM PDT 24 Aug 16 06:11:35 PM PDT 24 73094812 ps
T334 /workspace/coverage/cover_reg_top/8.otp_ctrl_tl_intg_err.4046301671 Aug 16 06:11:10 PM PDT 24 Aug 16 06:11:19 PM PDT 24 677916331 ps
T1185 /workspace/coverage/cover_reg_top/26.otp_ctrl_intr_test.1730601393 Aug 16 06:11:45 PM PDT 24 Aug 16 06:11:46 PM PDT 24 39427484 ps
T1186 /workspace/coverage/cover_reg_top/10.otp_ctrl_intr_test.2772916113 Aug 16 06:11:21 PM PDT 24 Aug 16 06:11:23 PM PDT 24 42093942 ps
T1187 /workspace/coverage/cover_reg_top/48.otp_ctrl_intr_test.1771485067 Aug 16 06:11:53 PM PDT 24 Aug 16 06:11:55 PM PDT 24 43688240 ps
T333 /workspace/coverage/cover_reg_top/16.otp_ctrl_tl_intg_err.2128842183 Aug 16 06:11:28 PM PDT 24 Aug 16 06:11:47 PM PDT 24 1327054594 ps
T302 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_bit_bash.131693700 Aug 16 06:10:37 PM PDT 24 Aug 16 06:10:44 PM PDT 24 492314562 ps
T1188 /workspace/coverage/cover_reg_top/7.otp_ctrl_csr_mem_rw_with_rand_reset.3079672186 Aug 16 06:11:11 PM PDT 24 Aug 16 06:11:14 PM PDT 24 112818989 ps
T1189 /workspace/coverage/cover_reg_top/13.otp_ctrl_tl_errors.1248937477 Aug 16 06:11:27 PM PDT 24 Aug 16 06:11:32 PM PDT 24 1266497473 ps
T299 /workspace/coverage/cover_reg_top/18.otp_ctrl_same_csr_outstanding.1432787399 Aug 16 06:11:37 PM PDT 24 Aug 16 06:11:39 PM PDT 24 164952007 ps
T1190 /workspace/coverage/cover_reg_top/17.otp_ctrl_intr_test.930570106 Aug 16 06:11:34 PM PDT 24 Aug 16 06:11:35 PM PDT 24 76510824 ps
T1191 /workspace/coverage/cover_reg_top/13.otp_ctrl_csr_mem_rw_with_rand_reset.2514282263 Aug 16 06:11:26 PM PDT 24 Aug 16 06:11:29 PM PDT 24 143752533 ps
T1192 /workspace/coverage/cover_reg_top/33.otp_ctrl_intr_test.1123922300 Aug 16 06:11:44 PM PDT 24 Aug 16 06:11:45 PM PDT 24 83449465 ps
T1193 /workspace/coverage/cover_reg_top/25.otp_ctrl_intr_test.4247426368 Aug 16 06:11:46 PM PDT 24 Aug 16 06:11:48 PM PDT 24 547556527 ps
T1194 /workspace/coverage/cover_reg_top/17.otp_ctrl_csr_mem_rw_with_rand_reset.3422411503 Aug 16 06:11:33 PM PDT 24 Aug 16 06:11:37 PM PDT 24 1098224869 ps
T1195 /workspace/coverage/cover_reg_top/41.otp_ctrl_intr_test.4100582485 Aug 16 06:11:44 PM PDT 24 Aug 16 06:11:46 PM PDT 24 528137726 ps
T300 /workspace/coverage/cover_reg_top/5.otp_ctrl_same_csr_outstanding.2765033957 Aug 16 06:10:59 PM PDT 24 Aug 16 06:11:02 PM PDT 24 673321092 ps
T1196 /workspace/coverage/cover_reg_top/9.otp_ctrl_csr_rw.2682406086 Aug 16 06:11:18 PM PDT 24 Aug 16 06:11:20 PM PDT 24 44525884 ps
T1197 /workspace/coverage/cover_reg_top/14.otp_ctrl_csr_mem_rw_with_rand_reset.3591584600 Aug 16 06:11:29 PM PDT 24 Aug 16 06:11:31 PM PDT 24 1070488435 ps
T1198 /workspace/coverage/cover_reg_top/10.otp_ctrl_csr_mem_rw_with_rand_reset.2150003560 Aug 16 06:11:19 PM PDT 24 Aug 16 06:11:23 PM PDT 24 291000082 ps
T1199 /workspace/coverage/cover_reg_top/16.otp_ctrl_tl_errors.878271517 Aug 16 06:11:27 PM PDT 24 Aug 16 06:11:35 PM PDT 24 2756640796 ps
T1200 /workspace/coverage/cover_reg_top/19.otp_ctrl_tl_errors.3338436043 Aug 16 06:11:36 PM PDT 24 Aug 16 06:11:41 PM PDT 24 236606389 ps
T1201 /workspace/coverage/cover_reg_top/39.otp_ctrl_intr_test.1547064289 Aug 16 06:11:46 PM PDT 24 Aug 16 06:11:47 PM PDT 24 74702102 ps
T1202 /workspace/coverage/cover_reg_top/20.otp_ctrl_intr_test.126412977 Aug 16 06:11:45 PM PDT 24 Aug 16 06:11:47 PM PDT 24 39003094 ps
T1203 /workspace/coverage/cover_reg_top/18.otp_ctrl_csr_mem_rw_with_rand_reset.98114135 Aug 16 06:11:36 PM PDT 24 Aug 16 06:11:40 PM PDT 24 102890083 ps
T1204 /workspace/coverage/cover_reg_top/36.otp_ctrl_intr_test.650692901 Aug 16 06:11:47 PM PDT 24 Aug 16 06:11:49 PM PDT 24 74792223 ps
T1205 /workspace/coverage/cover_reg_top/23.otp_ctrl_intr_test.4054352276 Aug 16 06:11:47 PM PDT 24 Aug 16 06:11:48 PM PDT 24 52837098 ps
T331 /workspace/coverage/cover_reg_top/5.otp_ctrl_tl_intg_err.2312611658 Aug 16 06:10:59 PM PDT 24 Aug 16 06:11:22 PM PDT 24 3482551924 ps
T283 /workspace/coverage/cover_reg_top/19.otp_ctrl_csr_rw.3889022649 Aug 16 06:11:43 PM PDT 24 Aug 16 06:11:45 PM PDT 24 85948276 ps
T1206 /workspace/coverage/cover_reg_top/49.otp_ctrl_intr_test.2020425814 Aug 16 06:11:54 PM PDT 24 Aug 16 06:11:55 PM PDT 24 84829190 ps
T284 /workspace/coverage/cover_reg_top/6.otp_ctrl_csr_rw.350007892 Aug 16 06:11:08 PM PDT 24 Aug 16 06:11:10 PM PDT 24 38818715 ps
T1207 /workspace/coverage/cover_reg_top/6.otp_ctrl_same_csr_outstanding.878484547 Aug 16 06:11:08 PM PDT 24 Aug 16 06:11:10 PM PDT 24 92419702 ps
T1208 /workspace/coverage/cover_reg_top/3.otp_ctrl_intr_test.91177497 Aug 16 06:10:59 PM PDT 24 Aug 16 06:11:01 PM PDT 24 70037061 ps
T1209 /workspace/coverage/cover_reg_top/12.otp_ctrl_intr_test.3122399613 Aug 16 06:11:17 PM PDT 24 Aug 16 06:11:19 PM PDT 24 600731423 ps
T1210 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_mem_rw_with_rand_reset.764547896 Aug 16 06:10:58 PM PDT 24 Aug 16 06:11:02 PM PDT 24 102480871 ps
T1211 /workspace/coverage/cover_reg_top/0.otp_ctrl_mem_walk.3409635592 Aug 16 06:10:26 PM PDT 24 Aug 16 06:10:28 PM PDT 24 546576133 ps
T1212 /workspace/coverage/cover_reg_top/15.otp_ctrl_tl_errors.1414460789 Aug 16 06:11:29 PM PDT 24 Aug 16 06:11:33 PM PDT 24 122522428 ps
T285 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_rw.46971039 Aug 16 06:10:42 PM PDT 24 Aug 16 06:10:44 PM PDT 24 46442845 ps
T1213 /workspace/coverage/cover_reg_top/7.otp_ctrl_intr_test.2908588227 Aug 16 06:11:15 PM PDT 24 Aug 16 06:11:16 PM PDT 24 563915258 ps
T330 /workspace/coverage/cover_reg_top/7.otp_ctrl_tl_intg_err.2746833856 Aug 16 06:11:10 PM PDT 24 Aug 16 06:11:20 PM PDT 24 665517775 ps
T1214 /workspace/coverage/cover_reg_top/28.otp_ctrl_intr_test.1600622102 Aug 16 06:11:45 PM PDT 24 Aug 16 06:11:46 PM PDT 24 41647105 ps
T1215 /workspace/coverage/cover_reg_top/5.otp_ctrl_csr_rw.2345477261 Aug 16 06:11:03 PM PDT 24 Aug 16 06:11:04 PM PDT 24 44089788 ps
T1216 /workspace/coverage/cover_reg_top/2.otp_ctrl_mem_walk.3106459835 Aug 16 06:10:34 PM PDT 24 Aug 16 06:10:36 PM PDT 24 60424636 ps
T1217 /workspace/coverage/cover_reg_top/3.otp_ctrl_same_csr_outstanding.3785516452 Aug 16 06:10:55 PM PDT 24 Aug 16 06:10:58 PM PDT 24 1427292430 ps
T286 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_hw_reset.767538313 Aug 16 06:10:37 PM PDT 24 Aug 16 06:10:40 PM PDT 24 114802250 ps
T1218 /workspace/coverage/cover_reg_top/5.otp_ctrl_intr_test.2205653083 Aug 16 06:11:02 PM PDT 24 Aug 16 06:11:03 PM PDT 24 42309350 ps
T1219 /workspace/coverage/cover_reg_top/27.otp_ctrl_intr_test.1084469990 Aug 16 06:11:45 PM PDT 24 Aug 16 06:11:46 PM PDT 24 509808361 ps
T1220 /workspace/coverage/cover_reg_top/22.otp_ctrl_intr_test.321900716 Aug 16 06:11:47 PM PDT 24 Aug 16 06:11:48 PM PDT 24 72189232 ps
T1221 /workspace/coverage/cover_reg_top/19.otp_ctrl_same_csr_outstanding.2194451522 Aug 16 06:11:44 PM PDT 24 Aug 16 06:11:48 PM PDT 24 316021256 ps
T1222 /workspace/coverage/cover_reg_top/7.otp_ctrl_same_csr_outstanding.441132220 Aug 16 06:11:09 PM PDT 24 Aug 16 06:11:12 PM PDT 24 280461305 ps
T1223 /workspace/coverage/cover_reg_top/1.otp_ctrl_tl_intg_err.1023053572 Aug 16 06:10:55 PM PDT 24 Aug 16 06:11:06 PM PDT 24 10520988307 ps
T1224 /workspace/coverage/cover_reg_top/3.otp_ctrl_tl_errors.1114181273 Aug 16 06:10:44 PM PDT 24 Aug 16 06:10:50 PM PDT 24 638656388 ps
T1225 /workspace/coverage/cover_reg_top/37.otp_ctrl_intr_test.308187484 Aug 16 06:11:45 PM PDT 24 Aug 16 06:11:46 PM PDT 24 42964404 ps
T1226 /workspace/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.3295804242 Aug 16 06:10:30 PM PDT 24 Aug 16 06:10:34 PM PDT 24 295746498 ps
T1227 /workspace/coverage/cover_reg_top/8.otp_ctrl_same_csr_outstanding.319091317 Aug 16 06:11:17 PM PDT 24 Aug 16 06:11:19 PM PDT 24 124719269 ps
T1228 /workspace/coverage/cover_reg_top/11.otp_ctrl_intr_test.2148505056 Aug 16 06:11:19 PM PDT 24 Aug 16 06:11:21 PM PDT 24 145682402 ps
T1229 /workspace/coverage/cover_reg_top/9.otp_ctrl_same_csr_outstanding.471234190 Aug 16 06:11:22 PM PDT 24 Aug 16 06:11:25 PM PDT 24 184213084 ps
T1230 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_bit_bash.1891034015 Aug 16 06:10:53 PM PDT 24 Aug 16 06:10:59 PM PDT 24 172226750 ps
T1231 /workspace/coverage/cover_reg_top/42.otp_ctrl_intr_test.2361233428 Aug 16 06:11:44 PM PDT 24 Aug 16 06:11:46 PM PDT 24 66099137 ps
T1232 /workspace/coverage/cover_reg_top/31.otp_ctrl_intr_test.3368038494 Aug 16 06:11:43 PM PDT 24 Aug 16 06:11:45 PM PDT 24 566838575 ps
T287 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_aliasing.1556848665 Aug 16 06:10:37 PM PDT 24 Aug 16 06:10:43 PM PDT 24 639417687 ps
T1233 /workspace/coverage/cover_reg_top/1.otp_ctrl_tl_errors.241131346 Aug 16 06:10:37 PM PDT 24 Aug 16 06:10:41 PM PDT 24 52522890 ps
T1234 /workspace/coverage/cover_reg_top/46.otp_ctrl_intr_test.139265457 Aug 16 06:11:52 PM PDT 24 Aug 16 06:11:53 PM PDT 24 75627415 ps
T1235 /workspace/coverage/cover_reg_top/3.otp_ctrl_mem_partial_access.3476609491 Aug 16 06:10:52 PM PDT 24 Aug 16 06:10:53 PM PDT 24 72150424 ps
T1236 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_mem_rw_with_rand_reset.850191902 Aug 16 06:10:38 PM PDT 24 Aug 16 06:10:41 PM PDT 24 155874799 ps
T1237 /workspace/coverage/cover_reg_top/1.otp_ctrl_mem_walk.1470490024 Aug 16 06:10:34 PM PDT 24 Aug 16 06:10:36 PM PDT 24 141394292 ps
T1238 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_hw_reset.2535567996 Aug 16 06:10:29 PM PDT 24 Aug 16 06:10:31 PM PDT 24 1018842834 ps
T1239 /workspace/coverage/cover_reg_top/19.otp_ctrl_intr_test.756740607 Aug 16 06:11:46 PM PDT 24 Aug 16 06:11:48 PM PDT 24 591812328 ps
T1240 /workspace/coverage/cover_reg_top/11.otp_ctrl_csr_mem_rw_with_rand_reset.759787133 Aug 16 06:11:17 PM PDT 24 Aug 16 06:11:20 PM PDT 24 113469467 ps
T1241 /workspace/coverage/cover_reg_top/2.otp_ctrl_mem_partial_access.3049299266 Aug 16 06:10:44 PM PDT 24 Aug 16 06:10:46 PM PDT 24 42097796 ps
T1242 /workspace/coverage/cover_reg_top/2.otp_ctrl_same_csr_outstanding.1881061299 Aug 16 06:10:44 PM PDT 24 Aug 16 06:10:46 PM PDT 24 222139825 ps
T1243 /workspace/coverage/cover_reg_top/2.otp_ctrl_intr_test.2059052577 Aug 16 06:10:37 PM PDT 24 Aug 16 06:10:38 PM PDT 24 149176437 ps
T291 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_aliasing.3966835674 Aug 16 06:10:53 PM PDT 24 Aug 16 06:10:58 PM PDT 24 1540369363 ps
T1244 /workspace/coverage/cover_reg_top/14.otp_ctrl_tl_intg_err.3739926554 Aug 16 06:11:28 PM PDT 24 Aug 16 06:11:46 PM PDT 24 2323575063 ps
T1245 /workspace/coverage/cover_reg_top/10.otp_ctrl_same_csr_outstanding.171926910 Aug 16 06:11:16 PM PDT 24 Aug 16 06:11:19 PM PDT 24 77355899 ps
T1246 /workspace/coverage/cover_reg_top/11.otp_ctrl_tl_errors.3396823505 Aug 16 06:11:18 PM PDT 24 Aug 16 06:11:22 PM PDT 24 116467338 ps
T288 /workspace/coverage/cover_reg_top/14.otp_ctrl_csr_rw.4069512949 Aug 16 06:11:28 PM PDT 24 Aug 16 06:11:29 PM PDT 24 80279087 ps
T1247 /workspace/coverage/cover_reg_top/12.otp_ctrl_tl_errors.916906489 Aug 16 06:11:17 PM PDT 24 Aug 16 06:11:23 PM PDT 24 84961518 ps
T1248 /workspace/coverage/cover_reg_top/14.otp_ctrl_tl_errors.49514629 Aug 16 06:11:28 PM PDT 24 Aug 16 06:11:33 PM PDT 24 139350419 ps
T1249 /workspace/coverage/cover_reg_top/21.otp_ctrl_intr_test.2515628920 Aug 16 06:11:45 PM PDT 24 Aug 16 06:11:46 PM PDT 24 71094374 ps
T1250 /workspace/coverage/cover_reg_top/13.otp_ctrl_tl_intg_err.2721856989 Aug 16 06:11:26 PM PDT 24 Aug 16 06:11:37 PM PDT 24 711601865 ps
T1251 /workspace/coverage/cover_reg_top/14.otp_ctrl_intr_test.848086106 Aug 16 06:11:25 PM PDT 24 Aug 16 06:11:26 PM PDT 24 134674854 ps
T1252 /workspace/coverage/cover_reg_top/13.otp_ctrl_intr_test.1793696889 Aug 16 06:11:27 PM PDT 24 Aug 16 06:11:28 PM PDT 24 153681803 ps
T1253 /workspace/coverage/cover_reg_top/11.otp_ctrl_same_csr_outstanding.1040633702 Aug 16 06:11:17 PM PDT 24 Aug 16 06:11:20 PM PDT 24 134166830 ps
T1254 /workspace/coverage/cover_reg_top/18.otp_ctrl_csr_rw.1938070114 Aug 16 06:11:38 PM PDT 24 Aug 16 06:11:40 PM PDT 24 70679987 ps
T1255 /workspace/coverage/cover_reg_top/13.otp_ctrl_same_csr_outstanding.3219047419 Aug 16 06:11:25 PM PDT 24 Aug 16 06:11:28 PM PDT 24 56967711 ps
T292 /workspace/coverage/cover_reg_top/10.otp_ctrl_csr_rw.3109857838 Aug 16 06:11:18 PM PDT 24 Aug 16 06:11:20 PM PDT 24 576431259 ps
T1256 /workspace/coverage/cover_reg_top/1.otp_ctrl_same_csr_outstanding.407646898 Aug 16 06:10:33 PM PDT 24 Aug 16 06:10:36 PM PDT 24 97565077 ps
T1257 /workspace/coverage/cover_reg_top/4.otp_ctrl_tl_intg_err.1366069566 Aug 16 06:10:52 PM PDT 24 Aug 16 06:11:04 PM PDT 24 2513377096 ps
T1258 /workspace/coverage/cover_reg_top/6.otp_ctrl_intr_test.2702005060 Aug 16 06:11:02 PM PDT 24 Aug 16 06:11:03 PM PDT 24 47668588 ps
T1259 /workspace/coverage/cover_reg_top/32.otp_ctrl_intr_test.2161435489 Aug 16 06:11:43 PM PDT 24 Aug 16 06:11:45 PM PDT 24 145479396 ps
T332 /workspace/coverage/cover_reg_top/9.otp_ctrl_tl_intg_err.475373332 Aug 16 06:11:18 PM PDT 24 Aug 16 06:11:39 PM PDT 24 3602929535 ps
T1260 /workspace/coverage/cover_reg_top/3.otp_ctrl_mem_walk.838152184 Aug 16 06:10:58 PM PDT 24 Aug 16 06:11:00 PM PDT 24 67407188 ps
T1261 /workspace/coverage/cover_reg_top/47.otp_ctrl_intr_test.415469376 Aug 16 06:11:53 PM PDT 24 Aug 16 06:11:55 PM PDT 24 139526323 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%