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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13818 1 T1 4 T2 53 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13818 1 T1 4 T2 53 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 9878 1 T1 2 T2 39 T3 9
true 16126 1 T1 4 T2 56 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10758 1 T1 2 T2 39 T3 10
true 16196 1 T1 4 T2 56 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 74 1 T101 2 T64 2 T122 2
others[1] 98 1 T96 2 T71 4 T105 2
others[2] 68 1 T71 6 T64 2 T122 2
others[3] 106 1 T5 2 T103 2 T45 2
others[4] 68 1 T2 2 T5 2 T71 2
others[5] 104 1 T71 2 T102 2 T234 4
others[6] 86 1 T71 2 T365 2 T169 4
others[7] 104 1 T16 2 T69 2 T71 2
false 13818 1 T1 4 T2 53 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 108 1 T69 2 T71 4 T102 2
others[1] 80 1 T5 2 T103 2 T45 2
others[2] 84 1 T71 2 T102 2 T104 2
others[3] 90 1 T5 2 T101 2 T71 4
others[4] 98 1 T96 2 T104 2 T122 4
others[5] 82 1 T2 2 T16 2 T69 2
others[6] 68 1 T71 4 T105 4 T122 4
others[7] 90 1 T69 2 T71 2 T251 2
false 13818 1 T1 4 T2 53 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T16 2 T71 4 T64 4
others[1] 104 1 T38 4 T71 2 T102 2
others[2] 94 1 T3 2 T101 2 T71 2
others[3] 72 1 T5 4 T96 2 T71 4
others[4] 108 1 T5 4 T71 2 T64 4
others[5] 92 1 T3 2 T16 2 T101 2
others[6] 72 1 T2 2 T5 2 T71 4
others[7] 66 1 T101 2 T71 8 T103 2
false 13818 1 T1 4 T2 53 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 36 1 T5 2 T71 2 T213 2
others[1] 48 1 T38 2 T103 2 T365 4
others[2] 52 1 T16 2 T69 2 T64 2
others[3] 46 1 T2 2 T101 4 T71 2
others[4] 52 1 T16 2 T69 2 T105 2
others[5] 52 1 T38 2 T101 2 T71 2
others[6] 76 1 T103 6 T105 2 T133 2
others[7] 82 1 T71 6 T213 4 T234 2
false 13818 1 T1 4 T2 53 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T3 2 T96 2 T101 2
others[1] 80 1 T2 2 T5 2 T69 2
others[2] 78 1 T71 2 T104 2 T72 2
others[3] 102 1 T96 2 T69 2 T71 4
others[4] 88 1 T71 4 T105 2 T64 2
others[5] 84 1 T5 2 T101 2 T103 2
others[6] 84 1 T5 2 T16 2 T71 2
others[7] 96 1 T5 2 T16 2 T101 2
false 13818 1 T1 4 T2 53 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 40 1 T213 2 T234 2 T110 2
others[1] 36 1 T71 2 T104 2 T45 2
others[2] 32 1 T71 2 T122 2 T366 2
others[3] 40 1 T45 2 T213 2 T366 2
others[4] 36 1 T3 2 T71 2 T102 2
others[5] 54 1 T2 2 T71 2 T104 2
others[6] 44 1 T96 2 T122 4 T123 2
others[7] 40 1 T96 2 T122 2 T169 2
false 13818 1 T1 4 T2 53 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 122 1 T5 4 T101 4 T71 6
others[1] 92 1 T96 2 T71 6 T122 2
others[2] 94 1 T71 2 T169 2 T279 2
others[3] 92 1 T16 6 T71 2 T104 2
others[4] 62 1 T71 2 T72 2 T122 4
others[5] 82 1 T16 2 T103 2 T122 2
others[6] 94 1 T71 2 T365 2 T243 2
others[7] 114 1 T2 2 T5 2 T100 2
false 13818 1 T1 4 T2 53 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 78 1 T5 2 T69 2 T101 2
others[1] 82 1 T100 2 T105 2 T64 2
others[2] 90 1 T5 2 T71 2 T102 2
others[3] 88 1 T16 2 T69 4 T71 2
others[4] 80 1 T2 2 T38 2 T122 4
others[5] 86 1 T2 2 T71 2 T102 2
others[6] 98 1 T2 2 T96 4 T100 2
others[7] 110 1 T96 2 T16 2 T69 2
false 13818 1 T1 4 T2 53 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T5 2 T236 2 T213 2
others[1] 110 1 T3 2 T103 2 T122 4
others[2] 100 1 T2 2 T69 2 T71 4
others[3] 74 1 T5 2 T71 2 T122 2
others[4] 66 1 T71 2 T122 2 T213 2
others[5] 94 1 T2 2 T101 2 T71 6
others[6] 92 1 T5 2 T38 2 T71 4
others[7] 94 1 T103 4 T45 2 T122 2
false 13818 1 T1 4 T2 53 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T71 2 T64 4 T122 2
others[1] 72 1 T16 2 T71 2 T169 2
others[2] 88 1 T72 2 T122 2 T73 2
others[3] 94 1 T101 2 T130 2 T133 2
others[4] 98 1 T2 2 T100 2 T101 2
others[5] 88 1 T69 2 T101 2 T103 2
others[6] 78 1 T5 2 T103 2 T64 2
others[7] 102 1 T5 2 T100 2 T71 2
false 13818 1 T1 4 T2 53 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 90 1 T5 2 T69 2 T122 6
others[1] 88 1 T5 2 T96 2 T16 2
others[2] 76 1 T2 2 T71 2 T102 2
others[3] 90 1 T5 4 T16 2 T71 2
others[4] 96 1 T2 2 T5 2 T96 2
others[5] 84 1 T71 4 T102 2 T104 2
others[6] 82 1 T5 2 T96 2 T101 2
others[7] 92 1 T101 2 T102 2 T105 2
false 13818 1 T1 4 T2 53 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 19 1 T6 1 T12 1 T37 1
others[1] 23 1 T71 4 T265 1 T172 2
others[2] 14 1 T12 1 T265 1 T19 1
others[3] 22 1 T4 2 T171 2 T140 3
others[4] 17 1 T367 2 T317 2 T19 1
others[5] 9 1 T234 2 T28 1 T143 1
others[6] 14 1 T13 1 T27 1 T212 2
others[7] 36 1 T12 1 T71 2 T234 2
false 13818 1 T1 4 T2 53 T3 11
true 2092 1 T2 10 T3 4 T4 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 24 1 T367 2 T317 2 T19 1
others[1] 18 1 T212 2 T138 2 T143 1
others[2] 20 1 T12 2 T71 2 T265 1
others[3] 14 1 T12 1 T13 1 T123 2
others[4] 18 1 T71 2 T234 2 T27 1
others[5] 11 1 T140 1 T143 1 T368 1
others[6] 28 1 T4 2 T6 1 T71 2
others[7] 21 1 T171 2 T367 2 T265 1
false 11198 1 T1 3 T2 41 T3 10
true 18263 1 T1 5 T2 66 T3 15


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T5 2 T69 2 T71 2
others[1] 84 1 T2 2 T122 2 T169 2
others[2] 64 1 T96 2 T71 2 T105 2
others[3] 96 1 T5 2 T71 2 T103 2
others[4] 96 1 T71 4 T102 2 T103 2
others[5] 80 1 T16 2 T71 2 T105 2
others[6] 76 1 T71 4 T169 2 T213 4
others[7] 132 1 T101 2 T71 2 T64 2
false 7582 1 T1 3 T2 24 T3 1
true 16231 1 T1 5 T2 56 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T71 2 T104 2 T45 2
others[1] 80 1 T5 2 T69 2 T71 6
others[2] 90 1 T101 2 T71 4 T251 2
others[3] 84 1 T96 2 T69 2 T101 2
others[4] 72 1 T5 2 T102 2 T103 2
others[5] 90 1 T2 2 T71 2 T105 2
others[6] 102 1 T69 2 T103 2 T105 2
others[7] 102 1 T16 2 T71 6 T103 4
false 6587 1 T1 2 T2 20 T3 2
true 15973 1 T1 4 T2 56 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T5 2 T104 2 T122 2
others[1] 82 1 T5 2 T16 2 T71 6
others[2] 84 1 T5 2 T71 4 T45 2
others[3] 100 1 T2 2 T96 2 T122 2
others[4] 78 1 T5 2 T38 2 T101 2
others[5] 86 1 T3 4 T16 2 T71 6
others[6] 86 1 T101 2 T71 4 T64 4
others[7] 108 1 T5 2 T38 2 T101 2
false 7130 1 T1 2 T2 21 T3 1
true 16025 1 T1 4 T2 56 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 18 1 T13 1 T27 1 T369 2
others[1] 9 1 T140 1 T246 1 T370 1
others[2] 14 1 T17 1 T371 1 T31 1
others[3] 16 1 T265 1 T372 2 T369 2
others[4] 6 1 T319 1 T373 2 T374 1
others[5] 16 1 T201 1 T249 2 T375 2
others[6] 9 1 T37 1 T376 2 T140 1
others[7] 20 1 T171 2 T13 1 T377 2
false 11137 1 T1 3 T2 40 T3 10
true 18229 1 T1 5 T2 67 T3 15


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 50 1 T38 2 T71 2 T365 2
others[1] 54 1 T133 2 T250 2 T378 2
others[2] 58 1 T2 2 T69 4 T71 2
others[3] 46 1 T38 2 T101 2 T103 2
others[4] 58 1 T5 2 T16 2 T101 2
others[5] 66 1 T71 2 T365 2 T279 2
others[6] 52 1 T101 2 T71 4 T103 2
others[7] 60 1 T16 2 T122 2 T367 2
false 8910 1 T1 3 T2 38 T3 10
true 16226 1 T1 5 T2 56 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 18 1 T27 1 T379 2 T306 1
others[1] 17 1 T380 2 T381 2 T140 1
others[2] 16 1 T19 1 T268 2 T382 1
others[3] 22 1 T69 2 T123 2 T383 2
others[4] 16 1 T96 2 T384 2 T140 1
others[5] 12 1 T4 2 T385 2 T31 1
others[6] 18 1 T27 1 T386 2 T387 2
others[7] 12 1 T12 1 T306 1 T388 1
false 11085 1 T1 2 T2 39 T3 10
true 18195 1 T1 4 T2 66 T3 15


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T2 2 T5 2 T96 2
others[1] 74 1 T5 2 T105 2 T72 2
others[2] 86 1 T71 4 T103 2 T236 2
others[3] 70 1 T69 2 T71 4 T213 2
others[4] 100 1 T5 2 T96 2 T16 2
others[5] 84 1 T101 2 T71 4 T64 4
others[6] 68 1 T3 2 T5 2 T101 2
others[7] 120 1 T16 2 T69 2 T101 2
false 7480 1 T1 2 T2 26 T3 1
true 16131 1 T1 4 T2 56 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 14 1 T101 2 T389 2 T248 1
others[1] 14 1 T390 2 T391 2 T392 2
others[2] 14 1 T323 2 T379 2 T371 1
others[3] 24 1 T6 1 T171 2 T105 2
others[4] 16 1 T13 1 T123 2 T308 1
others[5] 22 1 T12 1 T393 2 T394 1
others[6] 20 1 T2 2 T6 1 T27 1
others[7] 16 1 T4 2 T71 2 T27 1
false 11042 1 T1 2 T2 39 T3 10
true 18184 1 T1 4 T2 66 T3 14


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 38 1 T2 2 T71 2 T104 2
others[1] 36 1 T122 2 T213 2 T123 2
others[2] 34 1 T96 2 T366 2 T323 2
others[3] 26 1 T102 2 T122 2 T213 4
others[4] 48 1 T71 4 T45 2 T122 2
others[5] 40 1 T96 2 T122 2 T170 2
others[6] 48 1 T3 2 T71 2 T104 2
others[7] 52 1 T122 2 T169 2 T234 2
false 9474 1 T1 2 T2 23 T3 1
true 16195 1 T1 4 T2 56 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T5 2 T16 2 T71 2
others[1] 76 1 T5 2 T102 2 T105 2
others[2] 102 1 T96 2 T16 2 T100 2
others[3] 82 1 T71 4 T237 2 T122 2
others[4] 82 1 T5 2 T16 2 T71 6
others[5] 120 1 T101 2 T103 2 T104 2
others[6] 82 1 T104 2 T122 4 T243 2
others[7] 112 1 T2 2 T16 2 T71 6
false 6798 1 T1 2 T2 22 T3 5
true 15988 1 T1 4 T2 56 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 106 1 T96 2 T101 2 T122 2
others[1] 50 1 T5 2 T69 2 T71 2
others[2] 90 1 T38 2 T69 2 T103 2
others[3] 84 1 T16 2 T71 2 T105 2
others[4] 104 1 T96 2 T16 2 T69 4
others[5] 92 1 T2 2 T96 2 T71 2
others[6] 88 1 T2 2 T5 2 T213 4
others[7] 98 1 T2 2 T100 2 T71 2
false 6798 1 T1 2 T2 22 T3 5
true 15988 1 T1 4 T2 56 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T3 2 T5 2 T71 2
others[1] 110 1 T5 2 T69 2 T45 2
others[2] 94 1 T5 2 T71 4 T122 2
others[3] 76 1 T38 2 T101 2 T71 4
others[4] 74 1 T71 2 T102 2 T105 2
others[5] 86 1 T2 4 T71 4 T103 4
others[6] 90 1 T102 2 T122 4 T213 2
others[7] 84 1 T71 2 T102 2 T236 2
false 6209 1 T1 1 T2 21 T3 1
true 15976 1 T1 4 T2 56 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T100 2 T71 2 T102 2
others[1] 72 1 T5 2 T101 2 T71 4
others[2] 92 1 T16 2 T64 4 T72 2
others[3] 68 1 T100 2 T71 2 T103 2
others[4] 116 1 T5 2 T101 2 T122 2
others[5] 82 1 T101 2 T236 2 T73 2
others[6] 74 1 T122 2 T130 2 T234 2
others[7] 114 1 T2 2 T69 2 T71 2
false 6209 1 T1 1 T2 21 T3 1
true 15976 1 T1 4 T2 56 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 52 1 T16 2 T71 4 T172 2
others[1] 50 1 T71 4 T279 2 T235 2
others[2] 64 1 T5 2 T69 2 T102 2
others[3] 66 1 T96 4 T71 2 T103 2
others[4] 68 1 T16 2 T71 2 T105 2
others[5] 50 1 T2 2 T122 4 T234 2
others[6] 54 1 T71 2 T122 4 T213 4
others[7] 92 1 T213 6 T395 2 T366 2
false 6634 1 T1 1 T2 25 T3 4
true 17258 1 T1 4 T2 65 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 52 1 T71 4 T122 2 T250 2
others[1] 58 1 T71 2 T122 2 T213 2
others[2] 72 1 T71 2 T105 2 T45 2
others[3] 62 1 T5 2 T122 2 T213 2
others[4] 70 1 T38 2 T71 4 T236 2
others[5] 62 1 T5 2 T16 2 T103 2
others[6] 66 1 T96 2 T102 2 T104 2
others[7] 60 1 T105 2 T236 2 T122 2
false 6634 1 T1 1 T2 25 T3 4
true 17258 1 T1 4 T2 65 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 14 1 T213 2 T28 1 T371 1
others[1] 25 1 T171 2 T245 2 T389 2
others[2] 22 1 T71 2 T234 2 T27 1
others[3] 15 1 T308 1 T394 1 T77 2
others[4] 17 1 T102 2 T242 2 T39 2
others[5] 14 1 T6 1 T103 2 T28 2
others[6] 18 1 T367 2 T369 2 T306 1
others[7] 25 1 T6 2 T12 1 T396 2
false 11285 1 T1 3 T2 41 T3 10
true 18337 1 T1 5 T2 65 T3 14


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T2 2 T69 2 T102 4
others[1] 72 1 T2 2 T5 4 T96 4
others[2] 100 1 T71 2 T72 2 T236 2
others[3] 86 1 T5 2 T96 2 T69 2
others[4] 100 1 T16 2 T101 2 T105 2
others[5] 94 1 T5 4 T16 2 T71 6
others[6] 78 1 T5 2 T101 2 T169 2
others[7] 88 1 T71 4 T105 2 T64 4
false 7500 1 T1 2 T2 24 T3 1
true 16183 1 T1 4 T2 56 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 14 1 T13 1 T37 1 T248 1
others[1] 10 1 T369 2 T397 2 T398 2
others[2] 7 1 T306 1 T376 2 T371 1
others[3] 23 1 T306 1 T375 2 T140 1
others[4] 11 1 T265 1 T248 1 T140 1
others[5] 10 1 T201 1 T17 1 T369 2
others[6] 13 1 T171 2 T13 1 T377 2
others[7] 20 1 T27 1 T372 2 T140 1
false 13818 1 T1 4 T2 53 T3 11
true 2106 1 T2 12 T3 4 T4 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%