RV_CORE_IBEX Lint Results

Sunday June 23 2024 23:02:35 UTC

GitHub Revision: 25e609d6bb

Branch: os_regression

Tool: ASCENTLINT

Build Mode Flow Infos Flow Warnings Flow Errors Lint Infos Lint Warnings Lint Errors
default 0 0 0 425 0 0

Messages for Build Mode 'default'

Lint Infos

I   BLOCK_DECL:   prim_util_memload.svh:58   Declaration of 'show_mem_paths' encountered in a begin-end block                 New                            

I   FSM_DEFAULT_REQ:   ibex_icache.sv:1134       Next state register 'inval_state_d' has no assignment in the default branch of the case statement for this finite state machine                                  New                            

I   FSM_DEFAULT_REQ:   prim_sync_reqack.sv:253   Next state register 'gen_nrz_hs_protocol.src_fsm_ns' has no assignment in the default branch of the case statement for this finite state machine                 New                            

I   FSM_DEFAULT_REQ:   prim_sync_reqack.sv:297   Next state register 'gen_nrz_hs_protocol.dst_fsm_ns' has no assignment in the default branch of the case statement for this finite state machine                 New                            

I   FSM_DEFAULT_REQ:   prim_diff_decode.sv:158   Next state register 'gen_async.state_d' has no assignment in the default branch of the case statement for this finite state machine                              New                            

I   NESTED_SUBPROG:   ibex_pmp.sv:113          Function 'mml_perm_check' is called from within a function                                             New                            

I   NESTED_SUBPROG:   ibex_pmp.sv:117          Function 'orig_perm_check' is called from within a function                                            New                            

I   NESTED_SUBPROG:   lc_ctrl_pkg.sv:208       Function 'lc_tx_and' is called from within a function                                                  New                            

I   NESTED_SUBPROG:   prim_cipher_pkg.sv:113   Function 'prince_nibble_red16' is called from within a function                                        New                            

I   NESTED_SUBPROG:   prim_cipher_pkg.sv:114   Function 'prince_nibble_red16' is called from within a function                                        New                            

I   NESTED_SUBPROG:   prim_cipher_pkg.sv:115   Function 'prince_nibble_red16' is called from within a function                                        New                            

I   NESTED_SUBPROG:   prim_cipher_pkg.sv:116   Function 'prince_nibble_red16' is called from within a function                                        New                            

I   NESTED_SUBPROG:   prim_cipher_pkg.sv:118   Function 'prince_nibble_red16' is called from within a function                                        New                            

I   NESTED_SUBPROG:   prim_cipher_pkg.sv:119   Function 'prince_nibble_red16' is called from within a function                                        New                            

I   NESTED_SUBPROG:   prim_cipher_pkg.sv:120   Function 'prince_nibble_red16' is called from within a function                                        New                            

I   NESTED_SUBPROG:   prim_cipher_pkg.sv:121   Function 'prince_nibble_red16' is called from within a function                                        New                            

I   NESTED_SUBPROG:   prim_cipher_pkg.sv:123   Function 'prince_nibble_red16' is called from within a function                                        New                            

I   NESTED_SUBPROG:   prim_cipher_pkg.sv:124   Function 'prince_nibble_red16' is called from within a function                                        New                            

I   NESTED_SUBPROG:   prim_cipher_pkg.sv:125   Function 'prince_nibble_red16' is called from within a function                                        New                            

I   NESTED_SUBPROG:   prim_cipher_pkg.sv:126   Function 'prince_nibble_red16' is called from within a function                                        New                            

I   NESTED_SUBPROG:   prim_cipher_pkg.sv:128   Function 'prince_nibble_red16' is called from within a function                                        New                            

I   NESTED_SUBPROG:   prim_cipher_pkg.sv:129   Function 'prince_nibble_red16' is called from within a function                                        New                            

I   NESTED_SUBPROG:   prim_cipher_pkg.sv:130   Function 'prince_nibble_red16' is called from within a function                                        New                            

I   NESTED_SUBPROG:   prim_cipher_pkg.sv:131   Function 'prince_nibble_red16' is called from within a function                                        New                            

I   NESTED_SUBPROG:   prim_cipher_pkg.sv:356   Function 'sbox4_8bit' is called from within a function                                                 New                            

I   NESTED_SUBPROG:   prim_mubi_pkg.sv:125     Function 'mubi4_or' is called from within a function                                                   New                            

I   NESTED_SUBPROG:   prim_mubi_pkg.sv:132     Function 'mubi4_and' is called from within a function                                                  New                            

I   NESTED_SUBPROG:   tlul_pkg.sv:143          Function 'prim_mubi_pkg::mubi4_test_invalid' is called from within a function                          New                            

I   NESTED_SUBPROG:   tlul_pkg.sv:176          Function 'extract_h2d_cmd_intg' is called from within a function                                       New                            

I   NESTED_SUBPROG:   tlul_pkg.sv:178          Function 'prim_secded_pkg::prim_secded_inv_64_57_enc' is called from within a function                 New                            

I   NESTED_SUBPROG:   tlul_pkg.sv:187          Function 'prim_secded_pkg::prim_secded_inv_39_32_enc' is called from within a function                 New                            

I   NESTED_SUBPROG:   tlul_pkg.sv:196          Function 'get_cmd_intg' is called from within a function                                               New                            

I   NESTED_SUBPROG:   tlul_pkg.sv:203          Function 'get_data_intg' is called from within a function                                              New                            

I   VAR_INDEX_WRITE:   ibex_alu.sv:790            Variable range select expression 'g_alu_rvb.gen_alu_rvb_otearlgrey_full.vld[b * 2 +: 2]' encountered                 New                            

I   VAR_INDEX_WRITE:   ibex_alu.sv:801            Variable range select expression 'g_alu_rvb.gen_alu_rvb_otearlgrey_full.vld[h * 4 +: 4]' encountered                 New                            

I   VAR_INDEX_WRITE:   ibex_cs_registers.sv:685   Variable index expression 'mhpmcounter_we[mhpmcounter_idx]' encountered                                              New                            

I   VAR_INDEX_WRITE:   ibex_cs_registers.sv:698   Variable index expression 'mhpmcounterh_we[mhpmcounter_idx]' encountered                                             New                            

I   VAR_INDEX_WRITE:   prim_subst_perm.sv:69      Variable range select expression 'gen_round[0:1].data_state_sbox[k * 4 +: 4]' encountered                            New                            

I   VAR_INDEX_WRITE:   prim_cipher_pkg.sv:83      Variable range select expression 'state_out[k * 4 +: 4]' encountered                                                 New                            

I   VAR_INDEX_WRITE:   prim_cipher_pkg.sv:329     Variable range select expression 'state_out[k * 4 +: 4]' encountered                                                 New                            

I   VAR_INDEX_WRITE:   prim_cipher_pkg.sv:356     Variable range select expression 'state_out[k * 8 +: 8]' encountered                                                 New                            

I   CASE_INC:   ibex_alu.sv:60                Case statement tag not specified for value 'b0000000 and many other values                      New                            

I   CASE_INC:   ibex_alu.sv:120               Case statement tag not specified for value 'b0000000 and many other values                      New                            

I   CASE_INC:   ibex_alu.sv:160               Case statement tag not specified for value 'b0000000 and many other values                      New                            

I   CASE_INC:   ibex_alu.sv:305               Case statement tag not specified for value 'b0000000 and many other values                      New                            

I   CASE_INC:   ibex_alu.sv:372               Case statement tag not specified for value 'b0000000 and many other values                      New                            

I   CASE_INC:   ibex_alu.sv:583               Case statement tag not specified for value 'b0000000 and many other values                      New                            

I   CASE_INC:   ibex_alu.sv:778               Case statement tag not specified for value 'b0000000 and many other values                      New                            

I   CASE_INC:   ibex_alu.sv:1206              Case statement tag not specified for value 'b0000000 and many other values                      New                            

I   CASE_INC:   ibex_alu.sv:1322              Case statement tag not specified for value 'b1000001 and many other values                      New                            

I   CASE_INC:   ibex_controller.sv:494        Case statement tag not specified for value 'b1010 and 5 other values                            New                            

I   CASE_INC:   ibex_cs_registers.sv:133      Case statement tag not specified for value 'b000 and 3 other values                             New                            

I   CASE_INC:   ibex_cs_registers.sv:330      Case statement tag not specified for value 'b000000000000 and many other values                 New                            

I   CASE_INC:   ibex_cs_registers.sv:605      Case statement tag not specified for value 'b000000000000 and many other values                 New                            

I   CASE_INC:   ibex_decoder.sv:237           Case statement tag not specified for value 'b0000000 and many other values                      New                            

I   CASE_INC:   ibex_decoder.sv:277           Case statement tag not specified for value 'b010 and 1 other value                              New                            

I   CASE_INC:   ibex_decoder.sv:306           Case statement tag not specified for value 'b11                                                 New                            

I   CASE_INC:   ibex_decoder.sv:323           Case statement tag not specified for value 'b11                                                 New                            

I   CASE_INC:   ibex_decoder.sv:363           Case statement tag not specified for value 'b00010 and 24 other values                          New                            

I   CASE_INC:   ibex_decoder.sv:379           Case statement tag not specified for value 'b0001000 and many other values                      New                            

I   CASE_INC:   ibex_decoder.sv:404           Case statement tag not specified for value 'b00010 and 23 other values                          New                            

I   CASE_INC:   ibex_decoder.sv:456           Case statement tag not specified for value 'b0000010000 and many other values                   New                            

I   CASE_INC:   ibex_decoder.sv:566           Case statement tag not specified for value 'b010 and 5 other values                             New                            

I   CASE_INC:   ibex_decoder.sv:594           Case statement tag not specified for value 'h 40 and many other values                          New                            

I   CASE_INC:   ibex_decoder.sv:630           Case statement tag not specified for value 'b00                                                 New                            

I   CASE_INC:   ibex_decoder.sv:690           Case statement tag not specified for value 'b0000000 and many other values                      New                            

I   CASE_INC:   ibex_decoder.sv:742           Case statement tag not specified for value 'b010 and 1 other value                              New                            

I   CASE_INC:   ibex_decoder.sv:833           Case statement tag not specified for value 'b00010 and 24 other values                          New                            

I   CASE_INC:   ibex_decoder.sv:845           Case statement tag not specified for value 'b0001000 and many other values                      New                            

I   CASE_INC:   ibex_decoder.sv:909           Case statement tag not specified for value 'b00010 and 23 other values                          New                            

I   CASE_INC:   ibex_decoder.sv:952           Case statement tag not specified for value 'b00000 and 27 other values                          New                            

I   CASE_INC:   ibex_decoder.sv:993           Case statement tag not specified for value 'b0000010000 and many other values                   New                            

I   CASE_INC:   ibex_decoder.sv:1141          Case statement tag not specified for value 'b010 and 5 other values                             New                            

I   CASE_INC:   ibex_id_stage.sv:328          Case statement tag not specified for value 'b01 and 1 other value                               New                            

I   CASE_INC:   ibex_id_stage.sv:337          Case statement tag not specified for value 'b001 and 3 other values                             New                            

I   CASE_INC:   ibex_id_stage.sv:348          Case statement tag not specified for value 'b010 and 2 other values                             New                            

I   CASE_INC:   ibex_if_stage.sv:208          Case statement tag not specified for value 'b110 and 1 other value                              New                            

I   CASE_INC:   ibex_load_store_unit.sv:383   Case statement tag not specified for value 'b101 and 2 other values                             New                            

I   CASE_INC:   ibex_multdiv_fast.sv:425      Case statement tag not specified for value 'b111                                                New                            

I   CASE_INC:   prim_alert_sender.sv:199      Case statement tag not specified for value 'b111                                                New                            

I   CASE_INC:   prim_diff_decode.sv:115       Case statement tag not specified for value 'b11                                                 New                            

I   CASE_INC:   prim_esc_receiver.sv:168      Case statement tag not specified for value 'b101 and 2 other values                             New                            

I   CASE_INC:   tlul_err.sv:62                Case statement tag not specified for value 'h3                                                  New                            

I   CASE_SEL_CONST:   ibex_alu.sv:85                     Constant value '1'b1' found as case statement selector                 New                                                

I   CASE_SEL_CONST:   ibex_alu.sv:97                     Constant value '1'b1' found as case statement selector                 New                                                

I   CASE_SEL_CONST:   ibex_alu.sv:335                    Constant value '1'b1' found as case statement selector                 New                                                

I   CASE_SEL_CONST:   ibex_alu.sv:392                    Constant value '1'b1' found as case statement selector                 New                                                

I   CASE_SEL_CONST:   ibex_alu.sv:459                    Constant value '1'b1' found as case statement selector                 New                                                

I   CASE_SEL_CONST:   ibex_alu.sv:564                    Constant value '1'b1' found as case statement selector                 New                                                

I   CASE_SEL_CONST:   ibex_alu.sv:933                    Constant value '1'b1' found as case statement selector                 New                                                

I   CASE_SEL_CONST:   ibex_alu.sv:980                    Constant value '1'b1' found as case statement selector                 New                                                

I   CASE_SEL_CONST:   ibex_alu.sv:1246                   Constant value '1'b1' found as case statement selector                 New                                                

I   CASE_SEL_CONST:   ibex_controller.sv:757             Constant value '1'b1' found as case statement selector                 New                                                

I   CASE_SEL_CONST:   ibex_cs_registers.sv:711           Constant value '1'b1' found as case statement selector                 New                                                

I   CASE_SEL_CONST:   ibex_cs_registers.sv:714           Constant value '1'b1' found as case statement selector                 New                                                

I   CASE_SEL_CONST:   ibex_id_stage.sv:809               Constant value '1'b1' found as case statement selector                 New                                                

I   EXTRA_PARENS:   ibex_icache.sv:979   '((output_addr_q[1] & (~output_compressed | output_err)) | (~output_addr_q[1] & output_compressed & ~output_err & ready_i))' is enclosed within two sets of parenthesis                 New                            

I   ONE_BIT_VEC:   ibex_alu.sv:746                  Declaration range '[0:0]' of 'g_alu_rvb.gen_alu_rvb_otearlgrey_full.sel_h' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                             New                            

I   ONE_BIT_VEC:   ibex_csr.sv:14                   Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'rv_core_ibex.u_core.u_ibex_core.cs_registers_i.gen_trigger_regs.g_dbg_tmatch_reg[0].u_tmatch_control_csr' of module 'ibex_csr' (Width=1)                                                                                                                                                                                                                                                                                                          New                            

I   ONE_BIT_VEC:   ibex_csr.sv:19                   Declaration range '[Width - 1:0]' ([0:0]) of 'wr_data_i' has a length of one, instance 'rv_core_ibex.u_core.u_ibex_core.cs_registers_i.gen_trigger_regs.g_dbg_tmatch_reg[0].u_tmatch_control_csr' of module 'ibex_csr' (Width=1)                                                                                                                                                                                                                                                                                                           New                            

I   ONE_BIT_VEC:   ibex_csr.sv:21                   Declaration range '[Width - 1:0]' ([0:0]) of 'rd_data_o' has a length of one, instance 'rv_core_ibex.u_core.u_ibex_core.cs_registers_i.gen_trigger_regs.g_dbg_tmatch_reg[0].u_tmatch_control_csr' of module 'ibex_csr' (Width=1)                                                                                                                                                                                                                                                                                                           New                            

I   ONE_BIT_VEC:   ibex_csr.sv:26                   Declaration range '[Width - 1:0]' ([0:0]) of 'rdata_q' has a length of one, instance 'rv_core_ibex.u_core.u_ibex_core.cs_registers_i.gen_trigger_regs.g_dbg_tmatch_reg[0].u_tmatch_control_csr' of module 'ibex_csr' (Width=1)                                                                                                                                                                                                                                                                                                             New                            

I   ONE_BIT_VEC:   ibex_icache.sv:143               Declaration range '[IC_LINE_BEATS_W - 1:0]' ([0:0]) of 'fill_ext_off' has a length of one, instance 'rv_core_ibex.u_core.u_ibex_core.if_stage_i.gen_icache.icache_i' of module 'ibex_icache' (BUS_BYTES=4 ('BUS_SIZE / 8'),BUS_SIZE=32,IC_LINE_BEATS=2 ('IC_LINE_BYTES / BUS_BYTES'),IC_LINE_BEATS_W=1 ('$clog2(IC_LINE_BEATS)'),IC_LINE_BYTES=8 ('IC_LINE_SIZE / 8'),IC_LINE_SIZE=64)                                                                                                                                                     New                            

I   ONE_BIT_VEC:   ibex_icache.sv:285               Declaration range '[22 - IC_TAG_SIZE:0]' ([0:0]) of 'gen_ecc_wdata.unused_tag_ecc_output' has a length of one, instance 'rv_core_ibex.u_core.u_ibex_core.if_stage_i.gen_icache.icache_i' of module 'ibex_icache' (ADDR_W=32,IC_INDEX_W=8 ('$clog2(IC_NUM_LINES)'),IC_LINE_BYTES=8 ('IC_LINE_SIZE / 8'),IC_LINE_SIZE=64,IC_LINE_W=3 ('$clog2(IC_LINE_BYTES)'),IC_NUM_LINES=32'h100 ('IC_SIZE_BYTES / IC_NUM_WAYS / IC_LINE_BYTES'),IC_NUM_WAYS=2,IC_SIZE_BYTES=4096,IC_TAG_SIZE=22 ('ADDR_W - IC_INDEX_W - IC_LINE_W + 1'))                 New                            

I   ONE_BIT_VEC:   ibex_lockstep.sv:123             Declaration range '[LockstepOffsetW - 1:0]' ([0:0]) of 'rst_shadow_cnt' has a length of one, instance 'rv_core_ibex.u_core.gen_lockstep.u_ibex_lockstep' of module 'ibex_lockstep' (LockstepOffset=2,LockstepOffsetW=1 ('$clog2(LockstepOffset)'))                                                                                                                                                                                                                                                                                         New                            

I   ONE_BIT_VEC:   rv_core_ibex.sv:270              Declaration range '[0:0]' of 'lc_cpu_en' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                                               New                            

I   ONE_BIT_VEC:   rv_core_ibex.sv:278              Declaration range '[0:0]' of 'pwrmgr_cpu_en' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                                           New                            

I   ONE_BIT_VEC:   rv_core_ibex_cfg_reg_top.sv:97   Declaration range '[0:0]' of 'reg_steer' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                                               New                            

I   ONE_BIT_VEC:   prim_buf.sv:24                   Declaration range '[Width - 1:0]' ([0:0]) of 'in_i' has a length of one, instance 'rv_core_ibex.u_prim_esc_receiver.u_prim_buf_esc_req.u_secure_anchor_buf' of module 'prim_buf' (Width=1)                                                                                                                                                                                                                                                                                                                                                 New                            

I   ONE_BIT_VEC:   prim_buf.sv:25                   Declaration range '[Width - 1:0]' ([0:0]) of 'out_o' has a length of one, instance 'rv_core_ibex.u_prim_esc_receiver.u_prim_buf_esc_req.u_secure_anchor_buf' of module 'prim_buf' (Width=1)                                                                                                                                                                                                                                                                                                                                                New                            

I   ONE_BIT_VEC:   prim_flop.sv:22                  Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'rv_core_ibex.u_alert_nmi_sync.gen_generic.u_impl_generic.u_sync_1' of module 'prim_flop' (Width=1)                                                                                                                                                                                                                                                                                                                                                New                            

I   ONE_BIT_VEC:   prim_flop.sv:27                  Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'rv_core_ibex.u_alert_nmi_sync.gen_generic.u_impl_generic.u_sync_1' of module 'prim_flop' (Width=1)                                                                                                                                                                                                                                                                                                                                                       New                            

I   ONE_BIT_VEC:   prim_flop.sv:28                  Declaration range '[Width - 1:0]' ([0:0]) of 'q_o' has a length of one, instance 'rv_core_ibex.u_alert_nmi_sync.gen_generic.u_impl_generic.u_sync_1' of module 'prim_flop' (Width=1)                                                                                                                                                                                                                                                                                                                                                       New                            

I   ONE_BIT_VEC:   prim_flop_2sync.sv:19            Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'rv_core_ibex.u_alert_nmi_sync' of module 'prim_flop_2sync' (Width=1)                                                                                                                                                                                                                                                                                                                                                                              New                            

I   ONE_BIT_VEC:   prim_flop_2sync.sv:25            Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'rv_core_ibex.u_alert_nmi_sync' of module 'prim_flop_2sync' (Width=1)                                                                                                                                                                                                                                                                                                                                                                                     New                            

I   ONE_BIT_VEC:   prim_flop_2sync.sv:26            Declaration range '[Width - 1:0]' ([0:0]) of 'q_o' has a length of one, instance 'rv_core_ibex.u_alert_nmi_sync' of module 'prim_flop_2sync' (Width=1)                                                                                                                                                                                                                                                                                                                                                                                     New                            

I   ONE_BIT_VEC:   prim_xnor2.sv:21                 Declaration range '[Width - 1:0]' ([0:0]) of 'in0_i' has a length of one, instance 'rv_core_ibex.u_prim_esc_receiver.u_decode_esc.gen_no_async.u_xnor2_sigint' of module 'prim_xnor2' (Width=1)                                                                                                                                                                                                                                                                                                                                            New                            

I   ONE_BIT_VEC:   prim_xnor2.sv:22                 Declaration range '[Width - 1:0]' ([0:0]) of 'in1_i' has a length of one, instance 'rv_core_ibex.u_prim_esc_receiver.u_decode_esc.gen_no_async.u_xnor2_sigint' of module 'prim_xnor2' (Width=1)                                                                                                                                                                                                                                                                                                                                            New                            

I   ONE_BIT_VEC:   prim_xnor2.sv:23                 Declaration range '[Width - 1:0]' ([0:0]) of 'out_o' has a length of one, instance 'rv_core_ibex.u_prim_esc_receiver.u_decode_esc.gen_no_async.u_xnor2_sigint' of module 'prim_xnor2' (Width=1)                                                                                                                                                                                                                                                                                                                                            New                            

I   ONE_BIT_VEC:   prim_packer_fifo.sv:64           Declaration range '[DepthW:0]' ([0:0]) of 'depth_o' has a length of one, instance 'rv_core_ibex.u_edn_if.u_prim_packer_fifo' of module 'prim_packer_fifo' (DepthW=0 ('$clog2(MaxW / MinW)'),InW=32,MaxW=32 ('(InW > OutW) ? InW : OutW'),MinW=32 ('(InW < OutW) ? InW : OutW'),OutW=32)                                                                                                                                                                                                                                                    New                            

I   ONE_BIT_VEC:   prim_packer_fifo.sv:68           Declaration range '[DepthW:0]' ([0:0]) of 'FullDepth' has a length of one, instance 'rv_core_ibex.u_edn_if.u_prim_packer_fifo' of module 'prim_packer_fifo' (DepthW=0 ('$clog2(MaxW / MinW)'),InW=32,MaxW=32 ('(InW > OutW) ? InW : OutW'),MinW=32 ('(InW < OutW) ? InW : OutW'),OutW=32)                                                                                                                                                                                                                                                  New                            

I   ONE_BIT_VEC:   prim_packer_fifo.sv:69           Declaration range '[DepthW:0]' ([0:0]) of 'DepthOne' has a length of one, instance 'rv_core_ibex.u_edn_if.u_prim_packer_fifo' of module 'prim_packer_fifo' (DepthW=0 ('$clog2(MaxW / MinW)'),InW=32,MaxW=32 ('(InW > OutW) ? InW : OutW'),MinW=32 ('(InW < OutW) ? InW : OutW'),OutW=32)                                                                                                                                                                                                                                                   New                            

I   ONE_BIT_VEC:   prim_packer_fifo.sv:77           Declaration range '[DepthW:0]' ([0:0]) of 'depth_q' has a length of one, instance 'rv_core_ibex.u_edn_if.u_prim_packer_fifo' of module 'prim_packer_fifo' (DepthW=0 ('$clog2(MaxW / MinW)'),InW=32,MaxW=32 ('(InW > OutW) ? InW : OutW'),MinW=32 ('(InW < OutW) ? InW : OutW'),OutW=32)                                                                                                                                                                                                                                                    New                            

I   ONE_BIT_VEC:   prim_packer_fifo.sv:122          Declaration range '[DepthW:0]' ([0:0]) of 'gen_unpack_mode.ptr_q' has a length of one, instance 'rv_core_ibex.u_edn_if.u_prim_packer_fifo' of module 'prim_packer_fifo' (DepthW=0 ('$clog2(MaxW / MinW)'),InW=32,MaxW=32 ('(InW > OutW) ? InW : OutW'),MinW=32 ('(InW < OutW) ? InW : OutW'),OutW=32)                                                                                                                                                                                                                                      New                            

I   ONE_BIT_VEC:   prim_packer_fifo.sv:123          Declaration range '[DepthW:0]' ([0:0]) of 'gen_unpack_mode.lsb_is_one' has a length of one, instance 'rv_core_ibex.u_edn_if.u_prim_packer_fifo' of module 'prim_packer_fifo' (DepthW=0 ('$clog2(MaxW / MinW)'),InW=32,MaxW=32 ('(InW > OutW) ? InW : OutW'),MinW=32 ('(InW < OutW) ? InW : OutW'),OutW=32)                                                                                                                                                                                                                                 New                            

I   ONE_BIT_VEC:   prim_packer_fifo.sv:124          Declaration range '[DepthW:0]' ([0:0]) of 'gen_unpack_mode.max_value' has a length of one, instance 'rv_core_ibex.u_edn_if.u_prim_packer_fifo' of module 'prim_packer_fifo' (DepthW=0 ('$clog2(MaxW / MinW)'),InW=32,MaxW=32 ('(InW > OutW) ? InW : OutW'),MinW=32 ('(InW < OutW) ? InW : OutW'),OutW=32)                                                                                                                                                                                                                                  New                            

I   ONE_BIT_VEC:   prim_arbiter_fixed.sv:34         Declaration range '[IdxW - 1:0]' ([0:0]) of 'idx_o' has a length of one, instance 'rv_core_ibex.u_ibus_trans.u_sel_region' of module 'prim_arbiter_fixed' (IdxW=1 ('$clog2(N)'),N=2)                                                                                                                                                                                                                                                                                                                                                       New                            

I   ONE_BIT_VEC:   prim_arbiter_fixed.sv:57         Declaration range '[IdxW - 1:0]' ([0:0]) of 'gen_normal_case.idx_tree' has a length of one, instance 'rv_core_ibex.u_ibus_trans.u_sel_region' of module 'prim_arbiter_fixed' (IdxW=1 ('$clog2(N)'),N=2)                                                                                                                                                                                                                                                                                                                                    New                            

I   ONE_BIT_VEC:   prim_subst_perm.sv:32            Declaration range '[NumRounds:0]' ([0:0]) of 'data_state' has a length of one, instance 'rv_core_ibex.u_core.gen_rams.gen_rams_inner[0].gen_scramble_rams.tag_bank.gen_diffuse_data[0].u_prim_subst_perm_enc' of module 'prim_subst_perm' (DataWidth=28,NumRounds=0)                                                                                                                                                                                                                                                                       New                            

I   ONE_BIT_VEC:   prim_count.sv:34                 Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'rv_core_ibex.u_core.gen_lockstep.u_ibex_lockstep.u_rst_shadow_cnt' of module 'prim_count' (Width=1)                                                                                                                                                                                                                                                                                                                                               New                            

I   ONE_BIT_VEC:   prim_count.sv:53                 Declaration range '[Width - 1:0]' ([0:0]) of 'set_cnt_i' has a length of one, instance 'rv_core_ibex.u_core.gen_lockstep.u_ibex_lockstep.u_rst_shadow_cnt' of module 'prim_count' (Width=1)                                                                                                                                                                                                                                                                                                                                                New                            

I   ONE_BIT_VEC:   prim_count.sv:56                 Declaration range '[Width - 1:0]' ([0:0]) of 'step_i' has a length of one, instance 'rv_core_ibex.u_core.gen_lockstep.u_ibex_lockstep.u_rst_shadow_cnt' of module 'prim_count' (Width=1)                                                                                                                                                                                                                                                                                                                                                   New                            

I   ONE_BIT_VEC:   prim_count.sv:58                 Declaration range '[Width - 1:0]' ([0:0]) of 'cnt_o' has a length of one, instance 'rv_core_ibex.u_core.gen_lockstep.u_ibex_lockstep.u_rst_shadow_cnt' of module 'prim_count' (Width=1)                                                                                                                                                                                                                                                                                                                                                    New                            

I   ONE_BIT_VEC:   prim_count.sv:59                 Declaration range '[Width - 1:0]' ([0:0]) of 'cnt_after_commit_o' has a length of one, instance 'rv_core_ibex.u_core.gen_lockstep.u_ibex_lockstep.u_rst_shadow_cnt' of module 'prim_count' (Width=1)                                                                                                                                                                                                                                                                                                                                       New                            

I   ONE_BIT_VEC:   prim_count.sv:69                 Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValues' has a length of one, instance 'rv_core_ibex.u_core.gen_lockstep.u_ibex_lockstep.u_rst_shadow_cnt' of module 'prim_count' (Width=1)                                                                                                                                                                                                                                                                                                                                              New                            

I   ONE_BIT_VEC:   prim_count.sv:72                 Declaration range '[Width - 1:0]' ([0:0]) of 'cnt_d' has a length of one, instance 'rv_core_ibex.u_core.gen_lockstep.u_ibex_lockstep.u_rst_shadow_cnt' of module 'prim_count' (Width=1)                                                                                                                                                                                                                                                                                                                                                    New                            

I   ONE_BIT_VEC:   prim_count.sv:78                 Declaration range '[Width - 1:0]' ([0:0]) of 'fpv_force' has a length of one, instance 'rv_core_ibex.u_core.gen_lockstep.u_ibex_lockstep.u_rst_shadow_cnt' of module 'prim_count' (Width=1)                                                                                                                                                                                                                                                                                                                                                New                            

I   ONE_BIT_VEC:   prim_count.sv:86                 Declaration range '[Width - 1:0]' ([0:0]) of 'gen_cnts[0:1].set_val' has a length of one, instance 'rv_core_ibex.u_core.gen_lockstep.u_ibex_lockstep.u_rst_shadow_cnt' of module 'prim_count' (Width=1)                                                                                                                                                                                                                                                                                                                                    New                            

I   ONE_BIT_VEC:   prim_count.sv:107                Declaration range '[Width - 1:0]' ([0:0]) of 'gen_cnts[0:1].cnt_sat' has a length of one, instance 'rv_core_ibex.u_core.gen_lockstep.u_ibex_lockstep.u_rst_shadow_cnt' of module 'prim_count' (Width=1)                                                                                                                                                                                                                                                                                                                                    New                            

I   ONE_BIT_VEC:   prim_count.sv:125                Declaration range '[Width - 1:0]' ([0:0]) of 'gen_cnts[0:1].cnt_unforced_q' has a length of one, instance 'rv_core_ibex.u_core.gen_lockstep.u_ibex_lockstep.u_rst_shadow_cnt' of module 'prim_count' (Width=1)                                                                                                                                                                                                                                                                                                                             New                            

I   ONE_BIT_VEC:   prim_fifo_sync.sv:32             Declaration range '[DepthW - 1:0]' ([0:0]) of 'depth_o' has a length of one, instance 'rv_core_ibex.fifo_i.reqfifo' of module 'prim_fifo_sync' (Depth=0,DepthW=1 ('prim_util_pkg::vbits(Depth + 1)'))                                                                                                                                                                                                                                                                                                                                      New                            

I   ONE_BIT_VEC:   prim_generic_buf.sv:10           Declaration range '[Width - 1:0]' ([0:0]) of 'in_i' has a length of one, instance 'rv_core_ibex.u_prim_esc_receiver.u_prim_buf_esc_req.u_secure_anchor_buf.gen_generic.u_impl_generic' of module 'prim_generic_buf' (Width=1)                                                                                                                                                                                                                                                                                                              New                            

I   ONE_BIT_VEC:   prim_generic_buf.sv:11           Declaration range '[Width - 1:0]' ([0:0]) of 'out_o' has a length of one, instance 'rv_core_ibex.u_prim_esc_receiver.u_prim_buf_esc_req.u_secure_anchor_buf.gen_generic.u_impl_generic' of module 'prim_generic_buf' (Width=1)                                                                                                                                                                                                                                                                                                             New                            

I   ONE_BIT_VEC:   prim_generic_buf.sv:14           Declaration range '[Width - 1:0]' ([0:0]) of 'inv' has a length of one, instance 'rv_core_ibex.u_prim_esc_receiver.u_prim_buf_esc_req.u_secure_anchor_buf.gen_generic.u_impl_generic' of module 'prim_generic_buf' (Width=1)                                                                                                                                                                                                                                                                                                               New                            

I   ONE_BIT_VEC:   prim_generic_flop.sv:9           Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'rv_core_ibex.u_alert_nmi_sync.gen_generic.u_impl_generic.u_sync_1.gen_generic.u_impl_generic' of module 'prim_generic_flop' (Width=1)                                                                                                                                                                                                                                                                                                             New                            

I   ONE_BIT_VEC:   prim_generic_flop.sv:13          Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'rv_core_ibex.u_alert_nmi_sync.gen_generic.u_impl_generic.u_sync_1.gen_generic.u_impl_generic' of module 'prim_generic_flop' (Width=1)                                                                                                                                                                                                                                                                                                                    New                            

I   ONE_BIT_VEC:   prim_generic_flop.sv:14          Declaration range '[Width - 1:0]' ([0:0]) of 'q_o' has a length of one, instance 'rv_core_ibex.u_alert_nmi_sync.gen_generic.u_impl_generic.u_sync_1.gen_generic.u_impl_generic' of module 'prim_generic_flop' (Width=1)                                                                                                                                                                                                                                                                                                                    New                            

I   ONE_BIT_VEC:   prim_generic_flop_2sync.sv:9     Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'rv_core_ibex.u_alert_nmi_sync.gen_generic.u_impl_generic' of module 'prim_generic_flop_2sync' (Width=1)                                                                                                                                                                                                                                                                                                                                           New                            

I   ONE_BIT_VEC:   prim_generic_flop_2sync.sv:14    Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'rv_core_ibex.u_alert_nmi_sync.gen_generic.u_impl_generic' of module 'prim_generic_flop_2sync' (Width=1)                                                                                                                                                                                                                                                                                                                                                  New                            

I   ONE_BIT_VEC:   prim_generic_flop_2sync.sv:15    Declaration range '[Width - 1:0]' ([0:0]) of 'q_o' has a length of one, instance 'rv_core_ibex.u_alert_nmi_sync.gen_generic.u_impl_generic' of module 'prim_generic_flop_2sync' (Width=1)                                                                                                                                                                                                                                                                                                                                                  New                            

I   ONE_BIT_VEC:   prim_generic_flop_2sync.sv:18    Declaration range '[Width - 1:0]' ([0:0]) of 'd_o' has a length of one, instance 'rv_core_ibex.u_alert_nmi_sync.gen_generic.u_impl_generic' of module 'prim_generic_flop_2sync' (Width=1)                                                                                                                                                                                                                                                                                                                                                  New                            

I   ONE_BIT_VEC:   prim_generic_flop_2sync.sv:19    Declaration range '[Width - 1:0]' ([0:0]) of 'intq' has a length of one, instance 'rv_core_ibex.u_alert_nmi_sync.gen_generic.u_impl_generic' of module 'prim_generic_flop_2sync' (Width=1)                                                                                                                                                                                                                                                                                                                                                 New                            

I   ONE_BIT_VEC:   prim_generic_ram_1p.sv:49        Declaration range '[MaskWidth - 1:0]' ([0:0]) of 'wmask' has a length of one, instance 'rv_core_ibex.u_core.gen_rams.gen_rams_inner[0].gen_scramble_rams.tag_bank.u_prim_ram_1p_adv.u_mem.gen_generic.u_impl_generic' of module 'prim_generic_ram_1p' (DataBitsPerMask=28,MaskWidth=1 ('Width / DataBitsPerMask'),Width=28)                                                                                                                                                                                                                New                            

I   ONE_BIT_VEC:   prim_generic_xnor2.sv:10         Declaration range '[Width - 1:0]' ([0:0]) of 'in0_i' has a length of one, instance 'rv_core_ibex.u_prim_esc_receiver.u_decode_esc.gen_no_async.u_xnor2_sigint.gen_generic.u_impl_generic' of module 'prim_generic_xnor2' (Width=1)                                                                                                                                                                                                                                                                                                         New                            

I   ONE_BIT_VEC:   prim_generic_xnor2.sv:11         Declaration range '[Width - 1:0]' ([0:0]) of 'in1_i' has a length of one, instance 'rv_core_ibex.u_prim_esc_receiver.u_decode_esc.gen_no_async.u_xnor2_sigint.gen_generic.u_impl_generic' of module 'prim_generic_xnor2' (Width=1)                                                                                                                                                                                                                                                                                                         New                            

I   ONE_BIT_VEC:   prim_generic_xnor2.sv:12         Declaration range '[Width - 1:0]' ([0:0]) of 'out_o' has a length of one, instance 'rv_core_ibex.u_prim_esc_receiver.u_decode_esc.gen_no_async.u_xnor2_sigint.gen_generic.u_impl_generic' of module 'prim_generic_xnor2' (Width=1)                                                                                                                                                                                                                                                                                                         New                            

I   ONE_BIT_VEC:   prim_lc_sync.sv:30               Declaration range '[NumCopies - 1:0]' ([0:0]) of 'lc_en_o' has a length of one, instance 'rv_core_ibex.u_lc_sync' of module 'prim_lc_sync' (NumCopies=1)                                                                                                                                                                                                                                                                                                                                                                                   New                            

I   ONE_BIT_VEC:   prim_ram_1p_scr.sv:243           Declaration range '[NumParScr - 1:0]' ([0:0]) of 'data_scr_nonce' has a length of one, instance 'rv_core_ibex.u_core.gen_rams.gen_rams_inner[0].gen_scramble_rams.tag_bank' of module 'prim_ram_1p_scr' (AddrWidth=8 ('prim_util_pkg::vbits(Depth)'),DataNonceWidth=56 ('64 - AddrWidth'),Depth=32'sh100,NumParScr=1 ('ReplicateKeyStream ? 1 : (Width + 63) / 64'),ReplicateKeyStream=1'b0,Width=28)                                                                                                                                      New                            

I   ONE_BIT_VEC:   prim_sec_anchor_buf.sv:10        Declaration range '[Width - 1:0]' ([0:0]) of 'in_i' has a length of one, instance 'rv_core_ibex.u_prim_esc_receiver.u_prim_buf_esc_req' of module 'prim_sec_anchor_buf' (Width=1)                                                                                                                                                                                                                                                                                                                                                          New                            

I   ONE_BIT_VEC:   prim_sec_anchor_buf.sv:11        Declaration range '[Width - 1:0]' ([0:0]) of 'out_o' has a length of one, instance 'rv_core_ibex.u_prim_esc_receiver.u_prim_buf_esc_req' of module 'prim_sec_anchor_buf' (Width=1)                                                                                                                                                                                                                                                                                                                                                         New                            

I   ONE_BIT_VEC:   prim_subreg.sv:12                Declaration range '[DW - 1:0]' ([0:0]) of 'RESVAL' has a length of one, instance 'rv_core_ibex.u_reg_cfg.u_ibus_regwen_0' of module 'prim_subreg' (DW=1)                                                                                                                                                                                                                                                                                                                                                                                   New                            

I   ONE_BIT_VEC:   prim_subreg.sv:21                Declaration range '[DW - 1:0]' ([0:0]) of 'wd' has a length of one, instance 'rv_core_ibex.u_reg_cfg.u_ibus_regwen_0' of module 'prim_subreg' (DW=1)                                                                                                                                                                                                                                                                                                                                                                                       New                            

I   ONE_BIT_VEC:   prim_subreg.sv:25                Declaration range '[DW - 1:0]' ([0:0]) of 'd' has a length of one, instance 'rv_core_ibex.u_reg_cfg.u_ibus_regwen_0' of module 'prim_subreg' (DW=1)                                                                                                                                                                                                                                                                                                                                                                                        New                            

I   ONE_BIT_VEC:   prim_subreg.sv:29                Declaration range '[DW - 1:0]' ([0:0]) of 'q' has a length of one, instance 'rv_core_ibex.u_reg_cfg.u_ibus_regwen_0' of module 'prim_subreg' (DW=1)                                                                                                                                                                                                                                                                                                                                                                                        New                            

I   ONE_BIT_VEC:   prim_subreg.sv:34                Declaration range '[DW - 1:0]' ([0:0]) of 'ds' has a length of one, instance 'rv_core_ibex.u_reg_cfg.u_ibus_regwen_0' of module 'prim_subreg' (DW=1)                                                                                                                                                                                                                                                                                                                                                                                       New                            

I   ONE_BIT_VEC:   prim_subreg.sv:35                Declaration range '[DW - 1:0]' ([0:0]) of 'qs' has a length of one, instance 'rv_core_ibex.u_reg_cfg.u_ibus_regwen_0' of module 'prim_subreg' (DW=1)                                                                                                                                                                                                                                                                                                                                                                                       New                            

I   ONE_BIT_VEC:   prim_subreg.sv:39                Declaration range '[DW - 1:0]' ([0:0]) of 'wr_data' has a length of one, instance 'rv_core_ibex.u_reg_cfg.u_ibus_regwen_0' of module 'prim_subreg' (DW=1)                                                                                                                                                                                                                                                                                                                                                                                  New                            

I   ONE_BIT_VEC:   prim_subreg_arb.sv:17            Declaration range '[DW - 1:0]' ([0:0]) of 'wd' has a length of one, instance 'rv_core_ibex.u_reg_cfg.u_ibus_regwen_0.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1)                                                                                                                                                                                                                                                                                                                                                                    New                            

I   ONE_BIT_VEC:   prim_subreg_arb.sv:21            Declaration range '[DW - 1:0]' ([0:0]) of 'd' has a length of one, instance 'rv_core_ibex.u_reg_cfg.u_ibus_regwen_0.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1)                                                                                                                                                                                                                                                                                                                                                                     New                            

I   ONE_BIT_VEC:   prim_subreg_arb.sv:24            Declaration range '[DW - 1:0]' ([0:0]) of 'q' has a length of one, instance 'rv_core_ibex.u_reg_cfg.u_ibus_regwen_0.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1)                                                                                                                                                                                                                                                                                                                                                                     New                            

I   ONE_BIT_VEC:   prim_subreg_arb.sv:28            Declaration range '[DW - 1:0]' ([0:0]) of 'wr_data' has a length of one, instance 'rv_core_ibex.u_reg_cfg.u_ibus_regwen_0.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1)                                                                                                                                                                                                                                                                                                                                                               New                            

I   ONE_BIT_VEC:   prim_subreg_arb.sv:36            Declaration range '[DW - 1:0]' ([0:0]) of 'gen_w.unused_q' has a length of one, instance 'rv_core_ibex.u_reg_cfg.u_ibus_addr_en_0.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1)                                                                                                                                                                                                                                                                                                                                                       New                            

I   ONE_BIT_VEC:   prim_subreg_ext.sv:12            Declaration range '[DW - 1:0]' ([0:0]) of 'wd' has a length of one, instance 'rv_core_ibex.u_reg_cfg.u_alert_test_fatal_sw_err' of module 'prim_subreg_ext' (DW=1)                                                                                                                                                                                                                                                                                                                                                                         New                            

I   ONE_BIT_VEC:   prim_subreg_ext.sv:14            Declaration range '[DW - 1:0]' ([0:0]) of 'd' has a length of one, instance 'rv_core_ibex.u_reg_cfg.u_alert_test_fatal_sw_err' of module 'prim_subreg_ext' (DW=1)                                                                                                                                                                                                                                                                                                                                                                          New                            

I   ONE_BIT_VEC:   prim_subreg_ext.sv:19            Declaration range '[DW - 1:0]' ([0:0]) of 'q' has a length of one, instance 'rv_core_ibex.u_reg_cfg.u_alert_test_fatal_sw_err' of module 'prim_subreg_ext' (DW=1)                                                                                                                                                                                                                                                                                                                                                                          New                            

I   ONE_BIT_VEC:   prim_subreg_ext.sv:20            Declaration range '[DW - 1:0]' ([0:0]) of 'ds' has a length of one, instance 'rv_core_ibex.u_reg_cfg.u_alert_test_fatal_sw_err' of module 'prim_subreg_ext' (DW=1)                                                                                                                                                                                                                                                                                                                                                                         New                            

I   ONE_BIT_VEC:   prim_subreg_ext.sv:21            Declaration range '[DW - 1:0]' ([0:0]) of 'qs' has a length of one, instance 'rv_core_ibex.u_reg_cfg.u_alert_test_fatal_sw_err' of module 'prim_subreg_ext' (DW=1)                                                                                                                                                                                                                                                                                                                                                                         New                            

I   ONE_BIT_VEC:   tlul_adapter_host.sv:64          Declaration range '[g_multiple_reqs.ReqNumW - 1:0]' ([0:0]) of 'g_multiple_reqs.ReqNumOne' has a length of one, instance 'rv_core_ibex.tl_adapter_host_d_ibex' of module 'tlul_adapter_host' (MAX_REQS=2,g_multiple_reqs.ReqNumW=1 ('$clog2(MAX_REQS)'))                                                                                                                                                                                                                                                                                   New                            

I   ONE_BIT_VEC:   tlul_adapter_host.sv:66          Declaration range '[g_multiple_reqs.ReqNumW - 1:0]' ([0:0]) of 'g_multiple_reqs.source_d' has a length of one, instance 'rv_core_ibex.tl_adapter_host_d_ibex' of module 'tlul_adapter_host' (MAX_REQS=2,g_multiple_reqs.ReqNumW=1 ('$clog2(MAX_REQS)'))                                                                                                                                                                                                                                                                                    New                            

I   ONE_BIT_VEC:   tlul_adapter_host.sv:67          Declaration range '[g_multiple_reqs.ReqNumW - 1:0]' ([0:0]) of 'g_multiple_reqs.source_q' has a length of one, instance 'rv_core_ibex.tl_adapter_host_d_ibex' of module 'tlul_adapter_host' (MAX_REQS=2,g_multiple_reqs.ReqNumW=1 ('$clog2(MAX_REQS)'))                                                                                                                                                                                                                                                                                    New                            

I   ONE_BIT_VEC:   tlul_fifo_sync.sv:23             Declaration range '[SpareReqW - 1:0]' ([0:0]) of 'spare_req_i' has a length of one, instance 'rv_core_ibex.fifo_i' of module 'tlul_fifo_sync' (SpareReqW=1)                                                                                                                                                                                                                                                                                                                                                                                New                            

I   ONE_BIT_VEC:   tlul_fifo_sync.sv:24             Declaration range '[SpareReqW - 1:0]' ([0:0]) of 'spare_req_o' has a length of one, instance 'rv_core_ibex.fifo_i' of module 'tlul_fifo_sync' (SpareReqW=1)                                                                                                                                                                                                                                                                                                                                                                                New                            

I   ONE_BIT_VEC:   tlul_fifo_sync.sv:25             Declaration range '[SpareRspW - 1:0]' ([0:0]) of 'spare_rsp_i' has a length of one, instance 'rv_core_ibex.fifo_i' of module 'tlul_fifo_sync' (SpareRspW=1)                                                                                                                                                                                                                                                                                                                                                                                New                            

I   ONE_BIT_VEC:   tlul_fifo_sync.sv:26             Declaration range '[SpareRspW - 1:0]' ([0:0]) of 'spare_rsp_o' has a length of one, instance 'rv_core_ibex.fifo_i' of module 'tlul_fifo_sync' (SpareRspW=1)                                                                                                                                                                                                                                                                                                                                                                                New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                  Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'cfg_tl_d_o' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                    New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                  Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'cored_tl_h_i' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                  New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                  Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'corei_tl_h_i' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                  New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                  Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'd_sink' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                        New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                  Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                            New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                  Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_d2h_t' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                      New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                  Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_d_fifo2ibex' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                  Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_d_i' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                        New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                  Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_h_o' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                        New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                  Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_h_o_int' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                    New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                  Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_i' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                          New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                  Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_i_fifo2ibex' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                  Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_o' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                          New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                  Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_o_pre' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                      New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                  Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_reg_d2h' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                    New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                  Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_socket_d2h' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                 New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                  Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_t_i' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                        New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                  Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_t_p' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                        New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                  Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_u_i' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                        New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                  Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_win_d2h' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                    New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                  Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_win_d2h_err_rsp' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                            New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                  Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_win_i' has a length of one                                                                                                                                                                                                                                                                                                                                                                                                                                                      New                            

I   ONE_BIT_VEC:   tlul_socket_1n.sv:67             Declaration range '[NWD - 1:0]' ([0:0]) of 'dev_select_i' has a length of one, instance 'rv_core_ibex.u_reg_cfg.u_socket' of module 'tlul_socket_1n' (ExplicitErrs=1'b0,N=2,NWD=1 ('$clog2(ExplicitErrs ? N + 1 : N)'))                                                                                                                                                                                                                                                                                                                    New                            

I   ONE_BIT_VEC:   tlul_socket_1n.sv:78             Declaration range '[NWD - 1:0]' ([0:0]) of 'dev_select_t' has a length of one, instance 'rv_core_ibex.u_reg_cfg.u_socket' of module 'tlul_socket_1n' (ExplicitErrs=1'b0,N=2,NWD=1 ('$clog2(ExplicitErrs ? N + 1 : N)'))                                                                                                                                                                                                                                                                                                                    New                            

I   ONE_BIT_VEC:   tlul_socket_1n.sv:108            Declaration range '[NWD - 1:0]' ([0:0]) of 'dev_select_outstanding' has a length of one, instance 'rv_core_ibex.u_reg_cfg.u_socket' of module 'tlul_socket_1n' (ExplicitErrs=1'b0,N=2,NWD=1 ('$clog2(ExplicitErrs ? N + 1 : N)'))                                                                                                                                                                                                                                                                                                          New                            

I   UNREACHABLE:   ibex_compressed_decoder.sv:75    'illegal_instr_o' is assigned to a non-x value within the default branch of a fully specified case statement                                          New                            

I   UNREACHABLE:   ibex_compressed_decoder.sv:177   'illegal_instr_o' is assigned to a non-x value within the default branch of a fully specified case statement                                          New                            

I   UNREACHABLE:   ibex_compressed_decoder.sv:183   'illegal_instr_o' is assigned to a non-x value within the default branch of a fully specified case statement                                          New                            

I   UNREACHABLE:   ibex_compressed_decoder.sv:197   'illegal_instr_o' is assigned to a non-x value within the default branch of a fully specified case statement                                          New                            

I   UNREACHABLE:   ibex_compressed_decoder.sv:265   'illegal_instr_o' is assigned to a non-x value within the default branch of a fully specified case statement                                          New                            

I   UNREACHABLE:   ibex_compressed_decoder.sv:274   'illegal_instr_o' is assigned to a non-x value within the default branch of a fully specified case statement                                          New                            

I   UNREACHABLE:   ibex_cs_registers.sv:827         'csr_wdata_int' is assigned to a non-x value within the default branch of a fully specified case statement                                            New                            

I   UNREACHABLE:   ibex_cs_registers.sv:1158        'g_pmp_registers.pmp_cfg_wdata[0:15].mode' is assigned to a non-x value within the default branch of a fully specified case statement                 New                            

I   UNREACHABLE:   ibex_decoder.sv:445              'illegal_insn' is assigned to a non-x value within the default branch of a fully specified case statement                                             New                            

I   UNREACHABLE:   ibex_dummy_instr.sv:137          'dummy_set' is assigned to a non-x value within the default branch of a fully specified case statement                                                New                            

I   UNREACHABLE:   ibex_dummy_instr.sv:138          'dummy_opcode' is assigned to a non-x value within the default branch of a fully specified case statement                                             New                            

I   UNREACHABLE:   ibex_id_stage.sv:321             'alu_operand_a' is assigned to a non-x value within the default branch of a fully specified case statement                                            New                            

I   UNREACHABLE:   ibex_id_stage.sv:426             'rf_wdata_id_o' is assigned to a non-x value within the default branch of a fully specified case statement                                            New                            

I   UNREACHABLE:   ibex_id_stage.sv:879             'id_fsm_d' is assigned to a non-x value within the default branch of a fully specified case statement                                                 New                            

I   UNREACHABLE:   ibex_if_stage.sv:197             'exc_pc' is assigned to a non-x value within the default branch of a fully specified case statement                                                   New                            

I   UNREACHABLE:   ibex_load_store_unit.sv:127      'data_be' is assigned to a non-x value within the default branch of a fully specified case statement                                                  New                            

I   UNREACHABLE:   ibex_load_store_unit.sv:135      'data_be' is assigned to a non-x value within the default branch of a fully specified case statement                                                  New                            

I   UNREACHABLE:   ibex_load_store_unit.sv:147      'data_be' is assigned to a non-x value within the default branch of a fully specified case statement                                                  New                            

I   UNREACHABLE:   ibex_load_store_unit.sv:161      'data_be' is assigned to a non-x value within the default branch of a fully specified case statement                                                  New                            

I   UNREACHABLE:   ibex_load_store_unit.sv:165      'data_be' is assigned to a non-x value within the default branch of a fully specified case statement                                                  New                            

I   UNREACHABLE:   ibex_load_store_unit.sv:181      'data_wdata' is assigned to a non-x value within the default branch of a fully specified case statement                                               New                            

I   UNREACHABLE:   ibex_load_store_unit.sv:234      'rdata_w_ext' is assigned to a non-x value within the default branch of a fully specified case statement                                              New                            

I   UNREACHABLE:   ibex_load_store_unit.sv:277      'rdata_h_ext' is assigned to a non-x value within the default branch of a fully specified case statement                                              New                            

I   UNREACHABLE:   ibex_load_store_unit.sv:316      'rdata_b_ext' is assigned to a non-x value within the default branch of a fully specified case statement                                              New                            

I   UNREACHABLE:   ibex_load_store_unit.sv:326      'data_rdata_ext' is assigned to a non-x value within the default branch of a fully specified case statement                                           New                            

I   UNREACHABLE:   ibex_multdiv_fast.sv:239         'gen_mult_single_cycle.mult_state_d' is assigned to a non-x value within the default branch of a fully specified case statement                       New                            

I   UNREACHABLE:   ibex_pmp.sv:205                  'region_match_all[0:2][0:15]' is assigned to a non-x value within the default branch of a fully specified case statement                              New                            

I   EXPLICIT_BITLEN:   ibex_alu.sv:280            Bit length not specified for constant '32'                  New                            

I   EXPLICIT_BITLEN:   prim_esc_receiver.sv:115   Bit length not specified for constant '1'                   New                            

I   EXPLICIT_BITLEN:   prim_esc_receiver.sv:118   Bit length not specified for constant '1'                   New                            

I   EXPLICIT_BITLEN:   prim_lfsr.sv:407           Bit length not specified for constant '2'                   New                            

I   EXPLICIT_BITLEN:   prim_lfsr.sv:409           Bit length not specified for constant '1'                   New                            

I   EXPLICIT_BITLEN:   prim_util_pkg.sv:85        Bit length not specified for constant '1'                   New                            

I   EXPLICIT_BITLEN:   tlul_err.sv:69             Bit length not specified for constant "'h1"                 New                            

I   EXPLICIT_BITLEN:   tlul_err.sv:77             Bit length not specified for constant "'h2"                 New                            

I   INSIDE_OP_CONTEXT:   ibex_cs_registers.sv:831   'inside' operator is not within an always block or subprogram                 New                            

I   MIN_NAME_LEN:   ibex_alu.sv:349               Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_alu.sv:510               Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_alu.sv:514               Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_alu.sv:518               Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_alu.sv:522               Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_alu.sv:533               Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_alu.sv:538               Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_alu.sv:543               Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_alu.sv:787               Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_alu.sv:796               Name 'h' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_alu.sv:1082              Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_alu.sv:1086              Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_alu.sv:1090              Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_alu.sv:1094              Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_alu.sv:1098              Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_controller.sv:420        Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_cs_registers.sv:1286     Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_cs_registers.sv:1314     Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_cs_registers.sv:1324     Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_pmp.sv:139               Name 'r' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_icache.sv:558            Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_icache.sv:858            Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_icache.sv:870            Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_icache.sv:883            Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_icache.sv:917            Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_icache.sv:1038           Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_icache.sv:1047           Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_lockstep.sv:248          Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_lockstep.sv:254          Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_lockstep.sv:334          Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   ibex_register_file_ff.sv:56   Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   lc_ctrl_pkg.sv:182            Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   lc_ctrl_pkg.sv:182            Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   lc_ctrl_pkg.sv:187            Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   lc_ctrl_pkg.sv:207            Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   lc_ctrl_pkg.sv:207            Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:24    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:28    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:32    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:36    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:42    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:46    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:50    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:54    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:58    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:62    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:66    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:70    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:75    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:78    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:84    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:87    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:92    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:97    Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:103   Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:107   Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:114   Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:118   Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:122   Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:126   Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:132   Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:137   Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:140   Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_core_ibex_reg_pkg.sv:145   Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_arbiter_fixed.sv:17      Name 'N' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subst_perm.sv:46         Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subst_perm.sv:51         Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subst_perm.sv:55         Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subst_perm.sv:68         Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subst_perm.sv:72         Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subst_perm.sv:79         Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_cipher_pkg.sv:71         Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_cipher_pkg.sv:82         Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_cipher_pkg.sv:328        Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_cipher_pkg.sv:346        Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_cipher_pkg.sv:355        Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_generic_ram_1p.sv:65     Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_lfsr.sv:394              Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:80           Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:80           Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:85           Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:106          Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:106          Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:111          Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:124          Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:124          Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:131          Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:131          Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:212          Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:212          Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:217          Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:238          Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:238          Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:243          Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:256          Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:256          Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:263          Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:263          Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:344          Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:344          Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:349          Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:370          Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:370          Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:375          Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:388          Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:388          Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:395          Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:395          Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:476          Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:476          Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:481          Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:502          Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:502          Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:507          Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:520          Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:520          Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:527          Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:527          Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_ram_1p_adv.sv:232        Name 'i' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_ram_1p_scr.sv:384        Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subreg.sv:25             Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subreg.sv:29             Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subreg_arb.sv:21         Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subreg_arb.sv:24         Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subreg_ext.sv:14         Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subreg_ext.sv:19         Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   tlul_socket_1n.sv:45          Name 'N' is shorter than minimum length 2                 New                            

I   SIGNED_TYPE:   ibex_alu.sv:251            Declaration of 'shift_result_ext_signed' uses keyword 'signed'                         New                            

I   SIGNED_TYPE:   ibex_multdiv_fast.sv:51    Declaration of 'mac_res_signed' uses keyword 'signed'                                  New                            

I   SIGNED_TYPE:   ibex_multdiv_fast.sv:147   Declaration of 'gen_mult_single_cycle.mult1_res' uses keyword 'signed'                 New                            

I   ZERO_BASED:   ibex_counter.sv:76           Declaration range '[63:CounterWidth]' ([63:32]) of 'g_counter_narrow.unused_counter_load' is not zero-based                 New                            

I   ZERO_BASED:   ibex_load_store_unit.sv:80   Declaration range '[31:8]' of 'rdata_q' is not zero-based                                                                   New                            

I   ZERO_BASED:   ibex_multdiv_fast.sv:149     Declaration range '[33:32]' of 'gen_mult_single_cycle.unused_mult1_res_uns' is not zero-based                               New                            

I   ZERO_BASED:   ibex_pmp.sv:33               Declaration range '[33:PMPGranularity + 2]' ([33:2]) of 'region_addr_mask' is not zero-based                                New                            

I   ZERO_BASED:   ibex_icache.sv:107           Declaration range '[ADDR_W - 1:IC_INDEX_HI + 1]' ([31:11]) of 'lookup_addr_ic1' is not zero-based                           New                            

I   ZERO_BASED:   ibex_icache.sv:156           Declaration range '[ADDR_W - 1:BUS_W]' ([31:2]) of 'fill_ext_req_addr' is not zero-based                                    New                            

I   ZERO_BASED:   ibex_icache.sv:164           Declaration range '[ADDR_W - 1:BUS_W]' ([31:2]) of 'instr_addr' is not zero-based                                           New                            

I   ZERO_BASED:   ibex_icache.sv:175           Declaration range '[ADDR_W - 1:1]' ([31:1]) of 'output_addr_incr' is not zero-based                                         New                            

I   ZERO_BASED:   ibex_icache.sv:176           Declaration range '[ADDR_W - 1:1]' ([31:1]) of 'output_addr_d' is not zero-based                                            New                            

I   STRING_VAL:   prim_util_memload.svh:64   Parameter 'MemInitFile' with string value "" used as a constant, instance 'rv_core_ibex.u_core.gen_rams.gen_rams_inner[0].gen_scramble_rams.tag_bank.u_prim_ram_1p_adv.u_mem.gen_generic.u_impl_generic' of module 'prim_generic_ram_1p' (MemInitFile="")                 New                            

I   STRING_VAL:   prim_util_memload.svh:64   String value "" used as a constant                                                                                                                                                                                                                                        New                            

I   CONST_OUTPUT:   ibex_alu.sv:1282              Output 'imd_val_d_o[0]' is driven by constant zeros in module 'ibex_alu' (RV32B=2)                                                                                                                                                                                                                                                                                                                                                                                                                                                        New                                                    

I   CONST_OUTPUT:   ibex_alu.sv:1283              Output 'imd_val_we_o[1]' is driven by constant zero in module 'ibex_alu' (RV32B=2)                                                                                                                                                                                                                                                                                                                                                                                                                                                        New                                                    

I   CONST_OUTPUT:   ibex_controller.sv:471        Output 'nt_branch_mispredict_o' is driven by constant zero in module 'ibex_controller' (WritebackStage=1'h1,MemECC=1'h1)                                                                                                                                                                                                                                                                                                                                                                                                                  New                                                    

I   CONST_OUTPUT:   ibex_core.sv:415              Output 'instr_addr_o[1:0]' is driven by constant zeros by port 'if_stage_i.instr_addr_o[1:0]' in module 'ibex_core' (PMPEnable=1'h1,PMPNumRegions=32'h10,MHPMCounterNum=32'ha,MHPMCounterWidth=32'h20,RV32M=3,RV32B=2,BranchTargetALU=1'h1,WritebackStage=1'h1,ICache=1'h1,ICacheECC=1'h1,BusSizeECC=32'h27,TagSizeECC=32'h1c,LineSizeECC=32'h4e,DbgTriggerEn=1'h1,DbgHwBreakNum=32'h4,ResetAll=1'h1,SecureIbex=1'h1,DummyInstructions=1'h1,RegFileECC=1'h1,RegFileDataWidth=32'h27,MemECC=1'h1,MemDataWidth=32'h27)                      New                                                    

I   CONST_OUTPUT:   ibex_core.sv:757              Output 'data_addr_o[1:0]' is driven by constant zeros by port 'load_store_unit_i.data_addr_o[1:0]' in module 'ibex_core' (PMPEnable=1'h1,PMPNumRegions=32'h10,MHPMCounterNum=32'ha,MHPMCounterWidth=32'h20,RV32M=3,RV32B=2,BranchTargetALU=1'h1,WritebackStage=1'h1,ICache=1'h1,ICacheECC=1'h1,BusSizeECC=32'h27,TagSizeECC=32'h1c,LineSizeECC=32'h4e,DbgTriggerEn=1'h1,DbgHwBreakNum=32'h4,ResetAll=1'h1,SecureIbex=1'h1,DummyInstructions=1'h1,RegFileECC=1'h1,RegFileDataWidth=32'h27,MemECC=1'h1,MemDataWidth=32'h27)                 New                                                    

I   CONST_OUTPUT:   ibex_counter.sv:84            Output 'counter_val_upd_o[31:0]' is driven by constant zeros in module 'ibex_counter' (CounterWidth=32'h20)                                                                                                                                                                                                                                                                                                                                                                                                                               New                                                    

I   CONST_OUTPUT:   ibex_counter.sv:86            Output 'counter_val_upd_o[63:32]' is driven by constant zeros in module 'ibex_counter' (CounterWidth=32'h20)                                                                                                                                                                                                                                                                                                                                                                                                                              New                                                    

I   CONST_OUTPUT:   ibex_counter.sv:94            Output 'counter_val_upd_o' is driven by constant zeros in module 'ibex_counter' (CounterWidth=64)                                                                                                                                                                                                                                                                                                                                                                                                                                         New                                                    

I   CONST_OUTPUT:   ibex_counter.sv:98            Output 'counter_val_o[63:32]' is driven by constant zeros in module 'ibex_counter' (CounterWidth=32'h20)                                                                                                                                                                                                                                                                                                                                                                                                                                  New                                                    

I   CONST_OUTPUT:   ibex_cs_registers.sv:1219     Output 'csr_pmp_addr_o[0:15][1:0]' is driven by constant zeros in module 'ibex_cs_registers' (DbgTriggerEn=1'h1,DbgHwBreakNum=32'h4,DataIndTiming=1'h1,DummyInstructions=1'h1,ICache=1'h1,MHPMCounterWidth=32'h20,PMPEnable=1'h1,PMPNumRegions=32'h10,RV32M=3,RV32B=2)                                                                                                                                                                                                                                                                    New                                                    

I   CONST_OUTPUT:   ibex_csr.sv:52                Output 'rd_error_o' is driven by constant zero                                                                                                                                                                                                                                                                                                                                                                                                                                                                                            New                                                    

I   CONST_OUTPUT:   ibex_csr.sv:52                Output 'rd_error_o' is driven by constant zero in module 'ibex_csr' (Width=32'h6,ResetValue=6'h10)                                                                                                                                                                                                                                                                                                                                                                                                                                        New                                                    

I   CONST_OUTPUT:   ibex_decoder.sv:137           Output 'imm_b_type_o[0]' is driven by constant zero in module 'ibex_decoder' (RV32M=3,RV32B=2,BranchTargetALU=1'h1)                                                                                                                                                                                                                                                                                                                                                                                                                       New                                                    

I   CONST_OUTPUT:   ibex_decoder.sv:138           Output 'imm_u_type_o[11:0]' is driven by constant zeros in module 'ibex_decoder' (RV32M=3,RV32B=2,BranchTargetALU=1'h1)                                                                                                                                                                                                                                                                                                                                                                                                                   New                                                    

I   CONST_OUTPUT:   ibex_decoder.sv:139           Output 'imm_j_type_o[0]' is driven by constant zero in module 'ibex_decoder' (RV32M=3,RV32B=2,BranchTargetALU=1'h1)                                                                                                                                                                                                                                                                                                                                                                                                                       New                                                    

I   CONST_OUTPUT:   ibex_decoder.sv:142           Output 'zimm_rs1_type_o[31:5]' is driven by constant zeros in module 'ibex_decoder' (RV32M=3,RV32B=2,BranchTargetALU=1'h1)                                                                                                                                                                                                                                                                                                                                                                                                                New                                                    

I   CONST_OUTPUT:   ibex_decoder.sv:679           Output 'bt_a_mux_sel_o[0]' is driven by constant zero in module 'ibex_decoder' (RV32M=3,RV32B=2,BranchTargetALU=1'h1)                                                                                                                                                                                                                                                                                                                                                                                                                     New                                                    

I   CONST_OUTPUT:   ibex_dummy_instr.sv:148       Output 'dummy_instr_data_o[11:0]' is driven by constant 12'h033                                                                                                                                                                                                                                                                                                                                                                                                                                                                           New                                                    

I   CONST_OUTPUT:   ibex_dummy_instr.sv:148       Output 'dummy_instr_data_o[31:26]' is driven by constant zeros                                                                                                                                                                                                                                                                                                                                                                                                                                                                            New                                                    

I   CONST_OUTPUT:   ibex_id_stage.sv:559          Output 'nt_branch_mispredict_o' is driven by constant zero by port 'controller_i.nt_branch_mispredict_o' in module 'ibex_id_stage' (RV32M=3,RV32B=2,DataIndTiming=1'h1,BranchTargetALU=1'h1,WritebackStage=1'h1,MemECC=1'h1)                                                                                                                                                                                                                                                                                                              New                                                    

I   CONST_OUTPUT:   ibex_id_stage.sv:771          Output 'nt_branch_addr_o' is driven by constant zeros in module 'ibex_id_stage' (RV32M=3,RV32B=2,DataIndTiming=1'h1,BranchTargetALU=1'h1,WritebackStage=1'h1,MemECC=1'h1)                                                                                                                                                                                                                                                                                                                                                                 New                                                    

I   CONST_OUTPUT:   ibex_id_stage.sv:1025         Output 'expecting_load_resp_o' is driven by constant zero in module 'ibex_id_stage' (RV32M=3,RV32B=2,DataIndTiming=1'h1,BranchTargetALU=1'h1,WritebackStage=1'h1,MemECC=1'h1)                                                                                                                                                                                                                                                                                                                                                             New                                                    

I   CONST_OUTPUT:   ibex_id_stage.sv:1026         Output 'expecting_store_resp_o' is driven by constant zero in module 'ibex_id_stage' (RV32M=3,RV32B=2,DataIndTiming=1'h1,BranchTargetALU=1'h1,WritebackStage=1'h1,MemECC=1'h1)                                                                                                                                                                                                                                                                                                                                                            New                                                    

I   CONST_OUTPUT:   ibex_if_stage.sv:266          Output 'instr_addr_o[1:0]' is driven by constant zeros by port 'gen_icache.icache_i.instr_addr_o[1:0]' in module 'ibex_if_stage' (DummyInstructions=1'h1,ICache=1'h1,ICacheECC=1'h1,BusSizeECC=32'h27,TagSizeECC=32'h1c,LineSizeECC=32'h4e,PCIncrCheck=1'h1,ResetAll=1'h1,MemECC=1'h1,MemDataWidth=32'h27)                                                                                                                                                                                                                                New                                                    

I   CONST_OUTPUT:   ibex_if_stage.sv:674          Output 'instr_bp_taken_o' is driven by constant zero in module 'ibex_if_stage' (DummyInstructions=1'h1,ICache=1'h1,ICacheECC=1'h1,BusSizeECC=32'h27,TagSizeECC=32'h1c,LineSizeECC=32'h4e,PCIncrCheck=1'h1,ResetAll=1'h1,MemECC=1'h1,MemDataWidth=32'h27)                                                                                                                                                                                                                                                                                  New                                                    

I   CONST_OUTPUT:   ibex_load_store_unit.sv:520   Output 'data_addr_o[1:0]' is driven by constant zeros in module 'ibex_load_store_unit' (MemECC=1'h1,MemDataWidth=32'h27)                                                                                                                                                                                                                                                                                                                                                                                                                  New                                                    

I   CONST_OUTPUT:   ibex_multdiv_fast.sv:127      Output 'imd_val_d_o[1][33:32]' is driven by constant zeros in module 'ibex_multdiv_fast' (RV32M=3)                                                                                                                                                                                                                                                                                                                                                                                                                                        New                                                    

I   CONST_OUTPUT:   ibex_icache.sv:903            Output 'instr_addr_o[1:0]' is driven by constant zeros in module 'ibex_icache' (ICacheECC=1'h1,ResetAll=1'h1,BusSizeECC=32'h27,TagSizeECC=32'h1c,LineSizeECC=32'h4e)                                                                                                                                                                                                                                                                                                                                                                      New                                                    

I   CONST_OUTPUT:   ibex_icache.sv:1059           Output 'addr_o[0]' is driven by constant zero in module 'ibex_icache' (ICacheECC=1'h1,ResetAll=1'h1,BusSizeECC=32'h27,TagSizeECC=32'h1c,LineSizeECC=32'h4e)                                                                                                                                                                                                                                                                                                                                                                               New                                                    

I   CONST_OUTPUT:   ibex_top.sv:281               Output 'data_addr_o[1:0]' is driven by constant zeros by port 'u_ibex_core.data_addr_o[1:0]' in module 'ibex_top' (PMPEnable=1'h1,PMPNumRegions=32'h10,MHPMCounterNum=32'ha,MHPMCounterWidth=32'h20,RV32M=3,RV32B=2,BranchTargetALU=1'h1,WritebackStage=1'h1,ICache=1'h1,ICacheECC=1'h1,DbgTriggerEn=1'h1,DbgHwBreakNum=32'h4,SecureIbex=1'h1,ICacheScramble=1'h1)                                                                                                                                                                        New                                                    

I   CONST_OUTPUT:   ibex_top.sv:281               Output 'instr_addr_o[1:0]' is driven by constant zeros by port 'u_ibex_core.instr_addr_o[1:0]' in module 'ibex_top' (PMPEnable=1'h1,PMPNumRegions=32'h10,MHPMCounterNum=32'ha,MHPMCounterWidth=32'h20,RV32M=3,RV32B=2,BranchTargetALU=1'h1,WritebackStage=1'h1,ICache=1'h1,ICacheECC=1'h1,DbgTriggerEn=1'h1,DbgHwBreakNum=32'h4,SecureIbex=1'h1,ICacheScramble=1'h1)                                                                                                                                                                      New                                                    

I   CONST_OUTPUT:   prim_edn_req.sv:112           Output 'err_o' is driven by constant zero                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                 New                                                    

I   CONST_OUTPUT:   prim_fifo_sync.sv:41          Output 'depth_o' is driven by constant zero in module 'prim_fifo_sync' (Width=32'h6c,Depth=32'h0)                                                                                                                                                                                                                                                                                                                                                                                                                                         New                                                    

I   CONST_OUTPUT:   prim_fifo_sync.sv:56          Output 'err_o' is driven by constant zero in module 'prim_fifo_sync' (Width=32'h6c,Depth=32'h0)                                                                                                                                                                                                                                                                                                                                                                                                                                           New                                                    

I   CONST_OUTPUT:   prim_ram_1p_adv.sv:138        Output 'rerror_o' is driven by constant zeros in module 'prim_ram_1p_adv' (Depth=32'h100,Width=32'h1c,DataBitsPerMask=32'h1c)                                                                                                                                                                                                                                                                                                                                                                                                             New                                                    

I   CONST_OUTPUT:   prim_ram_1p_scr.sv:232        Output 'raddr_o[31:8]' is driven by constant zeros in module 'prim_ram_1p_scr' (Depth=32'h100,Width=32'h1c,DataBitsPerMask=32'h1c,EnableParity=0,NumPrinceRoundsHalf=32'h2,DiffWidth=32'h1c,NumAddrScrRounds=32'h2)                                                                                                                                                                                                                                                                                                                       New                                                    

I   CONST_OUTPUT:   prim_ram_1p_scr.sv:482        Output 'rerror_o' is driven by constant zeros by port 'u_prim_ram_1p_adv.rerror_o' in module 'prim_ram_1p_scr' (Depth=32'h100,Width=32'h1c,DataBitsPerMask=32'h1c,EnableParity=0,NumPrinceRoundsHalf=32'h2,DiffWidth=32'h1c,NumAddrScrRounds=32'h2)                                                                                                                                                                                                                                                                                       New                                                    

I   CONST_OUTPUT:   tlul_adapter_reg.sv:91        Output 'addr_o[1:0]' is driven by constant zeros                                                                                                                                                                                                                                                                                                                                                                                                                                                                                          New                                                    

I   CONST_OUTPUT:   tlul_adapter_reg.sv:195       Output 'intg_error_o' is driven by constant zero                                                                                                                                                                                                                                                                                                                                                                                                                                                                                          New                                                    

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