Unified Coverage Report :: Module :: prim_secded_64_57_dec

Module : prim_secded_64_57_dec

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_prim_secded_0.1/rtl/prim_secded_64_57_dec.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.u_reg.u_chk.u_chk	100.00	100.00

---

Module Instance : tb.dut.u_reg.u_chk.u_chk

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00	100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
100.00	100.00					100.00	u_chk

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Line Coverage for Module : prim_secded_64_57_dec

	Line No.	Total	Covered	Percent
TOTAL		67	67	100.00
CONT_ASSIGN	17	1	1	100.00
CONT_ASSIGN	18	1	1	100.00
CONT_ASSIGN	19	1	1	100.00
CONT_ASSIGN	20	1	1	100.00
CONT_ASSIGN	21	1	1	100.00
CONT_ASSIGN	22	1	1	100.00
CONT_ASSIGN	23	1	1	100.00
CONT_ASSIGN	26	1	1	100.00
CONT_ASSIGN	27	1	1	100.00
CONT_ASSIGN	28	1	1	100.00
CONT_ASSIGN	29	1	1	100.00
CONT_ASSIGN	30	1	1	100.00
CONT_ASSIGN	31	1	1	100.00
CONT_ASSIGN	32	1	1	100.00
CONT_ASSIGN	33	1	1	100.00
CONT_ASSIGN	34	1	1	100.00
CONT_ASSIGN	35	1	1	100.00
CONT_ASSIGN	36	1	1	100.00
CONT_ASSIGN	37	1	1	100.00
CONT_ASSIGN	38	1	1	100.00
CONT_ASSIGN	39	1	1	100.00
CONT_ASSIGN	40	1	1	100.00
CONT_ASSIGN	41	1	1	100.00
CONT_ASSIGN	42	1	1	100.00
CONT_ASSIGN	43	1	1	100.00
CONT_ASSIGN	44	1	1	100.00
CONT_ASSIGN	45	1	1	100.00
CONT_ASSIGN	46	1	1	100.00
CONT_ASSIGN	47	1	1	100.00
CONT_ASSIGN	48	1	1	100.00
CONT_ASSIGN	49	1	1	100.00
CONT_ASSIGN	50	1	1	100.00
CONT_ASSIGN	51	1	1	100.00
CONT_ASSIGN	52	1	1	100.00
CONT_ASSIGN	53	1	1	100.00
CONT_ASSIGN	54	1	1	100.00
CONT_ASSIGN	55	1	1	100.00
CONT_ASSIGN	56	1	1	100.00
CONT_ASSIGN	57	1	1	100.00
CONT_ASSIGN	58	1	1	100.00
CONT_ASSIGN	59	1	1	100.00
CONT_ASSIGN	60	1	1	100.00
CONT_ASSIGN	61	1	1	100.00
CONT_ASSIGN	62	1	1	100.00
CONT_ASSIGN	63	1	1	100.00
CONT_ASSIGN	64	1	1	100.00
CONT_ASSIGN	65	1	1	100.00
CONT_ASSIGN	66	1	1	100.00
CONT_ASSIGN	67	1	1	100.00
CONT_ASSIGN	68	1	1	100.00
CONT_ASSIGN	69	1	1	100.00
CONT_ASSIGN	70	1	1	100.00
CONT_ASSIGN	71	1	1	100.00
CONT_ASSIGN	72	1	1	100.00
CONT_ASSIGN	73	1	1	100.00
CONT_ASSIGN	74	1	1	100.00
CONT_ASSIGN	75	1	1	100.00
CONT_ASSIGN	76	1	1	100.00
CONT_ASSIGN	77	1	1	100.00
CONT_ASSIGN	78	1	1	100.00
CONT_ASSIGN	79	1	1	100.00
CONT_ASSIGN	80	1	1	100.00
CONT_ASSIGN	81	1	1	100.00
CONT_ASSIGN	82	1	1	100.00
CONT_ASSIGN	85	1	1	100.00
CONT_ASSIGN	86	1	1	100.00
CONT_ASSIGN	87	1	1	100.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_prim_secded_0.1/rtl/prim_secded_64_57_dec.sv' or '../src/lowrisc_prim_secded_0.1/rtl/prim_secded_64_57_dec.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
17	1	1
18	1	1
19	1	1
20	1	1
21	1	1
22	1	1
23	1	1
26	1	1
27	1	1
28	1	1
29	1	1
30	1	1
31	1	1
32	1	1
33	1	1
34	1	1
35	1	1
36	1	1
37	1	1
38	1	1
39	1	1
40	1	1
41	1	1
42	1	1
43	1	1
44	1	1
45	1	1
46	1	1
47	1	1
48	1	1
49	1	1
50	1	1
51	1	1
52	1	1
53	1	1
54	1	1
55	1	1
56	1	1
57	1	1
58	1	1
59	1	1
60	1	1
61	1	1
62	1	1
63	1	1
64	1	1
65	1	1
66	1	1
67	1	1
68	1	1
69	1	1
70	1	1
71	1	1
72	1	1
73	1	1
74	1	1
75	1	1
76	1	1
77	1	1
78	1	1
79	1	1
80	1	1
81	1	1
82	1	1
85	1	1
86	1	1
87	1	1