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Summary for Variable cp_mtime

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 50 0 50 100.00


Automatically Generated Bins for cp_mtime

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
auto[0000000000000000:051eb851eb851eb7] 13 1 T90 1 T91 1 T92 1
auto[051eb851eb851eb8:0a3d70a3d70a3d6f] 20 1 T3 1 T93 1 T45 1
auto[0a3d70a3d70a3d70:0f5c28f5c28f5c27] 20 1 T51 1 T94 1 T95 1
auto[0f5c28f5c28f5c28:147ae147ae147adf] 20 1 T96 1 T90 1 T97 1
auto[147ae147ae147ae0:1999999999999997] 16 1 T61 1 T98 1 T99 1
auto[1999999999999998:1eb851eb851eb84f] 14 1 T100 1 T101 1 T102 1
auto[1eb851eb851eb850:23d70a3d70a3d707] 29 1 T7 1 T12 1 T103 1
auto[23d70a3d70a3d708:28f5c28f5c28f5bf] 19 1 T104 1 T105 1 T106 1
auto[28f5c28f5c28f5c0:2e147ae147ae1477] 21 1 T8 1 T12 1 T46 1
auto[2e147ae147ae1478:333333333333332f] 24 1 T2 1 T6 1 T12 1
auto[3333333333333330:3851eb851eb851e7] 22 1 T2 1 T90 1 T95 1
auto[3851eb851eb851e8:3d70a3d70a3d709f] 24 1 T9 1 T90 1 T36 1
auto[3d70a3d70a3d70a0:428f5c28f5c28f57] 23 1 T6 1 T107 1 T22 1
auto[428f5c28f5c28f58:47ae147ae147ae0f] 23 1 T93 1 T45 1 T95 1
auto[47ae147ae147ae10:4cccccccccccccc7] 22 1 T8 1 T108 1 T109 1
auto[4cccccccccccccc8:51eb851eb851eb7f] 27 1 T58 2 T107 1 T103 1
auto[51eb851eb851eb80:570a3d70a3d70a37] 19 1 T93 1 T110 1 T111 1
auto[570a3d70a3d70a38:5c28f5c28f5c28ef] 29 1 T7 1 T46 1 T112 1
auto[5c28f5c28f5c28f0:6147ae147ae147a7] 21 1 T113 1 T114 1 T115 1
auto[6147ae147ae147a8:666666666666665f] 22 1 T7 1 T12 1 T116 1
auto[6666666666666660:6b851eb851eb8517] 25 1 T117 1 T36 1 T46 1
auto[6b851eb851eb8518:70a3d70a3d70a3cf] 21 1 T36 1 T100 1 T58 1
auto[70a3d70a3d70a3d0:75c28f5c28f5c287] 17 1 T52 1 T118 1 T119 1
auto[75c28f5c28f5c288:7ae147ae147ae13f] 15 1 T112 1 T120 1 T121 2
auto[7ae147ae147ae140:7ffffffffffffff7] 21 1 T45 1 T122 1 T123 1
auto[7ffffffffffffff8:851eb851eb851eaf] 29 1 T8 1 T61 1 T62 1
auto[851eb851eb851eb0:8a3d70a3d70a3d67] 23 1 T52 1 T124 1 T123 1
auto[8a3d70a3d70a3d68:8f5c28f5c28f5c1f] 18 1 T58 1 T125 1 T126 1
auto[8f5c28f5c28f5c20:947ae147ae147ad7] 27 1 T62 1 T127 2 T22 1
auto[947ae147ae147ad8:999999999999998f] 29 1 T124 1 T58 1 T125 1
auto[9999999999999990:9eb851eb851eb847] 35 1 T3 1 T62 1 T11 1
auto[9eb851eb851eb848:a3d70a3d70a3d6ff] 21 1 T36 1 T46 1 T127 1
auto[a3d70a3d70a3d700:a8f5c28f5c28f5b7] 19 1 T117 1 T128 1 T129 1
auto[a8f5c28f5c28f5b8:ae147ae147ae146f] 22 1 T107 1 T130 1 T131 1
auto[ae147ae147ae1470:b333333333333327] 23 1 T8 1 T132 1 T110 1
auto[b333333333333328:b851eb851eb851df] 29 1 T62 1 T133 1 T117 1
auto[b851eb851eb851e0:bd70a3d70a3d7097] 18 1 T62 1 T134 1 T103 1
auto[bd70a3d70a3d7098:c28f5c28f5c28f4f] 15 1 T108 1 T125 1 T135 1
auto[c28f5c28f5c28f50:c7ae147ae147ae07] 30 1 T62 1 T117 1 T109 1
auto[c7ae147ae147ae08:ccccccccccccccbf] 23 1 T61 1 T58 2 T24 1
auto[ccccccccccccccc0:d1eb851eb851eb77] 26 1 T6 1 T9 1 T109 1
auto[d1eb851eb851eb78:d70a3d70a3d70a2f] 22 1 T113 1 T51 1 T112 1
auto[d70a3d70a3d70a30:dc28f5c28f5c28e7] 25 1 T2 1 T46 1 T22 1
auto[dc28f5c28f5c28e8:e147ae147ae1479f] 21 1 T9 1 T100 1 T52 1
auto[e147ae147ae147a0:e666666666666657] 21 1 T116 1 T136 1 T137 1
auto[e666666666666658:eb851eb851eb850f] 21 1 T7 1 T113 1 T46 1
auto[eb851eb851eb8510:f0a3d70a3d70a3c7] 22 1 T100 1 T46 1 T124 1
auto[f0a3d70a3d70a3c8:f5c28f5c28f5c27f] 35 1 T2 1 T3 1 T10 1
auto[f5c28f5c28f5c280:fae147ae147ae137] 25 1 T9 1 T49 2 T107 1
auto[fae147ae147ae138:ffffffffffffffff] 30 1 T2 1 T133 1 T138 1



Summary for Variable cp_mtime_cmp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 50 0 50 100.00


Automatically Generated Bins for cp_mtime_cmp

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
auto[0000000000000000:051eb851eb851eb7] 13 1 T90 1 T91 1 T92 1
auto[051eb851eb851eb8:0a3d70a3d70a3d6f] 20 1 T3 1 T93 1 T45 1
auto[0a3d70a3d70a3d70:0f5c28f5c28f5c27] 20 1 T51 1 T94 1 T95 1
auto[0f5c28f5c28f5c28:147ae147ae147adf] 20 1 T96 1 T90 1 T97 1
auto[147ae147ae147ae0:1999999999999997] 16 1 T61 1 T98 1 T99 1
auto[1999999999999998:1eb851eb851eb84f] 14 1 T100 1 T101 1 T102 1
auto[1eb851eb851eb850:23d70a3d70a3d707] 29 1 T7 1 T12 1 T103 1
auto[23d70a3d70a3d708:28f5c28f5c28f5bf] 19 1 T104 1 T105 1 T106 1
auto[28f5c28f5c28f5c0:2e147ae147ae1477] 21 1 T8 1 T12 1 T46 1
auto[2e147ae147ae1478:333333333333332f] 24 1 T2 1 T6 1 T12 1
auto[3333333333333330:3851eb851eb851e7] 22 1 T2 1 T90 1 T95 1
auto[3851eb851eb851e8:3d70a3d70a3d709f] 24 1 T9 1 T90 1 T36 1
auto[3d70a3d70a3d70a0:428f5c28f5c28f57] 23 1 T6 1 T107 1 T22 1
auto[428f5c28f5c28f58:47ae147ae147ae0f] 23 1 T93 1 T45 1 T95 1
auto[47ae147ae147ae10:4cccccccccccccc7] 22 1 T8 1 T108 1 T109 1
auto[4cccccccccccccc8:51eb851eb851eb7f] 27 1 T58 2 T107 1 T103 1
auto[51eb851eb851eb80:570a3d70a3d70a37] 19 1 T93 1 T110 1 T111 1
auto[570a3d70a3d70a38:5c28f5c28f5c28ef] 29 1 T7 1 T46 1 T112 1
auto[5c28f5c28f5c28f0:6147ae147ae147a7] 21 1 T113 1 T114 1 T115 1
auto[6147ae147ae147a8:666666666666665f] 22 1 T7 1 T12 1 T116 1
auto[6666666666666660:6b851eb851eb8517] 25 1 T117 1 T36 1 T46 1
auto[6b851eb851eb8518:70a3d70a3d70a3cf] 21 1 T36 1 T100 1 T58 1
auto[70a3d70a3d70a3d0:75c28f5c28f5c287] 17 1 T52 1 T118 1 T119 1
auto[75c28f5c28f5c288:7ae147ae147ae13f] 15 1 T112 1 T120 1 T121 2
auto[7ae147ae147ae140:7ffffffffffffff7] 21 1 T45 1 T122 1 T123 1
auto[7ffffffffffffff8:851eb851eb851eaf] 29 1 T8 1 T61 1 T62 1
auto[851eb851eb851eb0:8a3d70a3d70a3d67] 23 1 T52 1 T124 1 T123 1
auto[8a3d70a3d70a3d68:8f5c28f5c28f5c1f] 18 1 T58 1 T125 1 T126 1
auto[8f5c28f5c28f5c20:947ae147ae147ad7] 27 1 T62 1 T127 2 T22 1
auto[947ae147ae147ad8:999999999999998f] 29 1 T124 1 T58 1 T125 1
auto[9999999999999990:9eb851eb851eb847] 35 1 T3 1 T62 1 T11 1
auto[9eb851eb851eb848:a3d70a3d70a3d6ff] 21 1 T36 1 T46 1 T127 1
auto[a3d70a3d70a3d700:a8f5c28f5c28f5b7] 19 1 T117 1 T128 1 T129 1
auto[a8f5c28f5c28f5b8:ae147ae147ae146f] 22 1 T107 1 T130 1 T131 1
auto[ae147ae147ae1470:b333333333333327] 23 1 T8 1 T132 1 T110 1
auto[b333333333333328:b851eb851eb851df] 29 1 T62 1 T133 1 T117 1
auto[b851eb851eb851e0:bd70a3d70a3d7097] 18 1 T62 1 T134 1 T103 1
auto[bd70a3d70a3d7098:c28f5c28f5c28f4f] 15 1 T108 1 T125 1 T135 1
auto[c28f5c28f5c28f50:c7ae147ae147ae07] 30 1 T62 1 T117 1 T109 1
auto[c7ae147ae147ae08:ccccccccccccccbf] 23 1 T61 1 T58 2 T24 1
auto[ccccccccccccccc0:d1eb851eb851eb77] 26 1 T6 1 T9 1 T109 1
auto[d1eb851eb851eb78:d70a3d70a3d70a2f] 22 1 T113 1 T51 1 T112 1
auto[d70a3d70a3d70a30:dc28f5c28f5c28e7] 25 1 T2 1 T46 1 T22 1
auto[dc28f5c28f5c28e8:e147ae147ae1479f] 21 1 T9 1 T100 1 T52 1
auto[e147ae147ae147a0:e666666666666657] 21 1 T116 1 T136 1 T137 1
auto[e666666666666658:eb851eb851eb850f] 21 1 T7 1 T113 1 T46 1
auto[eb851eb851eb8510:f0a3d70a3d70a3c7] 22 1 T100 1 T46 1 T124 1
auto[f0a3d70a3d70a3c8:f5c28f5c28f5c27f] 35 1 T2 1 T3 1 T10 1
auto[f5c28f5c28f5c280:fae147ae147ae137] 25 1 T9 1 T49 2 T107 1
auto[fae147ae147ae138:ffffffffffffffff] 30 1 T2 1 T133 1 T138 1



Summary for Variable cp_prescale

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 256 3 253 98.83


Automatically Generated Bins for cp_prescale

Uncovered bins
NAMECOUNTAT LEASTNUMBER
[auto[1616:1631]] 0 1 1
[auto[1744:1759]] 0 1 1
[auto[2128:2143]] 0 1 1


Covered bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:15] 4 1 T139 1 T140 1 T141 2
auto[16:31] 4 1 T123 1 T142 1 T143 1
auto[32:47] 3 1 T144 1 T145 1 T146 1
auto[48:63] 7 1 T115 1 T147 1 T148 1
auto[64:79] 6 1 T149 1 T150 1 T151 1
auto[80:95] 5 1 T121 1 T141 1 T152 1
auto[96:111] 4 1 T2 1 T101 1 T153 1
auto[112:127] 1 1 T129 1 - - - -
auto[128:143] 3 1 T59 1 T154 1 T155 1
auto[144:159] 2 1 T156 1 T157 1 - -
auto[160:175] 2 1 T158 1 T157 1 - -
auto[176:191] 3 1 T159 1 T160 1 T161 1
auto[192:207] 5 1 T49 1 T162 1 T58 1
auto[208:223] 5 1 T21 2 T163 1 T164 1
auto[224:239] 7 1 T52 1 T165 1 T166 1
auto[240:255] 6 1 T112 1 T167 1 T168 1
auto[256:271] 7 1 T95 1 T169 1 T142 1
auto[272:287] 4 1 T125 1 T159 1 T170 1
auto[288:303] 3 1 T12 1 T151 1 T171 1
auto[304:319] 5 1 T3 1 T58 1 T165 1
auto[320:335] 3 1 T166 1 T160 1 T172 1
auto[336:351] 8 1 T93 1 T106 1 T173 1
auto[352:367] 4 1 T61 1 T174 1 T175 1
auto[368:383] 4 1 T3 1 T176 1 T177 1
auto[384:399] 6 1 T49 1 T178 1 T179 1
auto[400:415] 4 1 T131 1 T180 1 T181 1
auto[416:431] 4 1 T130 1 T142 1 T182 1
auto[432:447] 6 1 T183 1 T184 1 T185 1
auto[448:463] 2 1 T6 1 T186 1 - -
auto[464:479] 4 1 T129 1 T187 1 T188 1
auto[480:495] 4 1 T46 1 T158 1 T189 1
auto[496:511] 5 1 T94 1 T119 1 T187 1
auto[512:527] 4 1 T190 1 T170 1 T191 1
auto[528:543] 2 1 T192 1 T193 1 - -
auto[544:559] 3 1 T98 1 T194 1 T195 1
auto[560:575] 6 1 T100 1 T196 1 T197 1
auto[576:591] 3 1 T188 1 T157 1 T198 1
auto[592:607] 3 1 T51 1 T173 1 T155 1
auto[608:623] 7 1 T113 1 T128 1 T115 1
auto[624:639] 6 1 T199 1 T192 1 T106 1
auto[640:655] 5 1 T127 1 T174 1 T200 1
auto[656:671] 7 1 T201 1 T168 1 T202 1
auto[672:687] 3 1 T203 1 T150 1 T204 1
auto[688:703] 1 1 T205 1 - - - -
auto[704:719] 2 1 T206 1 T207 1 - -
auto[720:735] 5 1 T45 1 T112 1 T159 1
auto[736:751] 6 1 T208 1 T209 1 T210 1
auto[752:767] 5 1 T12 1 T95 1 T211 1
auto[768:783] 6 1 T7 1 T51 1 T126 1
auto[784:799] 6 1 T100 1 T212 1 T213 1
auto[800:815] 2 1 T12 1 T214 1 - -
auto[816:831] 4 1 T45 1 T215 1 T216 1
auto[832:847] 7 1 T46 1 T25 1 T211 1
auto[848:863] 5 1 T129 1 T217 1 T218 1
auto[864:879] 5 1 T112 1 T218 1 T142 1
auto[880:895] 6 1 T136 1 T119 1 T219 1
auto[896:911] 3 1 T129 1 T141 1 T220 1
auto[912:927] 6 1 T52 1 T123 1 T22 1
auto[928:943] 5 1 T36 1 T113 1 T27 1
auto[944:959] 1 1 T221 1 - - - -
auto[960:975] 3 1 T6 1 T126 1 T222 1
auto[976:991] 4 1 T223 1 T224 2 T198 1
auto[992:1007] 2 1 T59 1 T225 1 - -
auto[1008:1023] 4 1 T181 1 T226 1 T227 1
auto[1024:1039] 4 1 T8 1 T228 1 T209 1
auto[1040:1055] 6 1 T10 1 T229 1 T126 1
auto[1056:1071] 4 1 T2 1 T101 1 T167 1
auto[1072:1087] 2 1 T117 1 T228 1 - -
auto[1088:1103] 8 1 T110 1 T131 1 T176 1
auto[1104:1119] 6 1 T108 1 T109 1 T230 1
auto[1120:1135] 5 1 T124 1 T105 1 T206 1
auto[1136:1151] 5 1 T107 1 T176 1 T231 1
auto[1152:1167] 5 1 T59 1 T141 1 T188 1
auto[1168:1183] 1 1 T161 1 - - - -
auto[1184:1199] 5 1 T232 1 T170 1 T233 1
auto[1200:1215] 4 1 T125 1 T234 1 T235 1
auto[1216:1231] 3 1 T192 1 T92 1 T216 1
auto[1232:1247] 2 1 T8 1 T200 1 - -
auto[1248:1263] 8 1 T36 1 T236 1 T144 1
auto[1264:1279] 5 1 T178 1 T237 1 T187 1
auto[1280:1295] 6 1 T114 1 T238 1 T217 1
auto[1296:1311] 3 1 T179 1 T216 1 T227 1
auto[1312:1327] 2 1 T239 1 T177 1 - -
auto[1328:1343] 4 1 T240 1 T241 1 T242 1
auto[1344:1359] 1 1 T243 1 - - - -
auto[1360:1375] 3 1 T244 1 T245 1 T246 1
auto[1376:1391] 9 1 T9 1 T192 1 T179 1
auto[1392:1407] 5 1 T247 1 T106 1 T248 1
auto[1408:1423] 7 1 T102 1 T249 1 T145 1
auto[1424:1439] 6 1 T200 2 T250 1 T187 1
auto[1440:1455] 3 1 T22 1 T234 1 T219 1
auto[1456:1471] 6 1 T11 1 T251 1 T228 1
auto[1472:1487] 7 1 T239 1 T144 1 T145 1
auto[1488:1503] 3 1 T147 1 T252 1 T214 1
auto[1504:1519] 3 1 T159 1 T141 1 T152 1
auto[1520:1535] 7 1 T62 1 T167 1 T129 1
auto[1536:1551] 5 1 T124 1 T166 1 T253 1
auto[1552:1567] 3 1 T117 1 T124 1 T141 1
auto[1568:1583] 3 1 T3 1 T254 1 T209 1
auto[1584:1599] 1 1 T213 1 - - - -
auto[1600:1615] 5 1 T255 1 T170 1 T256 1
auto[1632:1647] 2 1 T90 1 T22 1 - -
auto[1648:1663] 8 1 T257 1 T258 1 T259 1
auto[1664:1679] 6 1 T25 1 T194 1 T60 1
auto[1680:1695] 6 1 T133 1 T95 1 T194 1
auto[1696:1711] 2 1 T24 1 T250 1 - -
auto[1712:1727] 6 1 T260 1 T237 1 T261 1
auto[1728:1743] 1 1 T115 1 - - - -
auto[1760:1775] 7 1 T61 1 T262 1 T263 1
auto[1776:1791] 4 1 T46 1 T167 1 T202 1
auto[1792:1807] 6 1 T58 1 T101 1 T128 1
auto[1808:1823] 4 1 T264 1 T244 1 T170 1
auto[1824:1839] 2 1 T182 1 T265 1 - -
auto[1840:1855] 6 1 T138 1 T248 1 T266 1
auto[1856:1871] 3 1 T58 1 T115 1 T180 1
auto[1872:1887] 3 1 T182 2 T267 1 - -
auto[1888:1903] 2 1 T143 1 T268 1 - -
auto[1904:1919] 1 1 T61 1 - - - -
auto[1920:1935] 9 1 T127 1 T130 1 T126 1
auto[1936:1951] 6 1 T120 1 T269 1 T159 1
auto[1952:1967] 5 1 T58 1 T230 1 T270 1
auto[1968:1983] 4 1 T139 1 T271 1 T59 1
auto[1984:1999] 2 1 T136 1 T184 1 - -
auto[2000:2015] 2 1 T272 1 T273 1 - -
auto[2016:2031] 7 1 T62 1 T46 1 T29 1
auto[2032:2047] 2 1 T22 1 T152 1 - -
auto[2048:2063] 4 1 T274 1 T275 1 T220 2
auto[2064:2079] 5 1 T36 1 T59 1 T170 1
auto[2080:2095] 3 1 T136 1 T276 1 T277 1
auto[2096:2111] 8 1 T49 1 T201 1 T278 1
auto[2112:2127] 5 1 T104 1 T279 1 T280 1
auto[2144:2159] 7 1 T62 1 T92 1 T281 1
auto[2160:2175] 5 1 T97 1 T228 1 T270 1
auto[2176:2191] 4 1 T223 1 T239 1 T282 1
auto[2192:2207] 8 1 T62 1 T125 1 T283 1
auto[2208:2223] 7 1 T127 1 T101 1 T258 1
auto[2224:2239] 4 1 T58 1 T230 1 T60 1
auto[2240:2255] 2 1 T284 1 T285 1 - -
auto[2256:2271] 6 1 T107 1 T123 1 T286 1
auto[2272:2287] 5 1 T24 1 T174 1 T179 1
auto[2288:2303] 5 1 T173 1 T266 1 T206 1
auto[2304:2319] 4 1 T113 1 T121 1 T287 1
auto[2320:2335] 4 1 T288 1 T24 1 T203 1
auto[2336:2351] 6 1 T128 1 T139 1 T190 1
auto[2352:2367] 6 1 T123 1 T289 1 T278 1
auto[2368:2383] 6 1 T117 1 T170 1 T156 1
auto[2384:2399] 3 1 T51 1 T144 1 T290 1
auto[2400:2415] 2 1 T7 1 T124 1 - -
auto[2416:2431] 1 1 T291 1 - - - -
auto[2432:2447] 6 1 T149 1 T245 1 T292 1
auto[2448:2463] 4 1 T112 1 T59 1 T293 1
auto[2464:2479] 6 1 T103 1 T27 1 T188 1
auto[2480:2495] 4 1 T115 1 T294 1 T208 1
auto[2496:2511] 3 1 T92 1 T261 1 T295 1
auto[2512:2527] 4 1 T179 1 T159 1 T293 1
auto[2528:2543] 5 1 T7 1 T296 1 T297 1
auto[2544:2559] 5 1 T9 1 T255 1 T298 1
auto[2560:2575] 6 1 T7 1 T95 1 T107 1
auto[2576:2591] 3 1 T289 1 T299 1 T144 1
auto[2592:2607] 6 1 T107 1 T25 1 T106 1
auto[2608:2623] 2 1 T177 1 T164 1 - -
auto[2624:2639] 4 1 T93 1 T300 1 T189 1
auto[2640:2655] 2 1 T108 1 T46 1 - -
auto[2656:2671] 1 1 T103 1 - - - -
auto[2672:2687] 7 1 T51 1 T122 1 T200 1
auto[2688:2703] 6 1 T92 1 T238 1 T182 1
auto[2704:2719] 6 1 T134 1 T257 1 T301 1
auto[2720:2735] 4 1 T92 1 T129 1 T252 1
auto[2736:2751] 1 1 T302 1 - - - -
auto[2752:2767] 5 1 T257 1 T186 1 T237 1
auto[2768:2783] 1 1 T6 1 - - - -
auto[2784:2799] 2 1 T25 1 T303 1 - -
auto[2800:2815] 4 1 T125 1 T249 1 T187 1
auto[2816:2831] 7 1 T215 1 T121 1 T304 1
auto[2832:2847] 5 1 T124 1 T305 1 T168 1
auto[2848:2863] 3 1 T102 1 T191 1 T265 1
auto[2864:2879] 1 1 T196 1 - - - -
auto[2880:2895] 1 1 T144 1 - - - -
auto[2896:2911] 6 1 T274 1 T167 1 T306 1
auto[2912:2927] 12 1 T62 1 T303 1 T286 1
auto[2928:2943] 4 1 T24 1 T306 1 T194 1
auto[2944:2959] 5 1 T46 1 T125 1 T307 1
auto[2960:2975] 5 1 T9 1 T110 1 T175 1
auto[2976:2991] 4 1 T299 1 T141 1 T224 1
auto[2992:3007] 3 1 T113 1 T128 1 T272 1
auto[3008:3023] 8 1 T93 1 T108 1 T100 1
auto[3024:3039] 3 1 T117 1 T52 1 T308 1
auto[3040:3055] 6 1 T90 1 T99 1 T309 1
auto[3056:3071] 7 1 T123 1 T103 1 T296 1
auto[3072:3087] 5 1 T98 1 T131 1 T141 1
auto[3088:3103] 7 1 T110 1 T25 1 T176 1
auto[3104:3119] 5 1 T310 1 T271 1 T166 1
auto[3120:3135] 4 1 T48 1 T110 1 T311 1
auto[3136:3151] 7 1 T99 1 T165 1 T312 1
auto[3152:3167] 4 1 T95 1 T58 1 T258 1
auto[3168:3183] 5 1 T170 1 T222 1 T171 1
auto[3184:3199] 3 1 T182 1 T313 1 T307 1
auto[3200:3215] 6 1 T101 1 T314 1 T315 1
auto[3216:3231] 5 1 T124 1 T179 1 T139 1
auto[3232:3247] 4 1 T211 1 T223 1 T259 1
auto[3248:3263] 4 1 T181 1 T182 1 T290 1
auto[3264:3279] 7 1 T8 1 T258 1 T211 1
auto[3280:3295] 3 1 T90 1 T316 1 T221 1
auto[3296:3311] 3 1 T52 1 T97 1 T144 1
auto[3312:3327] 5 1 T296 1 T317 1 T59 1
auto[3328:3343] 4 1 T117 1 T304 1 T224 1
auto[3344:3359] 8 1 T106 1 T59 1 T149 1
auto[3360:3375] 4 1 T255 1 T300 1 T182 1
auto[3376:3391] 2 1 T318 1 T313 1 - -
auto[3392:3407] 5 1 T311 1 T165 1 T319 1
auto[3408:3423] 3 1 T320 1 T140 1 T227 1
auto[3424:3439] 4 1 T109 1 T321 1 T208 1
auto[3440:3455] 8 1 T2 1 T9 1 T58 1
auto[3456:3471] 4 1 T136 1 T249 1 T59 1
auto[3472:3487] 3 1 T257 1 T214 1 T322 1
auto[3488:3503] 4 1 T128 1 T323 1 T151 1
auto[3504:3519] 6 1 T165 1 T264 1 T223 1
auto[3520:3535] 7 1 T109 1 T128 1 T170 1
auto[3536:3551] 3 1 T46 1 T324 1 T308 1
auto[3552:3567] 6 1 T130 1 T176 1 T302 1
auto[3568:3583] 5 1 T116 1 T132 1 T121 1
auto[3584:3599] 2 1 T325 1 T314 1 - -
auto[3600:3615] 8 1 T132 1 T234 1 T129 1
auto[3616:3631] 2 1 T270 1 T214 1 - -
auto[3632:3647] 8 1 T45 1 T91 1 T141 1
auto[3648:3663] 5 1 T113 1 T194 1 T326 1
auto[3664:3679] 5 1 T327 1 T293 1 T328 1
auto[3680:3695] 7 1 T101 1 T312 1 T329 1
auto[3696:3711] 4 1 T257 1 T308 1 T161 1
auto[3712:3727] 4 1 T107 1 T226 1 T330 1
auto[3728:3743] 5 1 T136 1 T331 1 T312 1
auto[3744:3759] 6 1 T8 1 T58 1 T22 1
auto[3760:3775] 7 1 T127 1 T148 1 T332 1
auto[3776:3791] 3 1 T2 1 T116 1 T51 1
auto[3792:3807] 4 1 T121 1 T249 1 T149 1
auto[3808:3823] 6 1 T26 1 T126 1 T333 1
auto[3824:3839] 7 1 T118 1 T120 1 T251 1
auto[3840:3855] 5 1 T90 1 T100 1 T251 1
auto[3856:3871] 6 1 T103 1 T334 1 T111 1
auto[3872:3887] 2 1 T137 1 T141 1 - -
auto[3888:3903] 3 1 T310 1 T248 1 T335 1
auto[3904:3919] 3 1 T62 1 T327 1 T304 1
auto[3920:3935] 8 1 T12 1 T125 1 T174 1
auto[3936:3951] 5 1 T130 1 T336 1 T337 1
auto[3952:3967] 3 1 T147 1 T286 1 T228 1
auto[3968:3983] 3 1 T113 1 T147 1 T59 1
auto[3984:3999] 6 1 T2 1 T22 1 T184 1
auto[4000:4015] 3 1 T36 1 T91 1 T152 1
auto[4016:4031] 2 1 T59 1 T233 1 - -
auto[4032:4047] 3 1 T186 1 T182 1 T197 1
auto[4048:4063] 7 1 T133 1 T121 1 T306 1
auto[4064:4079] 1 1 T164 1 - - - -
auto[4080:4095] 5 1 T96 1 T301 1 T171 1



Summary for Variable cp_step

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 255 2 253 99.22


User Defined Bins for cp_step

Uncovered bins
NAMECOUNTAT LEASTNUMBER
step_all_val[122] 0 1 1
step_all_val[200] 0 1 1


Covered bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
step_all_val[1] 3 1 T170 1 T198 1 T285 1
step_all_val[2] 8 1 T51 1 T107 1 T251 1
step_all_val[3] 7 1 T113 1 T98 1 T306 1
step_all_val[4] 6 1 T121 1 T306 1 T259 1
step_all_val[5] 5 1 T123 1 T59 1 T290 1
step_all_val[6] 2 1 T336 1 T189 1 - -
step_all_val[7] 5 1 T58 1 T153 1 T179 1
step_all_val[8] 10 1 T95 1 T24 1 T270 1
step_all_val[9] 3 1 T192 1 T140 1 T295 1
step_all_val[10] 6 1 T103 1 T168 1 T219 1
step_all_val[11] 6 1 T51 1 T167 1 T244 1
step_all_val[12] 3 1 T215 1 T147 1 T338 1
step_all_val[13] 5 1 T115 1 T296 1 T59 1
step_all_val[14] 5 1 T6 1 T120 1 T266 1
step_all_val[15] 4 1 T180 1 T144 1 T307 1
step_all_val[16] 5 1 T7 1 T113 1 T46 1
step_all_val[17] 3 1 T8 1 T158 1 T182 1
step_all_val[18] 4 1 T61 1 T24 1 T170 1
step_all_val[19] 9 1 T124 1 T147 1 T176 1
step_all_val[20] 7 1 T179 1 T180 1 T337 1
step_all_val[21] 4 1 T124 1 T286 1 T323 1
step_all_val[22] 3 1 T9 1 T123 1 T262 1
step_all_val[23] 4 1 T111 1 T139 1 T156 1
step_all_val[24] 3 1 T274 1 T219 1 T290 1
step_all_val[25] 2 1 T166 1 T182 1 - -
step_all_val[26] 7 1 T124 1 T298 1 T166 1
step_all_val[27] 1 1 T170 1 - - - -
step_all_val[28] 6 1 T107 1 T60 1 T181 1
step_all_val[29] 7 1 T8 1 T255 1 T238 1
step_all_val[30] 7 1 T102 1 T167 1 T258 1
step_all_val[31] 4 1 T250 1 T304 1 T218 1
step_all_val[32] 4 1 T206 1 T309 1 T275 1
step_all_val[33] 5 1 T109 1 T124 1 T130 1
step_all_val[34] 6 1 T199 1 T211 1 T168 1
step_all_val[35] 3 1 T175 1 T171 1 T339 1
step_all_val[36] 2 1 T100 1 T24 1 - -
step_all_val[37] 3 1 T188 1 T233 1 T196 1
step_all_val[38] 7 1 T6 1 T117 1 T201 1
step_all_val[39] 4 1 T136 1 T119 1 T177 1
step_all_val[40] 6 1 T36 1 T174 2 T249 1
step_all_val[41] 2 1 T128 1 T238 1 - -
step_all_val[42] 2 1 T260 1 T213 1 - -
step_all_val[43] 5 1 T58 1 T202 1 T170 1
step_all_val[44] 4 1 T113 1 T340 1 T161 1
step_all_val[45] 3 1 T293 1 T144 1 T209 1
step_all_val[46] 2 1 T282 1 T146 1 - -
step_all_val[47] 5 1 T10 1 T149 1 T143 1
step_all_val[48] 4 1 T36 1 T162 1 T58 1
step_all_val[49] 3 1 T200 1 T159 1 T188 1
step_all_val[50] 6 1 T90 1 T178 1 T21 1
step_all_val[51] 5 1 T46 1 T170 1 T182 1
step_all_val[52] 4 1 T22 1 T170 1 T239 1
step_all_val[53] 5 1 T107 1 T247 1 T142 1
step_all_val[54] 6 1 T264 1 T341 1 T332 1
step_all_val[55] 4 1 T112 1 T213 1 T184 1
step_all_val[56] 4 1 T166 1 T232 1 T60 1
step_all_val[57] 3 1 T151 1 T342 1 T193 1
step_all_val[58] 2 1 T306 1 T158 1 - -
step_all_val[59] 4 1 T258 1 T170 1 T184 1
step_all_val[60] 4 1 T125 1 T257 1 T166 1
step_all_val[61] 2 1 T98 1 T101 1 - -
step_all_val[62] 6 1 T113 1 T110 1 T128 1
step_all_val[63] 3 1 T216 1 T171 1 T268 1
step_all_val[64] 9 1 T130 1 T194 1 T184 1
step_all_val[65] 5 1 T27 1 T149 1 T188 1
step_all_val[66] 4 1 T90 1 T121 1 T157 1
step_all_val[67] 4 1 T237 1 T141 1 T343 1
step_all_val[68] 7 1 T46 1 T106 1 T260 1
step_all_val[69] 7 1 T3 1 T62 1 T125 1
step_all_val[70] 3 1 T2 1 T120 1 T210 1
step_all_val[71] 7 1 T167 1 T92 1 T244 1
step_all_val[72] 6 1 T100 1 T229 1 T233 1
step_all_val[73] 7 1 T310 1 T258 1 T234 1
step_all_val[74] 2 1 T305 1 T146 1 - -
step_all_val[75] 3 1 T203 1 T224 1 T267 1
step_all_val[76] 4 1 T149 1 T231 1 T235 1
step_all_val[77] 1 1 T216 1 - - - -
step_all_val[78] 5 1 T165 1 T180 1 T293 1
step_all_val[79] 2 1 T344 1 T345 1 - -
step_all_val[80] 5 1 T97 1 T245 1 T203 1
step_all_val[81] 3 1 T106 1 T307 1 T243 1
step_all_val[82] 10 1 T136 1 T230 1 T106 1
step_all_val[83] 7 1 T9 1 T51 1 T165 1
step_all_val[84] 2 1 T25 1 T129 1 - -
step_all_val[85] 7 1 T128 1 T106 1 T248 1
step_all_val[86] 4 1 T6 1 T151 1 T346 1
step_all_val[87] 4 1 T95 1 T204 1 T326 1
step_all_val[88] 4 1 T62 1 T190 1 T347 1
step_all_val[89] 6 1 T132 1 T102 1 T244 1
step_all_val[90] 6 1 T93 1 T133 1 T127 1
step_all_val[91] 6 1 T114 1 T121 1 T213 1
step_all_val[92] 6 1 T48 1 T128 1 T230 1
step_all_val[93] 2 1 T143 1 T339 1 - -
step_all_val[94] 3 1 T2 1 T115 1 T221 1
step_all_val[95] 6 1 T310 1 T258 1 T59 1
step_all_val[96] 6 1 T129 1 T168 1 T144 1
step_all_val[97] 4 1 T62 1 T109 1 T99 1
step_all_val[98] 2 1 T195 1 T326 1 - -
step_all_val[99] 10 1 T62 1 T325 1 T26 1
step_all_val[100] 5 1 T7 1 T36 1 T176 1
step_all_val[101] 1 1 T144 1 - - - -
step_all_val[102] 4 1 T182 1 T307 1 T155 1
step_all_val[103] 8 1 T240 1 T136 1 T135 1
step_all_val[104] 7 1 T9 1 T11 1 T46 1
step_all_val[105] 3 1 T200 1 T228 1 T172 1
step_all_val[106] 4 1 T59 1 T194 1 T205 1
step_all_val[107] 6 1 T27 1 T232 1 T216 1
step_all_val[108] 4 1 T61 1 T173 1 T170 1
step_all_val[109] 5 1 T128 1 T59 1 T261 1
step_all_val[110] 5 1 T92 1 T251 1 T228 1
step_all_val[111] 2 1 T141 1 T157 1 - -
step_all_val[112] 3 1 T255 1 T129 1 T237 1
step_all_val[113] 4 1 T125 1 T25 1 T215 1
step_all_val[114] 3 1 T108 1 T129 1 T188 1
step_all_val[115] 2 1 T309 1 T330 1 - -
step_all_val[116] 6 1 T95 1 T129 1 T217 1
step_all_val[117] 5 1 T22 1 T126 1 T203 1
step_all_val[118] 1 1 T310 1 - - - -
step_all_val[119] 6 1 T109 1 T101 1 T251 1
step_all_val[120] 4 1 T211 1 T304 1 T214 1
step_all_val[121] 6 1 T251 1 T129 1 T152 1
step_all_val[123] 5 1 T62 1 T286 1 T59 1
step_all_val[124] 3 1 T101 1 T301 1 T152 1
step_all_val[125] 4 1 T112 1 T194 1 T144 1
step_all_val[126] 6 1 T108 1 T22 1 T348 1
step_all_val[127] 5 1 T136 1 T176 1 T188 1
step_all_val[128] 3 1 T92 1 T271 1 T205 1
step_all_val[129] 9 1 T117 1 T130 1 T258 1
step_all_val[130] 3 1 T317 1 T299 1 T349 1
step_all_val[131] 4 1 T208 1 T313 1 T196 1
step_all_val[132] 5 1 T12 1 T174 1 T282 1
step_all_val[133] 3 1 T3 1 T175 1 T177 1
step_all_val[134] 5 1 T223 1 T228 1 T175 1
step_all_val[135] 1 1 T278 1 - - - -
step_all_val[136] 3 1 T302 1 T177 1 T155 1
step_all_val[137] 6 1 T121 1 T92 1 T59 1
step_all_val[138] 8 1 T91 1 T58 1 T110 1
step_all_val[139] 11 1 T52 1 T121 1 T129 1
step_all_val[140] 4 1 T174 1 T224 1 T221 1
step_all_val[141] 6 1 T90 1 T97 1 T300 1
step_all_val[142] 4 1 T8 1 T95 1 T257 1
step_all_val[143] 8 1 T52 1 T165 1 T139 1
step_all_val[144] 8 1 T123 1 T311 1 T131 1
step_all_val[145] 3 1 T92 1 T219 1 T297 1
step_all_val[146] 5 1 T130 1 T303 1 T167 1
step_all_val[147] 3 1 T293 1 T189 1 T273 1
step_all_val[148] 4 1 T107 1 T308 1 T231 1
step_all_val[149] 7 1 T112 1 T136 1 T257 1
step_all_val[150] 2 1 T303 1 T350 1 - -
step_all_val[151] 2 1 T249 1 T234 1 - -
step_all_val[152] 5 1 T124 1 T102 1 T264 1
step_all_val[153] 6 1 T200 1 T257 1 T129 1
step_all_val[154] 6 1 T8 1 T51 1 T141 1
step_all_val[155] 2 1 T351 1 T242 1 - -
step_all_val[156] 6 1 T45 1 T127 1 T170 1
step_all_val[157] 1 1 T59 1 - - - -
step_all_val[158] 10 1 T176 1 T249 1 T190 1
step_all_val[159] 6 1 T169 1 T126 1 T139 1
step_all_val[160] 4 1 T131 1 T271 1 T322 1
step_all_val[161] 5 1 T117 1 T141 1 T182 1
step_all_val[162] 5 1 T46 1 T167 1 T312 1
step_all_val[163] 5 1 T113 1 T302 1 T319 1
step_all_val[164] 3 1 T122 1 T309 1 T157 1
step_all_val[165] 4 1 T125 1 T173 1 T145 1
step_all_val[166] 4 1 T138 1 T271 1 T224 1
step_all_val[167] 5 1 T257 1 T186 1 T187 1
step_all_val[168] 6 1 T311 1 T206 1 T276 1
step_all_val[169] 5 1 T9 1 T249 1 T228 1
step_all_val[170] 4 1 T94 1 T187 1 T214 1
step_all_val[171] 4 1 T125 1 T184 1 T182 2
step_all_val[172] 3 1 T45 1 T188 1 T241 1
step_all_val[173] 1 1 T22 1 - - - -
step_all_val[174] 4 1 T95 1 T141 1 T221 1
step_all_val[175] 2 1 T12 1 T253 1 - -
step_all_val[176] 4 1 T288 1 T110 1 T144 1
step_all_val[177] 1 1 T141 1 - - - -
step_all_val[178] 4 1 T51 1 T296 1 T160 1
step_all_val[179] 5 1 T239 1 T292 1 T60 1
step_all_val[180] 3 1 T238 1 T223 1 T208 1
step_all_val[181] 4 1 T22 1 T202 1 T145 1
step_all_val[182] 1 1 T268 1 - - - -
step_all_val[183] 3 1 T117 1 T25 1 T139 1
step_all_val[184] 8 1 T133 1 T200 1 T126 1
step_all_val[185] 1 1 T141 1 - - - -
step_all_val[186] 3 1 T52 1 T144 1 T265 1
step_all_val[187] 2 1 T90 1 T334 1 - -
step_all_val[188] 4 1 T100 1 T132 1 T149 1
step_all_val[189] 7 1 T7 1 T103 1 T257 1
step_all_val[190] 3 1 T147 1 T259 1 T285 1
step_all_val[191] 3 1 T245 1 T172 1 T339 1
step_all_val[192] 4 1 T115 1 T179 1 T159 1
step_all_val[193] 3 1 T117 1 T140 1 T242 1
step_all_val[194] 5 1 T113 1 T124 1 T183 1
step_all_val[195] 1 1 T227 1 - - - -
step_all_val[196] 2 1 T49 1 T277 1 - -
step_all_val[197] 4 1 T93 1 T25 1 T115 1
step_all_val[198] 4 1 T147 1 T217 1 T145 1
step_all_val[199] 4 1 T223 1 T188 1 T280 1
step_all_val[201] 1 1 T134 1 - - - -
step_all_val[202] 3 1 T62 1 T256 1 T198 1
step_all_val[203] 6 1 T2 1 T107 1 T128 1
step_all_val[204] 3 1 T46 1 T272 1 T338 1
step_all_val[205] 7 1 T170 1 T142 1 T352 1
step_all_val[206] 4 1 T12 1 T46 1 T191 1
step_all_val[207] 4 1 T283 1 T223 1 T228 1
step_all_val[208] 4 1 T36 1 T123 1 T219 1
step_all_val[209] 4 1 T24 1 T230 1 T159 1
step_all_val[210] 2 1 T116 1 T126 1 - -
step_all_val[211] 4 1 T129 1 T327 1 T220 1
step_all_val[212] 5 1 T110 1 T59 1 T185 1
step_all_val[213] 8 1 T116 1 T104 1 T100 1
step_all_val[214] 1 1 T182 1 - - - -
step_all_val[215] 2 1 T234 1 T187 1 - -
step_all_val[216] 5 1 T21 1 T320 1 T313 1
step_all_val[217] 8 1 T49 1 T125 1 T103 1
step_all_val[218] 7 1 T12 1 T165 1 T331 1
step_all_val[219] 2 1 T248 1 T142 1 - -
step_all_val[220] 2 1 T258 1 T318 1 - -
step_all_val[221] 4 1 T214 1 T353 1 T354 1
step_all_val[222] 5 1 T49 1 T58 1 T317 1
step_all_val[223] 1 1 T142 1 - - - -
step_all_val[224] 5 1 T223 1 T185 1 T177 1
step_all_val[225] 6 1 T92 1 T59 1 T208 1
step_all_val[226] 6 1 T99 1 T101 1 T139 1
step_all_val[227] 4 1 T3 1 T158 1 T150 1
step_all_val[228] 7 1 T2 1 T251 1 T168 1
step_all_val[229] 6 1 T127 1 T173 1 T213 1
step_all_val[230] 6 1 T25 1 T296 1 T179 1
step_all_val[231] 8 1 T103 1 T126 1 T302 1
step_all_val[232] 5 1 T118 1 T355 1 T182 1
step_all_val[233] 9 1 T101 1 T274 1 T142 1
step_all_val[234] 5 1 T2 1 T255 1 T312 1
step_all_val[235] 4 1 T156 1 T307 1 T197 1
step_all_val[236] 2 1 T131 1 T273 1 - -
step_all_val[237] 5 1 T289 1 T206 1 T141 1
step_all_val[238] 9 1 T289 1 T129 1 T356 1
step_all_val[239] 1 1 T96 1 - - - -
step_all_val[240] 5 1 T112 1 T129 1 T266 1
step_all_val[241] 4 1 T91 1 T200 1 T144 1
step_all_val[242] 5 1 T108 1 T137 1 T206 1
step_all_val[243] 9 1 T136 1 T192 1 T180 1
step_all_val[244] 7 1 T7 1 T178 1 T312 1
step_all_val[245] 4 1 T149 1 T144 1 T347 1
step_all_val[246] 6 1 T58 2 T101 1 T333 1
step_all_val[247] 1 1 T165 1 - - - -
step_all_val[248] 3 1 T61 1 T93 1 T119 1
step_all_val[249] 4 1 T45 1 T58 1 T218 1
step_all_val[250] 7 1 T127 1 T59 1 T300 1
step_all_val[251] 4 1 T52 1 T148 1 T319 1
step_all_val[252] 3 1 T211 1 T327 1 T181 1
step_all_val[253] 2 1 T59 1 T141 1 - -
step_all_val[254] 4 1 T115 1 T186 1 T159 1
step_all_val[255] 4 1 T58 1 T25 1 T233 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%