RV_TIMER Lint Results

Sunday June 23 2024 23:02:35 UTC

GitHub Revision: 25e609d6bb

Branch: os_regression

Tool: ASCENTLINT

Build Mode Flow Infos Flow Warnings Flow Errors Lint Infos Lint Warnings Lint Errors
default 0 0 0 167 0 0

Messages for Build Mode 'default'

Lint Infos

I   FSM_DEFAULT_REQ:   prim_diff_decode.sv:158   Next state register 'gen_async.state_d' has no assignment in the default branch of the case statement for this finite state machine                 New                            

I   NESTED_SUBPROG:   tlul_pkg.sv:143   Function 'prim_mubi_pkg::mubi4_test_invalid' is called from within a function                 New                            

I   CASE_INC:   prim_alert_sender.sv:199   Case statement tag not specified for value 'b111                 New                            

I   CASE_INC:   prim_diff_decode.sv:115    Case statement tag not specified for value 'b11                  New                            

I   CASE_INC:   tlul_err.sv:62             Case statement tag not specified for value 'h3                   New                            

I   ONE_BIT_VEC:   rv_timer.sv:11                  Declaration range '[NumAlerts - 1:0]' ([0:0]) of 'AlertAsyncOn' has a length of one, instance 'rv_timer' of module 'rv_timer' (NumAlerts=1)                                                                                                                      New                            

I   ONE_BIT_VEC:   rv_timer.sv:19                  Declaration range '[NumAlerts - 1:0]' ([0:0]) of 'alert_rx_i' has a length of one, instance 'rv_timer' of module 'rv_timer' (NumAlerts=1)                                                                                                                        New                            

I   ONE_BIT_VEC:   rv_timer.sv:20                  Declaration range '[NumAlerts - 1:0]' ([0:0]) of 'alert_tx_o' has a length of one, instance 'rv_timer' of module 'rv_timer' (NumAlerts=1)                                                                                                                        New                            

I   ONE_BIT_VEC:   rv_timer.sv:28                  Declaration range '[N_HARTS - 1:0]' ([0:0]) of 'active' has a length of one, instance 'rv_timer' of module 'rv_timer' (N_HARTS=1)                                                                                                                                New                            

I   ONE_BIT_VEC:   rv_timer.sv:30                  Declaration range '[N_HARTS]' ([1]) of 'prescaler' has a length of one, instance 'rv_timer' of module 'rv_timer' (N_HARTS=1)                                                                                                                                     New                            

I   ONE_BIT_VEC:   rv_timer.sv:31                  Declaration range '[N_HARTS]' ([1]) of 'step' has a length of one, instance 'rv_timer' of module 'rv_timer' (N_HARTS=1)                                                                                                                                          New                            

I   ONE_BIT_VEC:   rv_timer.sv:33                  Declaration range '[N_HARTS - 1:0]' ([0:0]) of 'tick' has a length of one, instance 'rv_timer' of module 'rv_timer' (N_HARTS=1)                                                                                                                                  New                            

I   ONE_BIT_VEC:   rv_timer.sv:35                  Declaration range '[N_HARTS]' ([1]) of 'mtime_d' has a length of one, instance 'rv_timer' of module 'rv_timer' (N_HARTS=1)                                                                                                                                       New                            

I   ONE_BIT_VEC:   rv_timer.sv:36                  Declaration range '[N_HARTS]' ([1]) of 'mtime' has a length of one, instance 'rv_timer' of module 'rv_timer' (N_HARTS=1)                                                                                                                                         New                            

I   ONE_BIT_VEC:   rv_timer.sv:37                  Declaration range '[N_HARTS]' ([1]) of 'mtimecmp' has a length of one, instance 'rv_timer' of module 'rv_timer' (N_HARTS=1,N_TIMERS=1)                                                                                                                           New                            

I   ONE_BIT_VEC:   rv_timer.sv:37                  Declaration range '[N_TIMERS]' ([1]) of 'mtimecmp' has a length of one, instance 'rv_timer' of module 'rv_timer' (N_TIMERS=1)                                                                                                                                    New                            

I   ONE_BIT_VEC:   rv_timer.sv:38                  Declaration range '[N_HARTS]' ([1]) of 'mtimecmp_update' has a length of one, instance 'rv_timer' of module 'rv_timer' (N_HARTS=1,N_TIMERS=1)                                                                                                                    New                            

I   ONE_BIT_VEC:   rv_timer.sv:38                  Declaration range '[N_TIMERS]' ([1]) of 'mtimecmp_update' has a length of one, instance 'rv_timer' of module 'rv_timer' (N_TIMERS=1)                                                                                                                             New                            

I   ONE_BIT_VEC:   rv_timer.sv:40                  Declaration range '[N_HARTS * N_TIMERS - 1:0]' ([0:0]) of 'intr_timer_set' has a length of one, instance 'rv_timer' of module 'rv_timer' (N_HARTS=1,N_TIMERS=1)                                                                                                  New                            

I   ONE_BIT_VEC:   rv_timer.sv:41                  Declaration range '[N_HARTS * N_TIMERS - 1:0]' ([0:0]) of 'intr_timer_en' has a length of one, instance 'rv_timer' of module 'rv_timer' (N_HARTS=1,N_TIMERS=1)                                                                                                   New                            

I   ONE_BIT_VEC:   rv_timer.sv:42                  Declaration range '[N_HARTS * N_TIMERS - 1:0]' ([0:0]) of 'intr_timer_test_q' has a length of one, instance 'rv_timer' of module 'rv_timer' (N_HARTS=1,N_TIMERS=1)                                                                                               New                            

I   ONE_BIT_VEC:   rv_timer.sv:43                  Declaration range '[N_HARTS - 1:0]' ([0:0]) of 'intr_timer_test_qe' has a length of one, instance 'rv_timer' of module 'rv_timer' (N_HARTS=1)                                                                                                                    New                            

I   ONE_BIT_VEC:   rv_timer.sv:44                  Declaration range '[N_HARTS * N_TIMERS - 1:0]' ([0:0]) of 'intr_timer_state_q' has a length of one, instance 'rv_timer' of module 'rv_timer' (N_HARTS=1,N_TIMERS=1)                                                                                              New                            

I   ONE_BIT_VEC:   rv_timer.sv:45                  Declaration range '[N_HARTS - 1:0]' ([0:0]) of 'intr_timer_state_de' has a length of one, instance 'rv_timer' of module 'rv_timer' (N_HARTS=1)                                                                                                                   New                            

I   ONE_BIT_VEC:   rv_timer.sv:46                  Declaration range '[N_HARTS * N_TIMERS - 1:0]' ([0:0]) of 'intr_timer_state_d' has a length of one, instance 'rv_timer' of module 'rv_timer' (N_HARTS=1,N_TIMERS=1)                                                                                              New                            

I   ONE_BIT_VEC:   rv_timer.sv:48                  Declaration range '[N_HARTS * N_TIMERS - 1:0]' ([0:0]) of 'intr_out' has a length of one, instance 'rv_timer' of module 'rv_timer' (N_HARTS=1,N_TIMERS=1)                                                                                                        New                            

I   ONE_BIT_VEC:   rv_timer.sv:116                 Declaration range '[NumAlerts - 1:0]' ([0:0]) of 'alert_test' has a length of one, instance 'rv_timer' of module 'rv_timer' (NumAlerts=1)                                                                                                                        New                            

I   ONE_BIT_VEC:   rv_timer_reg_pkg.sv:88          Declaration range '[0:0]' of 'ctrl' has a length of one                                                                                                                                                                                                          New                            

I   ONE_BIT_VEC:   rv_timer_reg_pkg.sv:88          Declaration range '[0:0]' of 'reg2hw' has a length of one                                                                                                                                                                                                        New                            

I   ONE_BIT_VEC:   rv_timer_reg_pkg.sv:88          Declaration range '[0:0]' of 'rv_timer_reg2hw_t' has a length of one                                                                                                                                                                                             New                            

I   ONE_BIT_VEC:   rv_timer_reg_pkg.sv:89          Declaration range '[0:0]' of 'intr_enable0' has a length of one                                                                                                                                                                                                  New                            

I   ONE_BIT_VEC:   rv_timer_reg_pkg.sv:89          Declaration range '[0:0]' of 'reg2hw' has a length of one                                                                                                                                                                                                        New                            

I   ONE_BIT_VEC:   rv_timer_reg_pkg.sv:89          Declaration range '[0:0]' of 'rv_timer_reg2hw_t' has a length of one                                                                                                                                                                                             New                            

I   ONE_BIT_VEC:   rv_timer_reg_pkg.sv:90          Declaration range '[0:0]' of 'intr_state0' has a length of one                                                                                                                                                                                                   New                            

I   ONE_BIT_VEC:   rv_timer_reg_pkg.sv:90          Declaration range '[0:0]' of 'reg2hw' has a length of one                                                                                                                                                                                                        New                            

I   ONE_BIT_VEC:   rv_timer_reg_pkg.sv:90          Declaration range '[0:0]' of 'rv_timer_reg2hw_t' has a length of one                                                                                                                                                                                             New                            

I   ONE_BIT_VEC:   rv_timer_reg_pkg.sv:91          Declaration range '[0:0]' of 'intr_test0' has a length of one                                                                                                                                                                                                    New                            

I   ONE_BIT_VEC:   rv_timer_reg_pkg.sv:91          Declaration range '[0:0]' of 'reg2hw' has a length of one                                                                                                                                                                                                        New                            

I   ONE_BIT_VEC:   rv_timer_reg_pkg.sv:91          Declaration range '[0:0]' of 'rv_timer_reg2hw_t' has a length of one                                                                                                                                                                                             New                            

I   ONE_BIT_VEC:   rv_timer_reg_pkg.sv:101         Declaration range '[0:0]' of 'hw2reg' has a length of one                                                                                                                                                                                                        New                            

I   ONE_BIT_VEC:   rv_timer_reg_pkg.sv:101         Declaration range '[0:0]' of 'intr_state0' has a length of one                                                                                                                                                                                                   New                            

I   ONE_BIT_VEC:   rv_timer_reg_pkg.sv:101         Declaration range '[0:0]' of 'rv_timer_hw2reg_t' has a length of one                                                                                                                                                                                             New                            

I   ONE_BIT_VEC:   rv_timer_reg_top.sv:158         Declaration range '[0:0]' of 'alert_test_flds_we' has a length of one                                                                                                                                                                                            New                            

I   ONE_BIT_VEC:   rv_timer_reg_top.sv:266         Declaration range '[0:0]' of 'intr_test0_flds_we' has a length of one                                                                                                                                                                                            New                            

I   ONE_BIT_VEC:   rv_timer_reg_top.sv:398         Declaration range '[0:0]' of 'compare_lower0_0_flds_we' has a length of one                                                                                                                                                                                      New                            

I   ONE_BIT_VEC:   rv_timer_reg_top.sv:438         Declaration range '[0:0]' of 'compare_upper0_0_flds_we' has a length of one                                                                                                                                                                                      New                            

I   ONE_BIT_VEC:   timer_core.sv:20                Declaration range '[N]' ([1]) of 'mtimecmp' has a length of one, instance 'rv_timer.gen_harts[0].u_core' of module 'timer_core' (N=1)                                                                                                                            New                            

I   ONE_BIT_VEC:   timer_core.sv:22                Declaration range '[N - 1:0]' ([0:0]) of 'intr' has a length of one, instance 'rv_timer.gen_harts[0].u_core' of module 'timer_core' (N=1)                                                                                                                        New                            

I   ONE_BIT_VEC:   prim_buf.sv:24                  Declaration range '[Width - 1:0]' ([0:0]) of 'in_i' has a length of one, instance 'rv_timer.gen_alert_tx[0].u_prim_alert_sender.u_prim_buf_in_req.u_secure_anchor_buf' of module 'prim_buf' (Width=1)                                                            New                            

I   ONE_BIT_VEC:   prim_buf.sv:25                  Declaration range '[Width - 1:0]' ([0:0]) of 'out_o' has a length of one, instance 'rv_timer.gen_alert_tx[0].u_prim_alert_sender.u_prim_buf_in_req.u_secure_anchor_buf' of module 'prim_buf' (Width=1)                                                           New                            

I   ONE_BIT_VEC:   prim_flop.sv:22                 Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'rv_timer.u_reg.u_compare_lower0_00_qe' of module 'prim_flop' (Width=1)                                                                                                  New                            

I   ONE_BIT_VEC:   prim_flop.sv:27                 Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'rv_timer.u_reg.u_compare_lower0_00_qe' of module 'prim_flop' (Width=1)                                                                                                         New                            

I   ONE_BIT_VEC:   prim_flop.sv:28                 Declaration range '[Width - 1:0]' ([0:0]) of 'q_o' has a length of one, instance 'rv_timer.u_reg.u_compare_lower0_00_qe' of module 'prim_flop' (Width=1)                                                                                                         New                            

I   ONE_BIT_VEC:   prim_flop_2sync.sv:19           Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'rv_timer.gen_alert_tx[0].u_prim_alert_sender.u_decode_ping.gen_async.i_sync_p' of module 'prim_flop_2sync' (Width=1)                                                    New                            

I   ONE_BIT_VEC:   prim_flop_2sync.sv:25           Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'rv_timer.gen_alert_tx[0].u_prim_alert_sender.u_decode_ping.gen_async.i_sync_p' of module 'prim_flop_2sync' (Width=1)                                                           New                            

I   ONE_BIT_VEC:   prim_flop_2sync.sv:26           Declaration range '[Width - 1:0]' ([0:0]) of 'q_o' has a length of one, instance 'rv_timer.gen_alert_tx[0].u_prim_alert_sender.u_decode_ping.gen_async.i_sync_p' of module 'prim_flop_2sync' (Width=1)                                                           New                            

I   ONE_BIT_VEC:   prim_intr_hw.sv:44              Declaration range '[Width - 1:0]' ([0:0]) of 'event_intr_i' has a length of one, instance 'rv_timer.gen_harts[0].u_intr_hw' of module 'prim_intr_hw' (Width=1)                                                                                                   New                            

I   ONE_BIT_VEC:   prim_intr_hw.sv:47              Declaration range '[Width - 1:0]' ([0:0]) of 'reg2hw_intr_enable_q_i' has a length of one, instance 'rv_timer.gen_harts[0].u_intr_hw' of module 'prim_intr_hw' (Width=1)                                                                                         New                            

I   ONE_BIT_VEC:   prim_intr_hw.sv:48              Declaration range '[Width - 1:0]' ([0:0]) of 'reg2hw_intr_test_q_i' has a length of one, instance 'rv_timer.gen_harts[0].u_intr_hw' of module 'prim_intr_hw' (Width=1)                                                                                           New                            

I   ONE_BIT_VEC:   prim_intr_hw.sv:50              Declaration range '[Width - 1:0]' ([0:0]) of 'reg2hw_intr_state_q_i' has a length of one, instance 'rv_timer.gen_harts[0].u_intr_hw' of module 'prim_intr_hw' (Width=1)                                                                                          New                            

I   ONE_BIT_VEC:   prim_intr_hw.sv:52              Declaration range '[Width - 1:0]' ([0:0]) of 'hw2reg_intr_state_d_o' has a length of one, instance 'rv_timer.gen_harts[0].u_intr_hw' of module 'prim_intr_hw' (Width=1)                                                                                          New                            

I   ONE_BIT_VEC:   prim_intr_hw.sv:55              Declaration range '[Width - 1:0]' ([0:0]) of 'intr_o' has a length of one, instance 'rv_timer.gen_harts[0].u_intr_hw' of module 'prim_intr_hw' (Width=1)                                                                                                         New                            

I   ONE_BIT_VEC:   prim_intr_hw.sv:58              Declaration range '[Width - 1:0]' ([0:0]) of 'status' has a length of one, instance 'rv_timer.gen_harts[0].u_intr_hw' of module 'prim_intr_hw' (Width=1)                                                                                                         New                            

I   ONE_BIT_VEC:   prim_intr_hw.sv:61              Declaration range '[Width - 1:0]' ([0:0]) of 'g_intr_event.new_event' has a length of one, instance 'rv_timer.gen_harts[0].u_intr_hw' of module 'prim_intr_hw' (Width=1)                                                                                         New                            

I   ONE_BIT_VEC:   prim_generic_buf.sv:10          Declaration range '[Width - 1:0]' ([0:0]) of 'in_i' has a length of one, instance 'rv_timer.gen_alert_tx[0].u_prim_alert_sender.u_prim_buf_in_req.u_secure_anchor_buf.gen_generic.u_impl_generic' of module 'prim_generic_buf' (Width=1)                         New                            

I   ONE_BIT_VEC:   prim_generic_buf.sv:11          Declaration range '[Width - 1:0]' ([0:0]) of 'out_o' has a length of one, instance 'rv_timer.gen_alert_tx[0].u_prim_alert_sender.u_prim_buf_in_req.u_secure_anchor_buf.gen_generic.u_impl_generic' of module 'prim_generic_buf' (Width=1)                        New                            

I   ONE_BIT_VEC:   prim_generic_buf.sv:14          Declaration range '[Width - 1:0]' ([0:0]) of 'inv' has a length of one, instance 'rv_timer.gen_alert_tx[0].u_prim_alert_sender.u_prim_buf_in_req.u_secure_anchor_buf.gen_generic.u_impl_generic' of module 'prim_generic_buf' (Width=1)                          New                            

I   ONE_BIT_VEC:   prim_generic_flop.sv:9          Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'rv_timer.u_reg.u_compare_lower0_00_qe.gen_generic.u_impl_generic' of module 'prim_generic_flop' (Width=1)                                                               New                            

I   ONE_BIT_VEC:   prim_generic_flop.sv:13         Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'rv_timer.u_reg.u_compare_lower0_00_qe.gen_generic.u_impl_generic' of module 'prim_generic_flop' (Width=1)                                                                      New                            

I   ONE_BIT_VEC:   prim_generic_flop.sv:14         Declaration range '[Width - 1:0]' ([0:0]) of 'q_o' has a length of one, instance 'rv_timer.u_reg.u_compare_lower0_00_qe.gen_generic.u_impl_generic' of module 'prim_generic_flop' (Width=1)                                                                      New                            

I   ONE_BIT_VEC:   prim_generic_flop_2sync.sv:9    Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'rv_timer.gen_alert_tx[0].u_prim_alert_sender.u_decode_ping.gen_async.i_sync_p.gen_generic.u_impl_generic' of module 'prim_generic_flop_2sync' (Width=1)                 New                            

I   ONE_BIT_VEC:   prim_generic_flop_2sync.sv:14   Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'rv_timer.gen_alert_tx[0].u_prim_alert_sender.u_decode_ping.gen_async.i_sync_p.gen_generic.u_impl_generic' of module 'prim_generic_flop_2sync' (Width=1)                        New                            

I   ONE_BIT_VEC:   prim_generic_flop_2sync.sv:15   Declaration range '[Width - 1:0]' ([0:0]) of 'q_o' has a length of one, instance 'rv_timer.gen_alert_tx[0].u_prim_alert_sender.u_decode_ping.gen_async.i_sync_p.gen_generic.u_impl_generic' of module 'prim_generic_flop_2sync' (Width=1)                        New                            

I   ONE_BIT_VEC:   prim_generic_flop_2sync.sv:18   Declaration range '[Width - 1:0]' ([0:0]) of 'd_o' has a length of one, instance 'rv_timer.gen_alert_tx[0].u_prim_alert_sender.u_decode_ping.gen_async.i_sync_p.gen_generic.u_impl_generic' of module 'prim_generic_flop_2sync' (Width=1)                        New                            

I   ONE_BIT_VEC:   prim_generic_flop_2sync.sv:19   Declaration range '[Width - 1:0]' ([0:0]) of 'intq' has a length of one, instance 'rv_timer.gen_alert_tx[0].u_prim_alert_sender.u_decode_ping.gen_async.i_sync_p.gen_generic.u_impl_generic' of module 'prim_generic_flop_2sync' (Width=1)                       New                            

I   ONE_BIT_VEC:   prim_sec_anchor_buf.sv:10       Declaration range '[Width - 1:0]' ([0:0]) of 'in_i' has a length of one, instance 'rv_timer.gen_alert_tx[0].u_prim_alert_sender.u_prim_buf_in_req' of module 'prim_sec_anchor_buf' (Width=1)                                                                     New                            

I   ONE_BIT_VEC:   prim_sec_anchor_buf.sv:11       Declaration range '[Width - 1:0]' ([0:0]) of 'out_o' has a length of one, instance 'rv_timer.gen_alert_tx[0].u_prim_alert_sender.u_prim_buf_in_req' of module 'prim_sec_anchor_buf' (Width=1)                                                                    New                            

I   ONE_BIT_VEC:   prim_subreg.sv:12               Declaration range '[DW - 1:0]' ([0:0]) of 'RESVAL' has a length of one, instance 'rv_timer.u_reg.u_ctrl' of module 'prim_subreg' (DW=1)                                                                                                                          New                            

I   ONE_BIT_VEC:   prim_subreg.sv:21               Declaration range '[DW - 1:0]' ([0:0]) of 'wd' has a length of one, instance 'rv_timer.u_reg.u_ctrl' of module 'prim_subreg' (DW=1)                                                                                                                              New                            

I   ONE_BIT_VEC:   prim_subreg.sv:25               Declaration range '[DW - 1:0]' ([0:0]) of 'd' has a length of one, instance 'rv_timer.u_reg.u_ctrl' of module 'prim_subreg' (DW=1)                                                                                                                               New                            

I   ONE_BIT_VEC:   prim_subreg.sv:29               Declaration range '[DW - 1:0]' ([0:0]) of 'q' has a length of one, instance 'rv_timer.u_reg.u_ctrl' of module 'prim_subreg' (DW=1)                                                                                                                               New                            

I   ONE_BIT_VEC:   prim_subreg.sv:34               Declaration range '[DW - 1:0]' ([0:0]) of 'ds' has a length of one, instance 'rv_timer.u_reg.u_ctrl' of module 'prim_subreg' (DW=1)                                                                                                                              New                            

I   ONE_BIT_VEC:   prim_subreg.sv:35               Declaration range '[DW - 1:0]' ([0:0]) of 'qs' has a length of one, instance 'rv_timer.u_reg.u_ctrl' of module 'prim_subreg' (DW=1)                                                                                                                              New                            

I   ONE_BIT_VEC:   prim_subreg.sv:39               Declaration range '[DW - 1:0]' ([0:0]) of 'wr_data' has a length of one, instance 'rv_timer.u_reg.u_ctrl' of module 'prim_subreg' (DW=1)                                                                                                                         New                            

I   ONE_BIT_VEC:   prim_subreg_arb.sv:17           Declaration range '[DW - 1:0]' ([0:0]) of 'wd' has a length of one, instance 'rv_timer.u_reg.u_ctrl.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1)                                                                                                           New                            

I   ONE_BIT_VEC:   prim_subreg_arb.sv:21           Declaration range '[DW - 1:0]' ([0:0]) of 'd' has a length of one, instance 'rv_timer.u_reg.u_ctrl.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1)                                                                                                            New                            

I   ONE_BIT_VEC:   prim_subreg_arb.sv:24           Declaration range '[DW - 1:0]' ([0:0]) of 'q' has a length of one, instance 'rv_timer.u_reg.u_ctrl.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1)                                                                                                            New                            

I   ONE_BIT_VEC:   prim_subreg_arb.sv:28           Declaration range '[DW - 1:0]' ([0:0]) of 'wr_data' has a length of one, instance 'rv_timer.u_reg.u_ctrl.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1)                                                                                                      New                            

I   ONE_BIT_VEC:   prim_subreg_arb.sv:36           Declaration range '[DW - 1:0]' ([0:0]) of 'gen_w.unused_q' has a length of one, instance 'rv_timer.u_reg.u_ctrl.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1)                                                                                               New                            

I   ONE_BIT_VEC:   prim_subreg_ext.sv:12           Declaration range '[DW - 1:0]' ([0:0]) of 'wd' has a length of one, instance 'rv_timer.u_reg.u_alert_test' of module 'prim_subreg_ext' (DW=1)                                                                                                                    New                            

I   ONE_BIT_VEC:   prim_subreg_ext.sv:14           Declaration range '[DW - 1:0]' ([0:0]) of 'd' has a length of one, instance 'rv_timer.u_reg.u_alert_test' of module 'prim_subreg_ext' (DW=1)                                                                                                                     New                            

I   ONE_BIT_VEC:   prim_subreg_ext.sv:19           Declaration range '[DW - 1:0]' ([0:0]) of 'q' has a length of one, instance 'rv_timer.u_reg.u_alert_test' of module 'prim_subreg_ext' (DW=1)                                                                                                                     New                            

I   ONE_BIT_VEC:   prim_subreg_ext.sv:20           Declaration range '[DW - 1:0]' ([0:0]) of 'ds' has a length of one, instance 'rv_timer.u_reg.u_alert_test' of module 'prim_subreg_ext' (DW=1)                                                                                                                    New                            

I   ONE_BIT_VEC:   prim_subreg_ext.sv:21           Declaration range '[DW - 1:0]' ([0:0]) of 'qs' has a length of one, instance 'rv_timer.u_reg.u_alert_test' of module 'prim_subreg_ext' (DW=1)                                                                                                                    New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'd_sink' has a length of one                                                                                                                                                                              New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl' has a length of one                                                                                                                                                                                  New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_d2h_t' has a length of one                                                                                                                                                                            New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_i' has a length of one                                                                                                                                                                                New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_o' has a length of one                                                                                                                                                                                New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_o_pre' has a length of one                                                                                                                                                                            New                            

I   ONE_BIT_VEC:   tlul_pkg.sv:111                 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_reg_d2h' has a length of one                                                                                                                                                                          New                            

I   EXPLICIT_BITLEN:   prim_util_pkg.sv:85   Bit length not specified for constant '1'                   New                            

I   EXPLICIT_BITLEN:   tlul_err.sv:69        Bit length not specified for constant "'h1"                 New                            

I   EXPLICIT_BITLEN:   tlul_err.sv:77        Bit length not specified for constant "'h2"                 New                            

I   MIN_NAME_LEN:   rv_timer_reg_pkg.sv:22   Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_timer_reg_pkg.sv:27   Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_timer_reg_pkg.sv:31   Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_timer_reg_pkg.sv:35   Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_timer_reg_pkg.sv:39   Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_timer_reg_pkg.sv:45   Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_timer_reg_pkg.sv:48   Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_timer_reg_pkg.sv:53   Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_timer_reg_pkg.sv:57   Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_timer_reg_pkg.sv:61   Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_timer_reg_pkg.sv:66   Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_timer_reg_pkg.sv:71   Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_timer_reg_pkg.sv:76   Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   rv_timer_reg_pkg.sv:81   Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   timer_core.sv:8          Name 'N' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:80      Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:80      Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:85      Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:106     Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:106     Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:111     Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:124     Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:124     Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:131     Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:131     Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:212     Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:212     Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:217     Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:238     Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:238     Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:243     Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:256     Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:256     Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:263     Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:263     Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:344     Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:344     Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:349     Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:370     Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:370     Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:375     Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:388     Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:388     Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:395     Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:395     Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:476     Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:476     Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:481     Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:502     Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:502     Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:507     Name 'k' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:520     Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:520     Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:527     Name 'a' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_mubi_pkg.sv:527     Name 'b' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subreg.sv:25        Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subreg.sv:29        Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subreg_arb.sv:21    Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subreg_arb.sv:24    Name 'q' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subreg_ext.sv:14    Name 'd' is shorter than minimum length 2                 New                            

I   MIN_NAME_LEN:   prim_subreg_ext.sv:19    Name 'q' is shorter than minimum length 2                 New                            

I   CONST_OUTPUT:   tlul_adapter_reg.sv:91    Output 'addr_o[1:0]' is driven by constant zeros in module 'tlul_adapter_reg' (RegAw=9)                 New                            

I   CONST_OUTPUT:   tlul_adapter_reg.sv:195   Output 'intg_error_o' is driven by constant zero in module 'tlul_adapter_reg' (RegAw=9)                 New                            

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