Group : spi_device_env_pkg::spi_device_env_cov::fw_tx_fifo_size_cg
Summary for Group spi_device_env_pkg::spi_device_env_cov::fw_tx_fifo_size_cg
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables |
8 |
0 |
8 |
100.00 |
Variables for Group spi_device_env_pkg::spi_device_env_cov::fw_tx_fifo_size_cg
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_tx_size |
8 |
0 |
8 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_tx_size
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for cp_tx_size
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
specific_sizes[4] |
32667 |
1 |
|
|
T259 |
1596 |
|
T52 |
222 |
|
T260 |
2133 |
specific_sizes[2048] |
3573 |
1 |
|
|
T200 |
57 |
|
T261 |
16 |
|
T262 |
1269 |
specific_sizes[4092] |
3945 |
1 |
|
|
T176 |
407 |
|
T177 |
704 |
|
T263 |
695 |
sizes[0] |
476515 |
1 |
|
|
T33 |
142 |
|
T45 |
14488 |
|
T40 |
97 |
sizes[1] |
417564 |
1 |
|
|
T10 |
1444 |
|
T13 |
112 |
|
T31 |
2 |
sizes[2] |
274993 |
1 |
|
|
T7 |
12382 |
|
T200 |
57 |
|
T110 |
1514 |
sizes[3] |
33967 |
1 |
|
|
T111 |
82 |
|
T264 |
287 |
|
T265 |
274 |
sizes[4] |
4739 |
1 |
|
|
T176 |
407 |
|
T177 |
704 |
|
T263 |
695 |
0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |