SPI_DEVICE Lint Results
Saturday June 08 2024 00:41:57 UTC
Branch: os_regression
Tool: ASCENTLINT
| Build Mode |
Flow Infos |
Flow Warnings |
Flow Errors |
Lint Infos |
Lint Warnings |
Lint Errors |
| default |
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467 |
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Messages for Build Mode 'default'
Lint Infos
I BLOCK_DECL: prim_util_memload.svh:58 Declaration of 'show_mem_paths' encountered in a begin-end block New
I FSM_DEFAULT_REQ: prim_sync_reqack.sv:253 Next state register 'gen_nrz_hs_protocol.src_fsm_ns' has no assignment in the default branch of the case statement for this finite state machine New
I FSM_DEFAULT_REQ: prim_sync_reqack.sv:297 Next state register 'gen_nrz_hs_protocol.dst_fsm_ns' has no assignment in the default branch of the case statement for this finite state machine New
I FSM_DEFAULT_REQ: prim_diff_decode.sv:158 Next state register 'gen_async.state_d' has no assignment in the default branch of the case statement for this finite state machine New
I NESTED_SUBPROG: tlul_pkg.sv:143 Function 'prim_mubi_pkg::mubi4_test_invalid' is called from within a function New
I NESTED_SUBPROG: tlul_pkg.sv:176 Function 'extract_h2d_cmd_intg' is called from within a function New
I NESTED_SUBPROG: tlul_pkg.sv:178 Function 'prim_secded_pkg::prim_secded_inv_64_57_enc' is called from within a function New
I NESTED_SUBPROG: tlul_pkg.sv:187 Function 'prim_secded_pkg::prim_secded_inv_39_32_enc' is called from within a function New
I NESTED_SUBPROG: tlul_pkg.sv:196 Function 'get_cmd_intg' is called from within a function New
I NESTED_SUBPROG: tlul_pkg.sv:203 Function 'get_data_intg' is called from within a function New
I VAR_INDEX_WRITE: spid_dpram.sv:113 Variable index expression 'initialized_words_d[Spi2SysAw'(spi2sys_wr_addr)]' encountered New
I VAR_INDEX_WRITE: spid_fifo2sram_adapter.sv:80 Variable range select expression 'sram_wdata_o[i * FifoWidth +: FifoWidth]' encountered New
I VAR_INDEX_WRITE: spid_fifo2sram_adapter.sv:81 Variable range select expression 'sram_wmask_o[i * FifoWidth +: FifoWidth]' encountered New
I VAR_INDEX_WRITE: spi_device_pkg.sv:480 Variable range select expression 'result[8 * i +: 8]' encountered New
I VAR_INDEX_WRITE: prim_fifo_sync.sv:124 Variable index expression 'gen_normal_fifo.storage[gen_normal_fifo.fifo_wptr]' encountered New
I VAR_INDEX_WRITE: prim_ram_2p_async_adv.sv:239 Variable range select expression 'a_wmask_d[i * 9 +: 8]' encountered New
I VAR_INDEX_WRITE: prim_ram_2p_async_adv.sv:240 Variable range select expression 'a_wdata_d[i * 9 +: 8]' encountered New
I VAR_INDEX_WRITE: prim_ram_2p_async_adv.sv:241 Variable range select expression 'a_rdata_d[i * 8 +: 8]' encountered New
I VAR_INDEX_WRITE: prim_ram_2p_async_adv.sv:242 Variable range select expression 'b_wmask_d[i * 9 +: 8]' encountered New
I VAR_INDEX_WRITE: prim_ram_2p_async_adv.sv:243 Variable range select expression 'b_wdata_d[i * 9 +: 8]' encountered New
I VAR_INDEX_WRITE: prim_ram_2p_async_adv.sv:244 Variable range select expression 'b_rdata_d[i * 8 +: 8]' encountered New
I VAR_INDEX_WRITE: tlul_adapter_sram.sv:441 Variable index expression 'wmask_intg[woffset]' encountered New
I VAR_INDEX_WRITE: tlul_adapter_sram.sv:442 Variable index expression 'wdata_intg[woffset]' encountered New
I VAR_INDEX_WRITE: tlul_adapter_sram.sv:523 Variable range select expression 'gen_rmask.rmask[8 * i +: 8]' encountered New
I CASE_INC: spi_cmdparse.sv:325 Case statement tag not specified for value 'b1001 and 6 other values New
I CASE_INC: spi_device.sv:826 Case statement tag not specified for value 'b0000000000 and many other values New
I CASE_INC: spi_device.sv:883 Case statement tag not specified for value 'b00 and 1 other value New
I CASE_INC: spi_device.sv:885 Case statement tag not specified for value 'b0000100000 and many other values New
I CASE_INC: spi_device.sv:1033 Case statement tag not specified for value 'b00 and 1 other value New
I CASE_INC: spi_p2s.sv:60 Case statement tag not specified for value 'b11 New
I CASE_INC: spi_p2s.sv:100 Case statement tag not specified for value 'b11 New
I CASE_INC: spi_p2s.sv:110 Case statement tag not specified for value 'b11 New
I CASE_INC: spi_p2s.sv:136 Case statement tag not specified for value 'b11 New
I CASE_INC: spi_p2s.sv:185 Case statement tag not specified for value 'b11 New
I CASE_INC: spi_passthrough.sv:693 Case statement tag not specified for value 'b00 and 1 other value New
I CASE_INC: spi_passthrough.sv:778 Case statement tag not specified for value 'b111 New
I CASE_INC: spi_readcmd.sv:473 Case statement tag not specified for value 'b0000 and 12 other values New
I CASE_INC: spi_readcmd.sv:480 Case statement tag not specified for value 'b0000 and 12 other values New
I CASE_INC: spi_readcmd.sv:605 Case statement tag not specified for value 'b0110 and 9 other values New
I CASE_INC: spi_readcmd.sv:685 Case statement tag not specified for value 'b0000 and 12 other values New
I CASE_INC: spi_s2p.sv:43 Case statement tag not specified for value 'b11 New
I CASE_INC: spi_s2p.sv:80 Case statement tag not specified for value 'b11 New
I CASE_INC: spi_s2p.sv:91 Case statement tag not specified for value 'b11 New
I CASE_INC: spi_tpm.sv:895 Case statement tag not specified for value 'b101 and 2 other values New
I CASE_INC: spi_tpm.sv:937 Case statement tag not specified for value 'b1001 and 6 other values New
I CASE_INC: spi_tpm.sv:1142 Case statement tag not specified for value 'b1001 and 6 other values New
I CASE_INC: spid_readsram.sv:240 Case statement tag not specified for value 'b11 New
I CASE_INC: spid_upload.sv:452 Case statement tag not specified for value 'b11 New
I CASE_INC: prim_alert_sender.sv:199 Case statement tag not specified for value 'b111 New
I CASE_INC: prim_diff_decode.sv:115 Case statement tag not specified for value 'b11 New
I CASE_INC: tlul_err.sv:62 Case statement tag not specified for value 'h3 New
I CASE_SEL_CONST: spi_cmdparse.sv:332 Constant value '1'b1' found as case statement selector New
I CASE_SEL_CONST: spi_tpm.sv:722 Constant value '1'b1' found as case statement selector New
I ONE_BIT_VEC: spi_device.sv:15 Declaration range '[NumAlerts - 1:0]' ([0:0]) of 'AlertAsyncOn' has a length of one, instance 'spi_device' of module 'spi_device' (NumAlerts=1) New
I ONE_BIT_VEC: spi_device.sv:26 Declaration range '[NumAlerts - 1:0]' ([0:0]) of 'alert_rx_i' has a length of one, instance 'spi_device' of module 'spi_device' (NumAlerts=1) New
I ONE_BIT_VEC: spi_device.sv:27 Declaration range '[NumAlerts - 1:0]' ([0:0]) of 'alert_tx_o' has a length of one, instance 'spi_device' of module 'spi_device' (NumAlerts=1) New
I ONE_BIT_VEC: spi_device.sv:1824 Declaration range '[NumAlerts - 1:0]' ([0:0]) of 'alert_test' has a length of one, instance 'spi_device' of module 'spi_device' (NumAlerts=1) New
I ONE_BIT_VEC: spi_device_reg_top.sv:2124 Declaration range '[0:0]' of 'alert_test_flds_we' has a length of one New
I ONE_BIT_VEC: spi_device_reg_top.sv:19443 Declaration range '[0:0]' of 'tpm_read_fifo_flds_we' has a length of one New
I ONE_BIT_VEC: prim_buf.sv:24 Declaration range '[Width - 1:0]' ([0:0]) of 'in_i' has a length of one, instance 'spi_device.u_scanmode_sync.gen_buffs[0].gen_bits[0].u_prim_buf' of module 'prim_buf' (Width=1) New
I ONE_BIT_VEC: prim_buf.sv:25 Declaration range '[Width - 1:0]' ([0:0]) of 'out_o' has a length of one, instance 'spi_device.u_scanmode_sync.gen_buffs[0].gen_bits[0].u_prim_buf' of module 'prim_buf' (Width=1) New
I ONE_BIT_VEC: prim_flop.sv:22 Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'spi_device.u_flash_readbuf_watermark_pulse_sync.prim_flop_2sync.gen_generic.u_impl_generic.u_sync_1' of module 'prim_flop' (Width=1) New
I ONE_BIT_VEC: prim_flop.sv:27 Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'spi_device.u_flash_readbuf_watermark_pulse_sync.prim_flop_2sync.gen_generic.u_impl_generic.u_sync_1' of module 'prim_flop' (Width=1) New
I ONE_BIT_VEC: prim_flop.sv:28 Declaration range '[Width - 1:0]' ([0:0]) of 'q_o' has a length of one, instance 'spi_device.u_flash_readbuf_watermark_pulse_sync.prim_flop_2sync.gen_generic.u_impl_generic.u_sync_1' of module 'prim_flop' (Width=1) New
I ONE_BIT_VEC: prim_flop_2sync.sv:19 Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'spi_device.u_flash_readbuf_watermark_pulse_sync.prim_flop_2sync' of module 'prim_flop_2sync' (Width=1) New
I ONE_BIT_VEC: prim_flop_2sync.sv:25 Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'spi_device.u_flash_readbuf_watermark_pulse_sync.prim_flop_2sync' of module 'prim_flop_2sync' (Width=1) New
I ONE_BIT_VEC: prim_flop_2sync.sv:26 Declaration range '[Width - 1:0]' ([0:0]) of 'q_o' has a length of one, instance 'spi_device.u_flash_readbuf_watermark_pulse_sync.prim_flop_2sync' of module 'prim_flop_2sync' (Width=1) New
I ONE_BIT_VEC: prim_intr_hw.sv:44 Declaration range '[Width - 1:0]' ([0:0]) of 'event_intr_i' has a length of one, instance 'spi_device.u_intr_cmdfifo_not_empty' of module 'prim_intr_hw' (Width=1) New
I ONE_BIT_VEC: prim_intr_hw.sv:47 Declaration range '[Width - 1:0]' ([0:0]) of 'reg2hw_intr_enable_q_i' has a length of one, instance 'spi_device.u_intr_cmdfifo_not_empty' of module 'prim_intr_hw' (Width=1) New
I ONE_BIT_VEC: prim_intr_hw.sv:48 Declaration range '[Width - 1:0]' ([0:0]) of 'reg2hw_intr_test_q_i' has a length of one, instance 'spi_device.u_intr_cmdfifo_not_empty' of module 'prim_intr_hw' (Width=1) New
I ONE_BIT_VEC: prim_intr_hw.sv:50 Declaration range '[Width - 1:0]' ([0:0]) of 'reg2hw_intr_state_q_i' has a length of one, instance 'spi_device.u_intr_cmdfifo_not_empty' of module 'prim_intr_hw' (Width=1) New
I ONE_BIT_VEC: prim_intr_hw.sv:52 Declaration range '[Width - 1:0]' ([0:0]) of 'hw2reg_intr_state_d_o' has a length of one, instance 'spi_device.u_intr_cmdfifo_not_empty' of module 'prim_intr_hw' (Width=1) New
I ONE_BIT_VEC: prim_intr_hw.sv:55 Declaration range '[Width - 1:0]' ([0:0]) of 'intr_o' has a length of one, instance 'spi_device.u_intr_cmdfifo_not_empty' of module 'prim_intr_hw' (Width=1) New
I ONE_BIT_VEC: prim_intr_hw.sv:58 Declaration range '[Width - 1:0]' ([0:0]) of 'status' has a length of one, instance 'spi_device.u_intr_cmdfifo_not_empty' of module 'prim_intr_hw' (Width=1) New
I ONE_BIT_VEC: prim_intr_hw.sv:61 Declaration range '[Width - 1:0]' ([0:0]) of 'g_intr_event.new_event' has a length of one, instance 'spi_device.u_intr_cmdfifo_not_empty' of module 'prim_intr_hw' (Width=1) New
I ONE_BIT_VEC: prim_intr_hw.sv:72 Declaration range '[Width - 1:0]' ([0:0]) of 'g_intr_status.test_q' has a length of one, instance 'spi_device.u_intr_tpm_cmdaddr_notempty' of module 'prim_intr_hw' (Width=1) New
I ONE_BIT_VEC: prim_sync_reqack_data.sv:43 Declaration range '[Width - 1:0]' ([0:0]) of 'data_i' has a length of one, instance 'spi_device.u_spid_addr_4b.u_sys2spi_sync' of module 'prim_sync_reqack_data' (Width=1) New
I ONE_BIT_VEC: prim_sync_reqack_data.sv:44 Declaration range '[Width - 1:0]' ([0:0]) of 'data_o' has a length of one, instance 'spi_device.u_spid_addr_4b.u_sys2spi_sync' of module 'prim_sync_reqack_data' (Width=1) New
I ONE_BIT_VEC: prim_arbiter_ppc.sv:46 Declaration range '[IdxW - 1:0]' ([0:0]) of 'idx_o' has a length of one, instance 'spi_device.u_spi_tpm.u_arbiter.gen_arb_ppc.u_reqarb' of module 'prim_arbiter_ppc' (IdxW=1 ('$clog2(N)'),N=2) New
I ONE_BIT_VEC: prim_edge_detector.sv:10 Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'spi_device.u_readcmd.u_addr_latch_pulse' of module 'prim_edge_detector' (Width=1) New
I ONE_BIT_VEC: prim_edge_detector.sv:21 Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'spi_device.u_readcmd.u_addr_latch_pulse' of module 'prim_edge_detector' (Width=1) New
I ONE_BIT_VEC: prim_edge_detector.sv:22 Declaration range '[Width - 1:0]' ([0:0]) of 'q_sync_o' has a length of one, instance 'spi_device.u_readcmd.u_addr_latch_pulse' of module 'prim_edge_detector' (Width=1) New
I ONE_BIT_VEC: prim_edge_detector.sv:24 Declaration range '[Width - 1:0]' ([0:0]) of 'q_posedge_pulse_o' has a length of one, instance 'spi_device.u_readcmd.u_addr_latch_pulse' of module 'prim_edge_detector' (Width=1) New
I ONE_BIT_VEC: prim_edge_detector.sv:25 Declaration range '[Width - 1:0]' ([0:0]) of 'q_negedge_pulse_o' has a length of one, instance 'spi_device.u_readcmd.u_addr_latch_pulse' of module 'prim_edge_detector' (Width=1) New
I ONE_BIT_VEC: prim_edge_detector.sv:28 Declaration range '[Width - 1:0]' ([0:0]) of 'q_sync_d' has a length of one, instance 'spi_device.u_readcmd.u_addr_latch_pulse' of module 'prim_edge_detector' (Width=1) New
I ONE_BIT_VEC: prim_fifo_async.sv:139 Declaration range '[PTRV_W - 1:0]' ([0:0]) of 'g_depth_calc.wptr_value' has a length of one, instance 'spi_device.u_spid_status.u_sw_status_update_sync' of module 'prim_fifo_async' (Depth=2,PTRV_W=1 ('(Depth == 1) ? 1 : $clog2(Depth)')) New
I ONE_BIT_VEC: prim_fifo_async.sv:140 Declaration range '[PTRV_W - 1:0]' ([0:0]) of 'g_depth_calc.rptr_sync_value' has a length of one, instance 'spi_device.u_spid_status.u_sw_status_update_sync' of module 'prim_fifo_async' (Depth=2,PTRV_W=1 ('(Depth == 1) ? 1 : $clog2(Depth)')) New
I ONE_BIT_VEC: prim_fifo_async.sv:153 Declaration range '[PTRV_W - 1:0]' ([0:0]) of 'g_depth_calc.rptr_value' has a length of one, instance 'spi_device.u_spid_status.u_sw_status_update_sync' of module 'prim_fifo_async' (Depth=2,PTRV_W=1 ('(Depth == 1) ? 1 : $clog2(Depth)')) New
I ONE_BIT_VEC: prim_fifo_async.sv:154 Declaration range '[PTRV_W - 1:0]' ([0:0]) of 'g_depth_calc.wptr_sync_value' has a length of one, instance 'spi_device.u_spid_status.u_sw_status_update_sync' of module 'prim_fifo_async' (Depth=2,PTRV_W=1 ('(Depth == 1) ? 1 : $clog2(Depth)')) New
I ONE_BIT_VEC: prim_fifo_sync.sv:32 Declaration range '[DepthW - 1:0]' ([0:0]) of 'depth_o' has a length of one, instance 'spi_device.u_readcmd.u_readsram.u_sram_fifo' of module 'prim_fifo_sync' (Depth=1,DepthW=1 ('prim_util_pkg::vbits(Depth + 1)')) New
I ONE_BIT_VEC: prim_fifo_sync.sv:63 Declaration range '[gen_normal_fifo.PtrW - 1:0]' ([0:0]) of 'gen_normal_fifo.fifo_wptr' has a length of one, instance 'spi_device.u_readcmd.u_readsram.u_sram_fifo' of module 'prim_fifo_sync' (Depth=1,gen_normal_fifo.PtrW=1 ('prim_util_pkg::vbits(Depth)')) New
I ONE_BIT_VEC: prim_fifo_sync.sv:105 Declaration range '[Depth - 1:0]' ([0:0]) of 'gen_normal_fifo.storage' has a length of one, instance 'spi_device.u_readcmd.u_readsram.u_sram_fifo' of module 'prim_fifo_sync' (Depth=1,Width=32) New
I ONE_BIT_VEC: prim_fifo_sync_cnt.sv:25 Declaration range '[PtrW - 1:0]' ([0:0]) of 'wptr_o' has a length of one, instance 'spi_device.u_readcmd.u_readsram.u_sram_fifo.gen_normal_fifo.u_fifo_cnt' of module 'prim_fifo_sync_cnt' (Depth=1,PtrW=1 ('prim_util_pkg::vbits(Depth)')) New
I ONE_BIT_VEC: prim_fifo_sync_cnt.sv:26 Declaration range '[PtrW - 1:0]' ([0:0]) of 'rptr_o' has a length of one, instance 'spi_device.u_readcmd.u_readsram.u_sram_fifo.gen_normal_fifo.u_fifo_cnt' of module 'prim_fifo_sync_cnt' (Depth=1,PtrW=1 ('prim_util_pkg::vbits(Depth)')) New
I ONE_BIT_VEC: prim_fifo_sync_cnt.sv:31 Declaration range '[DepthW - 1:0]' ([0:0]) of 'depth_o' has a length of one, instance 'spi_device.u_readcmd.u_readsram.u_sram_fifo.gen_normal_fifo.u_fifo_cnt' of module 'prim_fifo_sync_cnt' (Depth=1,DepthW=1 ('prim_util_pkg::vbits(Depth + 1)')) New
I ONE_BIT_VEC: prim_generic_buf.sv:10 Declaration range '[Width - 1:0]' ([0:0]) of 'in_i' has a length of one, instance 'spi_device.u_scanmode_sync.gen_buffs[0].gen_bits[0].u_prim_buf.gen_generic.u_impl_generic' of module 'prim_generic_buf' (Width=1) New
I ONE_BIT_VEC: prim_generic_buf.sv:11 Declaration range '[Width - 1:0]' ([0:0]) of 'out_o' has a length of one, instance 'spi_device.u_scanmode_sync.gen_buffs[0].gen_bits[0].u_prim_buf.gen_generic.u_impl_generic' of module 'prim_generic_buf' (Width=1) New
I ONE_BIT_VEC: prim_generic_buf.sv:14 Declaration range '[Width - 1:0]' ([0:0]) of 'inv' has a length of one, instance 'spi_device.u_scanmode_sync.gen_buffs[0].gen_bits[0].u_prim_buf.gen_generic.u_impl_generic' of module 'prim_generic_buf' (Width=1) New
I ONE_BIT_VEC: prim_generic_flop.sv:9 Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'spi_device.u_flash_readbuf_watermark_pulse_sync.prim_flop_2sync.gen_generic.u_impl_generic.u_sync_1.gen_generic.u_impl_generic' of module 'prim_generic_flop' (Width=1) New
I ONE_BIT_VEC: prim_generic_flop.sv:13 Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'spi_device.u_flash_readbuf_watermark_pulse_sync.prim_flop_2sync.gen_generic.u_impl_generic.u_sync_1.gen_generic.u_impl_generic' of module 'prim_generic_flop' (Width=1) New
I ONE_BIT_VEC: prim_generic_flop.sv:14 Declaration range '[Width - 1:0]' ([0:0]) of 'q_o' has a length of one, instance 'spi_device.u_flash_readbuf_watermark_pulse_sync.prim_flop_2sync.gen_generic.u_impl_generic.u_sync_1.gen_generic.u_impl_generic' of module 'prim_generic_flop' (Width=1) New
I ONE_BIT_VEC: prim_generic_flop_2sync.sv:9 Declaration range '[Width - 1:0]' ([0:0]) of 'ResetValue' has a length of one, instance 'spi_device.u_flash_readbuf_watermark_pulse_sync.prim_flop_2sync.gen_generic.u_impl_generic' of module 'prim_generic_flop_2sync' (Width=1) New
I ONE_BIT_VEC: prim_generic_flop_2sync.sv:14 Declaration range '[Width - 1:0]' ([0:0]) of 'd_i' has a length of one, instance 'spi_device.u_flash_readbuf_watermark_pulse_sync.prim_flop_2sync.gen_generic.u_impl_generic' of module 'prim_generic_flop_2sync' (Width=1) New
I ONE_BIT_VEC: prim_generic_flop_2sync.sv:15 Declaration range '[Width - 1:0]' ([0:0]) of 'q_o' has a length of one, instance 'spi_device.u_flash_readbuf_watermark_pulse_sync.prim_flop_2sync.gen_generic.u_impl_generic' of module 'prim_generic_flop_2sync' (Width=1) New
I ONE_BIT_VEC: prim_generic_flop_2sync.sv:18 Declaration range '[Width - 1:0]' ([0:0]) of 'd_o' has a length of one, instance 'spi_device.u_flash_readbuf_watermark_pulse_sync.prim_flop_2sync.gen_generic.u_impl_generic' of module 'prim_generic_flop_2sync' (Width=1) New
I ONE_BIT_VEC: prim_generic_flop_2sync.sv:19 Declaration range '[Width - 1:0]' ([0:0]) of 'intq' has a length of one, instance 'spi_device.u_flash_readbuf_watermark_pulse_sync.prim_flop_2sync.gen_generic.u_impl_generic' of module 'prim_generic_flop_2sync' (Width=1) New
I ONE_BIT_VEC: prim_sec_anchor_buf.sv:10 Declaration range '[Width - 1:0]' ([0:0]) of 'in_i' has a length of one, instance 'spi_device.gen_alert_tx[0].u_prim_alert_sender.u_prim_buf_in_req' of module 'prim_sec_anchor_buf' (Width=1) New
I ONE_BIT_VEC: prim_sec_anchor_buf.sv:11 Declaration range '[Width - 1:0]' ([0:0]) of 'out_o' has a length of one, instance 'spi_device.gen_alert_tx[0].u_prim_alert_sender.u_prim_buf_in_req' of module 'prim_sec_anchor_buf' (Width=1) New
I ONE_BIT_VEC: prim_subreg.sv:12 Declaration range '[DW - 1:0]' ([0:0]) of 'RESVAL' has a length of one, instance 'spi_device.u_reg.u_intr_state_upload_cmdfifo_not_empty' of module 'prim_subreg' (DW=1) New
I ONE_BIT_VEC: prim_subreg.sv:21 Declaration range '[DW - 1:0]' ([0:0]) of 'wd' has a length of one, instance 'spi_device.u_reg.u_intr_state_upload_cmdfifo_not_empty' of module 'prim_subreg' (DW=1) New
I ONE_BIT_VEC: prim_subreg.sv:25 Declaration range '[DW - 1:0]' ([0:0]) of 'd' has a length of one, instance 'spi_device.u_reg.u_intr_state_upload_cmdfifo_not_empty' of module 'prim_subreg' (DW=1) New
I ONE_BIT_VEC: prim_subreg.sv:29 Declaration range '[DW - 1:0]' ([0:0]) of 'q' has a length of one, instance 'spi_device.u_reg.u_intr_state_upload_cmdfifo_not_empty' of module 'prim_subreg' (DW=1) New
I ONE_BIT_VEC: prim_subreg.sv:34 Declaration range '[DW - 1:0]' ([0:0]) of 'ds' has a length of one, instance 'spi_device.u_reg.u_intr_state_upload_cmdfifo_not_empty' of module 'prim_subreg' (DW=1) New
I ONE_BIT_VEC: prim_subreg.sv:35 Declaration range '[DW - 1:0]' ([0:0]) of 'qs' has a length of one, instance 'spi_device.u_reg.u_intr_state_upload_cmdfifo_not_empty' of module 'prim_subreg' (DW=1) New
I ONE_BIT_VEC: prim_subreg.sv:39 Declaration range '[DW - 1:0]' ([0:0]) of 'wr_data' has a length of one, instance 'spi_device.u_reg.u_intr_state_upload_cmdfifo_not_empty' of module 'prim_subreg' (DW=1) New
I ONE_BIT_VEC: prim_subreg_arb.sv:17 Declaration range '[DW - 1:0]' ([0:0]) of 'wd' has a length of one, instance 'spi_device.u_reg.u_intr_state_upload_cmdfifo_not_empty.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1) New
I ONE_BIT_VEC: prim_subreg_arb.sv:21 Declaration range '[DW - 1:0]' ([0:0]) of 'd' has a length of one, instance 'spi_device.u_reg.u_intr_state_upload_cmdfifo_not_empty.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1) New
I ONE_BIT_VEC: prim_subreg_arb.sv:24 Declaration range '[DW - 1:0]' ([0:0]) of 'q' has a length of one, instance 'spi_device.u_reg.u_intr_state_upload_cmdfifo_not_empty.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1) New
I ONE_BIT_VEC: prim_subreg_arb.sv:28 Declaration range '[DW - 1:0]' ([0:0]) of 'wr_data' has a length of one, instance 'spi_device.u_reg.u_intr_state_upload_cmdfifo_not_empty.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1) New
I ONE_BIT_VEC: prim_subreg_arb.sv:36 Declaration range '[DW - 1:0]' ([0:0]) of 'gen_w.unused_q' has a length of one, instance 'spi_device.u_reg.u_intr_enable_upload_cmdfifo_not_empty.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1) New
I ONE_BIT_VEC: prim_subreg_arb.sv:47 Declaration range '[DW - 1:0]' ([0:0]) of 'gen_ro.unused_wd' has a length of one, instance 'spi_device.u_reg.u_intr_state_tpm_header_not_empty.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1) New
I ONE_BIT_VEC: prim_subreg_arb.sv:48 Declaration range '[DW - 1:0]' ([0:0]) of 'gen_ro.unused_q' has a length of one, instance 'spi_device.u_reg.u_intr_state_tpm_header_not_empty.wr_en_data_arb' of module 'prim_subreg_arb' (DW=1) New
I ONE_BIT_VEC: prim_subreg_ext.sv:12 Declaration range '[DW - 1:0]' ([0:0]) of 'wd' has a length of one, instance 'spi_device.u_reg.u_intr_test_upload_cmdfifo_not_empty' of module 'prim_subreg_ext' (DW=1) New
I ONE_BIT_VEC: prim_subreg_ext.sv:14 Declaration range '[DW - 1:0]' ([0:0]) of 'd' has a length of one, instance 'spi_device.u_reg.u_intr_test_upload_cmdfifo_not_empty' of module 'prim_subreg_ext' (DW=1) New
I ONE_BIT_VEC: prim_subreg_ext.sv:19 Declaration range '[DW - 1:0]' ([0:0]) of 'q' has a length of one, instance 'spi_device.u_reg.u_intr_test_upload_cmdfifo_not_empty' of module 'prim_subreg_ext' (DW=1) New
I ONE_BIT_VEC: prim_subreg_ext.sv:20 Declaration range '[DW - 1:0]' ([0:0]) of 'ds' has a length of one, instance 'spi_device.u_reg.u_intr_test_upload_cmdfifo_not_empty' of module 'prim_subreg_ext' (DW=1) New
I ONE_BIT_VEC: prim_subreg_ext.sv:21 Declaration range '[DW - 1:0]' ([0:0]) of 'qs' has a length of one, instance 'spi_device.u_reg.u_intr_test_upload_cmdfifo_not_empty' of module 'prim_subreg_ext' (DW=1) New
I ONE_BIT_VEC: tlul_adapter_sram.sv:221 Declaration range '[WoffsetWidth - 1:0]' ([0:0]) of 'sram_req_t' has a length of one, instance 'spi_device.u_tlul2sram_egress' of module 'tlul_adapter_sram' (DataBitWidth=2 ('prim_util_pkg::vbits(SramByte)'),SramByte=4 ('SramDw / 8'),SramDw=32,WoffsetWidth=1 ('(SramByte == top_pkg::TL_DBW) ? 1 : DataBitWidth - prim_util_pkg::vbits(top_pkg::TL_DBW)')) New
I ONE_BIT_VEC: tlul_adapter_sram.sv:221 Declaration range '[WoffsetWidth - 1:0]' ([0:0]) of 'sramreqfifo_wdata' has a length of one, instance 'spi_device.u_tlul2sram_egress' of module 'tlul_adapter_sram' (DataBitWidth=2 ('prim_util_pkg::vbits(SramByte)'),SramByte=4 ('SramDw / 8'),SramDw=32,WoffsetWidth=1 ('(SramByte == top_pkg::TL_DBW) ? 1 : DataBitWidth - prim_util_pkg::vbits(top_pkg::TL_DBW)')) New
I ONE_BIT_VEC: tlul_adapter_sram.sv:221 Declaration range '[WoffsetWidth - 1:0]' ([0:0]) of 'woffset' has a length of one, instance 'spi_device.u_tlul2sram_egress' of module 'tlul_adapter_sram' (DataBitWidth=2 ('prim_util_pkg::vbits(SramByte)'),SramByte=4 ('SramDw / 8'),SramDw=32,WoffsetWidth=1 ('(SramByte == top_pkg::TL_DBW) ? 1 : DataBitWidth - prim_util_pkg::vbits(top_pkg::TL_DBW)')) New
I ONE_BIT_VEC: tlul_adapter_sram.sv:400 Declaration range '[WoffsetWidth - 1:0]' ([0:0]) of 'woffset' has a length of one, instance 'spi_device.u_tlul2sram_egress' of module 'tlul_adapter_sram' (DataBitWidth=2 ('prim_util_pkg::vbits(SramByte)'),SramByte=4 ('SramDw / 8'),SramDw=32,WoffsetWidth=1 ('(SramByte == top_pkg::TL_DBW) ? 1 : DataBitWidth - prim_util_pkg::vbits(top_pkg::TL_DBW)')) New
I ONE_BIT_VEC: tlul_adapter_sram.sv:413 Declaration range '[WidthMult - 1:0]' ([0:0]) of 'wmask_combined' has a length of one, instance 'spi_device.u_tlul2sram_egress' of module 'tlul_adapter_sram' (DataIntgWidth=7,DataWidth=32 ('EnableDataIntgPt ? top_pkg::TL_DW + DataIntgWidth : top_pkg::TL_DW'),EnableDataIntgPt=0,SramDw=32,WidthMult=1 ('SramDw / top_pkg::TL_DW')) New
I ONE_BIT_VEC: tlul_adapter_sram.sv:414 Declaration range '[WidthMult - 1:0]' ([0:0]) of 'wdata_combined' has a length of one, instance 'spi_device.u_tlul2sram_egress' of module 'tlul_adapter_sram' (DataIntgWidth=7,DataWidth=32 ('EnableDataIntgPt ? top_pkg::TL_DW + DataIntgWidth : top_pkg::TL_DW'),EnableDataIntgPt=0,SramDw=32,WidthMult=1 ('SramDw / top_pkg::TL_DW')) New
I ONE_BIT_VEC: tlul_adapter_sram.sv:417 Declaration range '[WidthMult - 1:0]' ([0:0]) of 'wmask_int' has a length of one, instance 'spi_device.u_tlul2sram_egress' of module 'tlul_adapter_sram' (SramDw=32,WidthMult=1 ('SramDw / top_pkg::TL_DW')) New
I ONE_BIT_VEC: tlul_adapter_sram.sv:418 Declaration range '[WidthMult - 1:0]' ([0:0]) of 'wdata_int' has a length of one, instance 'spi_device.u_tlul2sram_egress' of module 'tlul_adapter_sram' (SramDw=32,WidthMult=1 ('SramDw / top_pkg::TL_DW')) New
I ONE_BIT_VEC: tlul_adapter_sram.sv:421 Declaration range '[WidthMult - 1:0]' ([0:0]) of 'wmask_intg' has a length of one, instance 'spi_device.u_tlul2sram_egress' of module 'tlul_adapter_sram' (DataIntgWidth=7,SramDw=32,WidthMult=1 ('SramDw / top_pkg::TL_DW')) New
I ONE_BIT_VEC: tlul_adapter_sram.sv:422 Declaration range '[WidthMult - 1:0]' ([0:0]) of 'wdata_intg' has a length of one, instance 'spi_device.u_tlul2sram_egress' of module 'tlul_adapter_sram' (DataIntgWidth=7,SramDw=32,WidthMult=1 ('SramDw / top_pkg::TL_DW')) New
I ONE_BIT_VEC: tlul_adapter_sram.sv:486 Declaration range '[WidthMult - 1:0]' ([0:0]) of 'rdata_reshaped' has a length of one, instance 'spi_device.u_tlul2sram_egress' of module 'tlul_adapter_sram' (DataIntgWidth=7,DataWidth=32 ('EnableDataIntgPt ? top_pkg::TL_DW + DataIntgWidth : top_pkg::TL_DW'),EnableDataIntgPt=0,SramDw=32,WidthMult=1 ('SramDw / top_pkg::TL_DW')) New
I ONE_BIT_VEC: tlul_fifo_sync.sv:23 Declaration range '[SpareReqW - 1:0]' ([0:0]) of 'spare_req_i' has a length of one, instance 'spi_device.u_reg.u_socket.gen_dfifo[0].fifo_d' of module 'tlul_fifo_sync' (SpareReqW=1) New
I ONE_BIT_VEC: tlul_fifo_sync.sv:24 Declaration range '[SpareReqW - 1:0]' ([0:0]) of 'spare_req_o' has a length of one, instance 'spi_device.u_reg.u_socket.gen_dfifo[0].fifo_d' of module 'tlul_fifo_sync' (SpareReqW=1) New
I ONE_BIT_VEC: tlul_fifo_sync.sv:25 Declaration range '[SpareRspW - 1:0]' ([0:0]) of 'spare_rsp_i' has a length of one, instance 'spi_device.u_reg.u_socket.fifo_h' of module 'tlul_fifo_sync' (SpareRspW=1) New
I ONE_BIT_VEC: tlul_fifo_sync.sv:26 Declaration range '[SpareRspW - 1:0]' ([0:0]) of 'spare_rsp_o' has a length of one, instance 'spi_device.u_reg.u_socket.fifo_h' of module 'tlul_fifo_sync' (SpareRspW=1) New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'd_sink' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_d2h_t' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_d_i' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_h_o' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_h_o_int' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_i' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_o' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_o_int' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_o_pre' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_out' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_reg_d2h' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_socket_d2h' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_sram_d2h' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_sram_egress_d2h' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_sram_i' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_sram_ingress_d2h' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_t_i' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_t_p' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_u_i' has a length of one New
I ONE_BIT_VEC: tlul_pkg.sv:111 Declaration range '[top_pkg::TL_DIW - 1:0]' ([0:0]) of 'tl_win_i' has a length of one New
I UNREACHABLE: spi_readcmd.sv:653 'main_st_d' is assigned to a non-x value within the default branch of a fully specified case statement New
I UNREACHABLE: spid_jedec.sv:187 'st_d' is assigned to a non-x value within the default branch of a fully specified case statement New
I UNREACHABLE: spid_readbuffer.sv:227 'st_d' is assigned to a non-x value within the default branch of a fully specified case statement New
I UNREACHABLE: spid_readsram.sv:184 'fifo_wdata' is assigned to a non-x value within the default branch of a fully specified case statement New
I UNREACHABLE: spid_status.sv:380 'st_d' is assigned to a non-x value within the default branch of a fully specified case statement New
I EXPLICIT_BITLEN: spi_device.sv:578 Bit length not specified for constant '8' New
I EXPLICIT_BITLEN: spi_device.sv:579 Bit length not specified for constant '8' New
I EXPLICIT_BITLEN: spi_p2s.sv:101 Bit length not specified for constant '6' New
I EXPLICIT_BITLEN: spi_p2s.sv:102 Bit length not specified for constant '2' New
I EXPLICIT_BITLEN: spi_p2s.sv:186 Bit length not specified for constant "'h7" New
I EXPLICIT_BITLEN: spi_p2s.sv:187 Bit length not specified for constant "'h3" New
I EXPLICIT_BITLEN: spi_p2s.sv:188 Bit length not specified for constant "'h1" New
I EXPLICIT_BITLEN: spi_passthrough.sv:372 Bit length not specified for constant '6' New
I EXPLICIT_BITLEN: spi_passthrough.sv:373 Bit length not specified for constant '7' New
I EXPLICIT_BITLEN: spi_passthrough.sv:466 Bit length not specified for constant '23' New
I EXPLICIT_BITLEN: spi_passthrough.sv:468 Bit length not specified for constant '31' New
I EXPLICIT_BITLEN: spi_s2p.sv:81 Bit length not specified for constant "'h1" New
I EXPLICIT_BITLEN: spi_s2p.sv:82 Bit length not specified for constant "'h2" New
I EXPLICIT_BITLEN: spi_s2p.sv:83 Bit length not specified for constant "'h4" New
I EXPLICIT_BITLEN: spi_s2p.sv:93 Bit length not specified for constant "'h1" New
I EXPLICIT_BITLEN: spi_s2p.sv:94 Bit length not specified for constant "'h3" New
I EXPLICIT_BITLEN: spid_fifo2sram_adapter.sv:102 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: spid_readbuffer.sv:131 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: spid_readbuffer.sv:133 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: spid_upload.sv:353 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: spid_upload.sv:357 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: prim_fifo_async_sram_adapter.sv:123 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: prim_fifo_async_sram_adapter.sv:165 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: prim_fifo_async_sram_adapter.sv:207 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: prim_fifo_sync_cnt.sv:51 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: prim_fifo_sync_cnt.sv:52 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: prim_util_pkg.sv:85 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: tlul_sram_byte.sv:291 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: tlul_sram_byte.sv:324 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: tlul_sram_byte.sv:389 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: tlul_sram_byte.sv:453 Bit length not specified for constant '1' New
I EXPLICIT_BITLEN: tlul_err.sv:69 Bit length not specified for constant "'h1" New
I EXPLICIT_BITLEN: tlul_err.sv:77 Bit length not specified for constant "'h2" New
I INSIDE_OP_CONTEXT: tlul_adapter_sram.sv:394 'inside' operator is not within an always block or subprogram New
I MIN_NAME_LEN: spi_cmdparse.sv:91 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_cmdparse.sv:186 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_cmdparse.sv:209 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_cmdparse.sv:241 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device.sv:569 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device.sv:583 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device.sv:603 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device.sv:818 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device.sv:1704 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device.sv:1712 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_passthrough.sv:402 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_tpm.sv:532 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_tpm.sv:783 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_tpm.sv:939 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: spid_fifo2sram_adapter.sv:78 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: spid_status.sv:338 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_pkg.sv:30 Name 's' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_pkg.sv:36 Name 's' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_pkg.sv:479 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_pkg.sv:489 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:44 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:47 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:50 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:53 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:56 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:59 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:62 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:65 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:71 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:74 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:77 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:80 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:83 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:86 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:89 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:92 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:98 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:102 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:106 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:110 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:114 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:118 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:122 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:126 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:132 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:138 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:141 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:144 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:150 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:153 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:156 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:162 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:165 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:168 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:171 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:177 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:184 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:188 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:192 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:199 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:202 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:208 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:211 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:216 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:220 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:225 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:229 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:233 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:237 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:243 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:248 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:252 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:256 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:260 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:264 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:269 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:272 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:275 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:278 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:281 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:284 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:287 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:290 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:293 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:296 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:299 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:302 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:305 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:311 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:314 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:320 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:323 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:329 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:332 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:338 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:341 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:347 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:350 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:353 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:356 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:359 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:365 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:371 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:375 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:379 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:383 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:387 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:391 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:396 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:399 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:404 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:409 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:414 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:421 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:427 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:431 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:435 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:439 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:443 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:447 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:451 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:455 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:462 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:466 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:473 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:476 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:482 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:485 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:490 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:495 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:498 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:501 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:507 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:511 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:515 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:519 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:526 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:530 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:537 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:540 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:543 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:546 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:551 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:556 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:560 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:564 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:568 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:575 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:578 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:581 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:587 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: spi_device_reg_pkg.sv:590 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_sram_arbiter.sv:15 Name 'N' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_sram_arbiter.sv:77 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_arbiter_ppc.sv:28 Name 'N' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_arbiter_ppc.sv:83 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_arbiter_ppc.sv:110 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_arbiter_ppc.sv:125 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_fifo_async.sv:252 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_fifo_async_sram_adapter.sv:369 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_generic_ram_2p.sv:78 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_generic_ram_2p.sv:93 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:80 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:80 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:85 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:106 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:106 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:111 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:124 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:124 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:131 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:131 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:212 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:212 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:217 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:238 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:238 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:243 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:256 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:256 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:263 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:263 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:344 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:344 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:349 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:370 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:370 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:375 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:388 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:388 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:395 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:395 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:476 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:476 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:481 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:502 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:502 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:507 Name 'k' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:520 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:520 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:527 Name 'a' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_mubi_pkg.sv:527 Name 'b' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_ram_2p_async_adv.sv:235 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_subreg.sv:25 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_subreg.sv:29 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_subreg_arb.sv:21 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_subreg_arb.sv:24 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_subreg_ext.sv:14 Name 'd' is shorter than minimum length 2 New
I MIN_NAME_LEN: prim_subreg_ext.sv:19 Name 'q' is shorter than minimum length 2 New
I MIN_NAME_LEN: tlul_adapter_sram.sv:429 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: tlul_adapter_sram.sv:522 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: tlul_sram_byte.sv:547 Name 'i' is shorter than minimum length 2 New
I MIN_NAME_LEN: tlul_socket_1n.sv:45 Name 'N' is shorter than minimum length 2 New
I STRING_VAL: prim_util_memload.svh:64 Parameter 'MemInitFile' with string value "" used as a constant, instance 'spi_device.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.gen_generic.u_impl_generic' of module 'prim_generic_ram_2p' (MemInitFile="") New
I STRING_VAL: prim_util_memload.svh:64 String value "" used as a constant New
I CONST_OUTPUT: spi_cmdparse.sv:83 Output 'io_mode_o' is driven by constant zeros New
I CONST_OUTPUT: spi_cmdparse.sv:84 Output 'cmd_config_req_o' is driven by constant zero New
I CONST_OUTPUT: spi_cmdparse.sv:156 Output 'sel_dp_o[9:5]' is driven by constant zeros New
I CONST_OUTPUT: spi_cmdparse.sv:160 Output 'cmd_only_sel_dp_o[3:0]' is driven by constant zeros New
I CONST_OUTPUT: spi_cmdparse.sv:160 Output 'cmd_only_sel_dp_o[9]' is driven by constant zero New
I CONST_OUTPUT: spi_device.sv:1464 Output 'passthrough_o.csb_en' is driven by constant one by port 'u_passthrough.passthrough_o.csb_en' New
I CONST_OUTPUT: spi_device.sv:1464 Output 'passthrough_o.sck_en' is driven by constant one by port 'u_passthrough.passthrough_o.sck_en' New
I CONST_OUTPUT: spi_passthrough.sv:729 Output 'passthrough_o.sck_en' is driven by constant one New
I CONST_OUTPUT: spi_passthrough.sv:733 Output 'passthrough_o.csb_en' is driven by constant one New
I CONST_OUTPUT: spi_readcmd.sv:728 Output 'sram_l2m_o.wdata' is driven by constant zeros by port 'u_readsram.sram_l2m_o.wdata' New
I CONST_OUTPUT: spi_readcmd.sv:728 Output 'sram_l2m_o.we' is driven by constant zero by port 'u_readsram.sram_l2m_o.we' New
I CONST_OUTPUT: spi_readcmd.sv:728 Output 'sram_l2m_o.wstrb' is driven by constant zeros by port 'u_readsram.sram_l2m_o.wstrb' New
I CONST_OUTPUT: spi_tpm.sv:135 Output 'tpm_cap_o.locality' is driven by constant one New
I CONST_OUTPUT: spi_tpm.sv:135 Output 'tpm_cap_o.max_rd_size' is driven by constant 3'b110 New
I CONST_OUTPUT: spi_tpm.sv:135 Output 'tpm_cap_o.max_wr_size' is driven by constant 3'b110 New
I CONST_OUTPUT: spi_tpm.sv:135 Output 'tpm_cap_o.rev' is driven by constant zeros New
I CONST_OUTPUT: spi_tpm.sv:1431 Output 'sys_sram_o.we' is driven by constant one by port 'u_tpm_rd_buffer.sram_write_o' New
I CONST_OUTPUT: spid_dpram.sv:126 Output 'spi_rerror_o[0]' is driven by constant zero by port 'gen_ram2p.u_memory_2p.b_rerror_o[0]' in module 'spid_dpram' (EnableParity=1) New
I CONST_OUTPUT: spid_dpram.sv:126 Output 'sys_rerror_o[0]' is driven by constant zero by port 'gen_ram2p.u_memory_2p.a_rerror_o[0]' in module 'spid_dpram' (EnableParity=1) New
I CONST_OUTPUT: spid_fifo2sram_adapter.sv:59 Output 'sram_write_o' is driven by constant one in module 'spid_fifo2sram_adapter' (SramBaseAddr=10'h380) New
I CONST_OUTPUT: spid_fifo2sram_adapter.sv:89 Output 'sram_wmask_o' is driven by constant ones in module 'spid_fifo2sram_adapter' (FifoWidth=32'h20,FifoDepth=32'h10,SramBaseAddr=10'h340) New
I CONST_OUTPUT: spid_jedec.sv:53 Output 'io_mode_o' is driven by constant zeros New
I CONST_OUTPUT: spid_readsram.sv:124 Output 'sram_l2m_o.we' is driven by constant zero New
I CONST_OUTPUT: spid_readsram.sv:125 Output 'sram_l2m_o.wdata' is driven by constant zeros New
I CONST_OUTPUT: spid_readsram.sv:126 Output 'sram_l2m_o.wstrb' is driven by constant zeros New
I CONST_OUTPUT: spid_status.sv:96 Output 'io_mode_o' is driven by constant zeros New
I CONST_OUTPUT: spid_upload.sv:130 Output 'io_mode_o' is driven by constant zeros in module 'spid_upload' (SpiByte=32'h8) New
I CONST_OUTPUT: spid_upload.sv:139 Output 'p2s_valid_o' is driven by constant zero in module 'spid_upload' (SpiByte=32'h8) New
I CONST_OUTPUT: spid_upload.sv:140 Output 'p2s_data_o' is driven by constant zeros in module 'spid_upload' (SpiByte=32'h8) New
I CONST_OUTPUT: prim_intr_hw.sv:80 Output 'hw2reg_intr_state_de_o' is driven by constant one in module 'prim_intr_hw' (IntrT="Status") New
I CONST_OUTPUT: prim_fifo_async_sram_adapter.sv:253 Output 'w_sram_write_o' is driven by constant one in module 'prim_fifo_async_sram_adapter' (Width=32'h10,SramAw=32'ha,SramBaseAddr=10'h3c0) New
I CONST_OUTPUT: prim_fifo_async_sram_adapter.sv:256 Output 'w_sram_wdata_o[31:16]' is driven by constant zeros in module 'prim_fifo_async_sram_adapter' (Width=32'h10,SramAw=32'ha,SramBaseAddr=10'h3c0) New
I CONST_OUTPUT: prim_fifo_async_sram_adapter.sv:257 Output 'w_sram_wmask_o' is driven by constant 32'h0000FFFF in module 'prim_fifo_async_sram_adapter' (Width=32'h10,SramAw=32'ha,SramBaseAddr=10'h3c0) New
I CONST_OUTPUT: prim_fifo_async_sram_adapter.sv:257 Output 'w_sram_wmask_o' is driven by constant ones in module 'prim_fifo_async_sram_adapter' (SramAw=32'ha,SramBaseAddr=10'h3d0) New
I CONST_OUTPUT: prim_fifo_async_sram_adapter.sv:292 Output 'r_sram_write_o' is driven by constant zero in module 'prim_fifo_async_sram_adapter' (Width=32'h10,SramAw=32'ha,SramBaseAddr=10'h3c0) New
I CONST_OUTPUT: prim_fifo_async_sram_adapter.sv:293 Output 'r_sram_wdata_o' is driven by constant zeros in module 'prim_fifo_async_sram_adapter' (Width=32'h10,SramAw=32'ha,SramBaseAddr=10'h3c0) New
I CONST_OUTPUT: prim_fifo_async_sram_adapter.sv:294 Output 'r_sram_wmask_o' is driven by constant zeros in module 'prim_fifo_async_sram_adapter' (Width=32'h10,SramAw=32'ha,SramBaseAddr=10'h3c0) New
I CONST_OUTPUT: prim_fifo_sync.sv:41 Output 'depth_o' is driven by constant zero in module 'prim_fifo_sync' (Width=32'h6d,Depth=32'h0) New
I CONST_OUTPUT: prim_fifo_sync.sv:56 Output 'err_o' is driven by constant zero in module 'prim_fifo_sync' (Width=32'h6d,Depth=32'h0) New
I CONST_OUTPUT: prim_fifo_sync.sv:98 Output 'err_o' is driven by constant zero by port 'gen_normal_fifo.u_fifo_cnt.err_o' in module 'prim_fifo_sync' (Width=32'h20,Depth=1,OutputZeroIfEmpty=1'h0) New
I CONST_OUTPUT: prim_fifo_sync_cnt.sv:136 Output 'err_o' is driven by constant zero New
I CONST_OUTPUT: prim_fifo_sync_cnt.sv:136 Output 'err_o' is driven by constant zero in module 'prim_fifo_sync_cnt' (Depth=32'h1) New
I CONST_OUTPUT: prim_ram_2p_async_adv.sv:155 Output 'a_rerror_o[0]' is driven by constant zero in module 'prim_ram_2p_async_adv' (Depth=32'h400,Width=32'h20,DataBitsPerMask=8,EnableParity=1) New
I CONST_OUTPUT: prim_ram_2p_async_adv.sv:162 Output 'b_rerror_o[0]' is driven by constant zero in module 'prim_ram_2p_async_adv' (Depth=32'h400,Width=32'h20,DataBitsPerMask=8,EnableParity=1) New
I CONST_OUTPUT: tlul_adapter_reg.sv:91 Output 'addr_o[1:0]' is driven by constant zeros in module 'tlul_adapter_reg' (RegAw=13) New
I CONST_OUTPUT: tlul_adapter_reg.sv:195 Output 'intg_error_o' is driven by constant zero in module 'tlul_adapter_reg' (RegAw=13) New
I CONST_OUTPUT: tlul_adapter_sram.sv:114 Output 'readback_error_o' is driven by constant zero in module 'tlul_adapter_sram' (SramAw=32'ha,SramDw=32'h20,ByteAccess=0,ErrOnRead=1) New
I CONST_OUTPUT: tlul_adapter_sram.sv:199 Output 'compound_txn_in_progress_o' is driven by constant zero by port 'u_sram_byte.compound_txn_in_progress_o' in module 'tlul_adapter_sram' (SramAw=32'ha,SramDw=32'h20,ByteAccess=0,ErrOnRead=1) New
I CONST_OUTPUT: tlul_sram_byte.sv:699 Output 'alert_o' is driven by constant zero New
I CONST_OUTPUT: tlul_sram_byte.sv:700 Output 'compound_txn_in_progress_o' is driven by constant zero New
Lint Warnings
W LINE_LENGTH: tlul_adapter_sram.sv:506 Line length of 101 exceeds 100 character limit New
W STAR_PORT_CONN_USE: prim_flop_2sync.sv:35 '.*' wild card port connection encountered on instance 'gen_generic.u_impl_generic' New
Lint Errors
E IFDEF_CODE: prim_generic_flop_2sync.sv:35 Assignment to 'unused_sig' contained within `else block at prim_generic_flop_2sync.sv:33 prim_generic_flop_2sync.sv:33 New
E NOT_READ: tlul_adapter_sram.sv:267 Signal 'sramreqaddrfifo_wdata' is not read from, instance 'spi_device.u_tlul2sram_egress' of module 'tlul_adapter_sram' (SramAw=10,SramDw=32,ByteAccess=0,ErrOnRead=1) New
E NOT_USED: tlul_adapter_sram.sv:267 Signal 'sramreqaddrfifo_rdata' is not used, instance 'spi_device.u_tlul2sram_egress' of module 'tlul_adapter_sram' (SramAw=10,SramDw=32,ByteAccess=0,ErrOnRead=1) New
Past Results