Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
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Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 66 0 66 100.00
Crosses 128 0 128 100.00


Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_filtered 2 0 2 100.00 100 1 1 2
cp_opcode 64 0 64 100.00 100 1 1 64


Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cr_all 128 0 128 100.00 100 1 1 0


Summary for Variable cp_filtered

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_filtered

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1832 1 T3 15 T5 5 T8 2
auto[1] 2358 1 T3 15 T4 7 T5 5



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 64 0 64 100.00


Automatically Generated Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:3] 345 1 T4 4 T10 4 T11 5
auto[4:7] 272 1 T8 2 T20 2 T70 2
auto[8:11] 346 1 T5 2 T10 3 T11 4
auto[12:15] 10 1 T199 2 T341 4 T285 2
auto[16:19] 26 1 T68 2 T294 4 T256 4
auto[20:23] 270 1 T3 4 T52 2 T119 8
auto[24:27] 16 1 T183 4 T6 2 T277 2
auto[28:31] 20 1 T194 2 T273 4 T236 4
auto[32:35] 20 1 T253 6 T260 6 T88 2
auto[36:39] 22 1 T60 2 T192 2 T85 6
auto[40:43] 18 1 T184 2 T228 2 T260 2
auto[44:47] 26 1 T194 2 T73 4 T72 10
auto[48:51] 20 1 T257 6 T85 2 T229 2
auto[52:55] 222 1 T3 6 T52 4 T20 2
auto[56:59] 276 1 T11 7 T12 6 T20 2
auto[60:63] 16 1 T273 2 T83 2 T203 2
auto[64:67] 10 1 T283 2 T292 6 T374 2
auto[68:71] 32 1 T73 2 T282 2 T83 4
auto[72:75] 28 1 T194 2 T73 2 T223 2
auto[76:79] 20 1 T265 2 T210 2 T292 4
auto[80:83] 26 1 T184 2 T194 2 T287 4
auto[84:87] 10 1 T3 4 T199 2 T219 2
auto[88:91] 244 1 T52 4 T60 2 T70 4
auto[92:95] 24 1 T70 2 T184 2 T273 4
auto[96:99] 26 1 T273 2 T186 2 T207 6
auto[100:103] 28 1 T94 4 T71 2 T75 4
auto[104:107] 204 1 T4 3 T5 2 T12 6
auto[108:111] 30 1 T68 2 T74 2 T223 2
auto[112:115] 18 1 T282 2 T76 4 T254 4
auto[116:119] 30 1 T184 2 T75 4 T232 2
auto[120:123] 16 1 T253 6 T232 2 T283 2
auto[124:127] 22 1 T94 4 T223 2 T186 2
auto[128:131] 36 1 T51 2 T73 4 T273 4
auto[132:135] 22 1 T3 2 T94 6 T72 4
auto[136:139] 36 1 T69 4 T74 2 T223 2
auto[140:143] 18 1 T256 4 T209 2 T201 2
auto[144:147] 38 1 T68 6 T185 4 T72 4
auto[148:151] 18 1 T182 2 T94 2 T74 4
auto[152:155] 10 1 T256 2 T250 2 T330 2
auto[156:159] 198 1 T8 2 T52 2 T68 6
auto[160:163] 30 1 T68 4 T74 6 T223 2
auto[164:167] 16 1 T194 2 T76 4 T191 2
auto[168:171] 26 1 T69 2 T73 2 T256 4
auto[172:175] 10 1 T207 4 T7 2 T259 4
auto[176:179] 30 1 T69 4 T186 2 T207 8
auto[180:183] 106 1 T29 12 T71 2 T282 6
auto[184:187] 281 1 T11 7 T69 2 T94 2
auto[188:191] 20 1 T80 2 T242 2 T255 6
auto[192:195] 6 1 T78 2 T254 2 T268 2
auto[196:199] 26 1 T3 4 T185 2 T228 2
auto[200:203] 12 1 T218 2 T236 2 T296 8
auto[204:207] 36 1 T3 6 T68 8 T75 6
auto[208:211] 26 1 T282 2 T224 2 T299 8
auto[212:215] 26 1 T69 4 T77 2 T82 2
auto[216:219] 18 1 T77 2 T238 6 T85 6
auto[220:223] 6 1 T187 2 T219 2 T359 2
auto[224:227] 10 1 T70 4 T210 4 T204 2
auto[228:231] 10 1 T6 2 T350 6 T215 2
auto[232:235] 376 1 T3 4 T5 6 T9 4
auto[236:239] 6 1 T248 2 T341 2 T375 2
auto[240:243] 8 1 T282 2 T187 2 T218 2
auto[244:247] 8 1 T236 2 T245 2 T86 2
auto[248:251] 4 1 T79 2 T339 2 - -
auto[252:255] 24 1 T81 2 T83 2 T85 6



Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 128 0 128 100.00


Automatically Generated Cross Bins for cr_all

Bins
cp_opcodecp_filteredCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:3] auto[0] 119 1 T12 4 T79 1 T94 1
auto[0:3] auto[1] 226 1 T4 4 T10 4 T11 5
auto[4:7] auto[0] 136 1 T8 1 T20 1 T70 1
auto[4:7] auto[1] 136 1 T8 1 T20 1 T70 1
auto[8:11] auto[0] 123 1 T5 1 T12 3 T92 2
auto[8:11] auto[1] 223 1 T5 1 T10 3 T11 4
auto[12:15] auto[0] 5 1 T199 1 T341 2 T285 1
auto[12:15] auto[1] 5 1 T199 1 T341 2 T285 1
auto[16:19] auto[0] 13 1 T68 1 T294 2 T256 2
auto[16:19] auto[1] 13 1 T68 1 T294 2 T256 2
auto[20:23] auto[0] 135 1 T3 2 T52 1 T119 4
auto[20:23] auto[1] 135 1 T3 2 T52 1 T119 4
auto[24:27] auto[0] 8 1 T183 2 T6 1 T277 1
auto[24:27] auto[1] 8 1 T183 2 T6 1 T277 1
auto[28:31] auto[0] 10 1 T194 1 T273 2 T236 2
auto[28:31] auto[1] 10 1 T194 1 T273 2 T236 2
auto[32:35] auto[0] 10 1 T253 3 T260 3 T88 1
auto[32:35] auto[1] 10 1 T253 3 T260 3 T88 1
auto[36:39] auto[0] 11 1 T60 1 T192 1 T85 3
auto[36:39] auto[1] 11 1 T60 1 T192 1 T85 3
auto[40:43] auto[0] 9 1 T184 1 T228 1 T260 1
auto[40:43] auto[1] 9 1 T184 1 T228 1 T260 1
auto[44:47] auto[0] 13 1 T194 1 T73 2 T72 5
auto[44:47] auto[1] 13 1 T194 1 T73 2 T72 5
auto[48:51] auto[0] 10 1 T257 3 T85 1 T229 1
auto[48:51] auto[1] 10 1 T257 3 T85 1 T229 1
auto[52:55] auto[0] 111 1 T3 3 T52 2 T20 1
auto[52:55] auto[1] 111 1 T3 3 T52 2 T20 1
auto[56:59] auto[0] 103 1 T12 3 T20 1 T68 1
auto[56:59] auto[1] 173 1 T11 7 T12 3 T20 1
auto[60:63] auto[0] 8 1 T273 1 T83 1 T203 1
auto[60:63] auto[1] 8 1 T273 1 T83 1 T203 1
auto[64:67] auto[0] 5 1 T283 1 T292 3 T374 1
auto[64:67] auto[1] 5 1 T283 1 T292 3 T374 1
auto[68:71] auto[0] 16 1 T73 1 T282 1 T83 2
auto[68:71] auto[1] 16 1 T73 1 T282 1 T83 2
auto[72:75] auto[0] 14 1 T194 1 T73 1 T223 1
auto[72:75] auto[1] 14 1 T194 1 T73 1 T223 1
auto[76:79] auto[0] 10 1 T265 1 T210 1 T292 2
auto[76:79] auto[1] 10 1 T265 1 T210 1 T292 2
auto[80:83] auto[0] 13 1 T184 1 T194 1 T287 2
auto[80:83] auto[1] 13 1 T184 1 T194 1 T287 2
auto[84:87] auto[0] 5 1 T3 2 T199 1 T219 1
auto[84:87] auto[1] 5 1 T3 2 T199 1 T219 1
auto[88:91] auto[0] 122 1 T52 2 T60 1 T70 2
auto[88:91] auto[1] 122 1 T52 2 T60 1 T70 2
auto[92:95] auto[0] 12 1 T70 1 T184 1 T273 2
auto[92:95] auto[1] 12 1 T70 1 T184 1 T273 2
auto[96:99] auto[0] 13 1 T273 1 T186 1 T207 3
auto[96:99] auto[1] 13 1 T273 1 T186 1 T207 3
auto[100:103] auto[0] 14 1 T94 2 T71 1 T75 2
auto[100:103] auto[1] 14 1 T94 2 T71 1 T75 2
auto[104:107] auto[0] 65 1 T5 1 T12 3 T92 2
auto[104:107] auto[1] 139 1 T4 3 T5 1 T12 3
auto[108:111] auto[0] 15 1 T68 1 T74 1 T223 1
auto[108:111] auto[1] 15 1 T68 1 T74 1 T223 1
auto[112:115] auto[0] 9 1 T282 1 T76 2 T254 2
auto[112:115] auto[1] 9 1 T282 1 T76 2 T254 2
auto[116:119] auto[0] 15 1 T184 1 T75 2 T232 1
auto[116:119] auto[1] 15 1 T184 1 T75 2 T232 1
auto[120:123] auto[0] 8 1 T253 3 T232 1 T283 1
auto[120:123] auto[1] 8 1 T253 3 T232 1 T283 1
auto[124:127] auto[0] 11 1 T94 2 T223 1 T186 1
auto[124:127] auto[1] 11 1 T94 2 T223 1 T186 1
auto[128:131] auto[0] 18 1 T51 1 T73 2 T273 2
auto[128:131] auto[1] 18 1 T51 1 T73 2 T273 2
auto[132:135] auto[0] 11 1 T3 1 T94 3 T72 2
auto[132:135] auto[1] 11 1 T3 1 T94 3 T72 2
auto[136:139] auto[0] 18 1 T69 2 T74 1 T223 1
auto[136:139] auto[1] 18 1 T69 2 T74 1 T223 1
auto[140:143] auto[0] 9 1 T256 2 T209 1 T201 1
auto[140:143] auto[1] 9 1 T256 2 T209 1 T201 1
auto[144:147] auto[0] 19 1 T68 3 T185 2 T72 2
auto[144:147] auto[1] 19 1 T68 3 T185 2 T72 2
auto[148:151] auto[0] 9 1 T182 1 T94 1 T74 2
auto[148:151] auto[1] 9 1 T182 1 T94 1 T74 2
auto[152:155] auto[0] 5 1 T256 1 T250 1 T330 1
auto[152:155] auto[1] 5 1 T256 1 T250 1 T330 1
auto[156:159] auto[0] 99 1 T8 1 T52 1 T68 3
auto[156:159] auto[1] 99 1 T8 1 T52 1 T68 3
auto[160:163] auto[0] 15 1 T68 2 T74 3 T223 1
auto[160:163] auto[1] 15 1 T68 2 T74 3 T223 1
auto[164:167] auto[0] 8 1 T194 1 T76 2 T191 1
auto[164:167] auto[1] 8 1 T194 1 T76 2 T191 1
auto[168:171] auto[0] 13 1 T69 1 T73 1 T256 2
auto[168:171] auto[1] 13 1 T69 1 T73 1 T256 2
auto[172:175] auto[0] 5 1 T207 2 T7 1 T259 2
auto[172:175] auto[1] 5 1 T207 2 T7 1 T259 2
auto[176:179] auto[0] 15 1 T69 2 T186 1 T207 4
auto[176:179] auto[1] 15 1 T69 2 T186 1 T207 4
auto[180:183] auto[0] 53 1 T29 6 T71 1 T282 3
auto[180:183] auto[1] 53 1 T29 6 T71 1 T282 3
auto[184:187] auto[0] 102 1 T69 1 T94 1 T185 2
auto[184:187] auto[1] 179 1 T11 7 T69 1 T94 1
auto[188:191] auto[0] 10 1 T80 1 T242 1 T255 3
auto[188:191] auto[1] 10 1 T80 1 T242 1 T255 3
auto[192:195] auto[0] 3 1 T78 1 T254 1 T268 1
auto[192:195] auto[1] 3 1 T78 1 T254 1 T268 1
auto[196:199] auto[0] 13 1 T3 2 T185 1 T228 1
auto[196:199] auto[1] 13 1 T3 2 T185 1 T228 1
auto[200:203] auto[0] 6 1 T218 1 T236 1 T296 4
auto[200:203] auto[1] 6 1 T218 1 T236 1 T296 4
auto[204:207] auto[0] 18 1 T3 3 T68 4 T75 3
auto[204:207] auto[1] 18 1 T3 3 T68 4 T75 3
auto[208:211] auto[0] 13 1 T282 1 T224 1 T299 4
auto[208:211] auto[1] 13 1 T282 1 T224 1 T299 4
auto[212:215] auto[0] 13 1 T69 2 T77 1 T82 1
auto[212:215] auto[1] 13 1 T69 2 T77 1 T82 1
auto[216:219] auto[0] 9 1 T77 1 T238 3 T85 3
auto[216:219] auto[1] 9 1 T77 1 T238 3 T85 3
auto[220:223] auto[0] 3 1 T187 1 T219 1 T359 1
auto[220:223] auto[1] 3 1 T187 1 T219 1 T359 1
auto[224:227] auto[0] 5 1 T70 2 T210 2 T204 1
auto[224:227] auto[1] 5 1 T70 2 T210 2 T204 1
auto[228:231] auto[0] 5 1 T6 1 T350 3 T215 1
auto[228:231] auto[1] 5 1 T6 1 T350 3 T215 1
auto[232:235] auto[0] 139 1 T3 2 T5 3 T9 2
auto[232:235] auto[1] 237 1 T3 2 T5 3 T9 2
auto[236:239] auto[0] 3 1 T248 1 T341 1 T375 1
auto[236:239] auto[1] 3 1 T248 1 T341 1 T375 1
auto[240:243] auto[0] 4 1 T282 1 T187 1 T218 1
auto[240:243] auto[1] 4 1 T282 1 T187 1 T218 1
auto[244:247] auto[0] 4 1 T236 1 T245 1 T86 1
auto[244:247] auto[1] 4 1 T236 1 T245 1 T86 1
auto[248:251] auto[0] 2 1 T79 1 T339 1 - -
auto[248:251] auto[1] 2 1 T79 1 T339 1 - -
auto[252:255] auto[0] 12 1 T81 1 T83 1 T85 3
auto[252:255] auto[1] 12 1 T81 1 T83 1 T85 3

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