Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

1685

1

T7

12

T5

2

T9

1

auto[1]

2168

1

T7

12

T5

2

T9

1

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	297	1			T6	6		T10	2		T179	4
auto[4:7]	248	1			T7	12		T82	4		T43	2
auto[8:11]	290	1			T42	2		T179	8		T55	2
auto[12:15]	12	1			T101	2		T336	2		T190	2
auto[16:19]	30	1			T75	2		T82	2		T73	6
auto[20:23]	184	1			T7	8		T68	2		T75	2
auto[24:27]	32	1			T101	4		T223	2		T190	2
auto[28:31]	18	1			T5	2		T286	6		T195	2
auto[32:35]	12	1			T75	4		T101	2		T254	2
auto[36:39]	14	1			T188	6		T189	4		T338	4
auto[40:43]	22	1			T13	2		T68	2		T242	6
auto[44:47]	18	1			T82	2		T174	2		T177	2
auto[48:51]	22	1			T75	8		T179	2		T72	4
auto[52:55]	204	1			T7	2		T42	2		T43	4
auto[56:59]	323	1			T6	6		T68	4		T69	2
auto[60:63]	28	1			T13	2		T68	2		T265	6
auto[64:67]	22	1			T27	2		T252	4		T278	4
auto[68:71]	30	1			T11	2		T43	2		T220	4
auto[72:75]	12	1			T26	2		T220	2		T77	2
auto[76:79]	24	1			T13	2		T77	4		T286	6
auto[80:83]	20	1			T95	2		T235	2		T190	4
auto[84:87]	18	1			T158	2		T265	2		T228	4
auto[88:91]	160	1			T43	2		T45	4		T101	10
auto[92:95]	22	1			T193	6		T246	2		T349	2
auto[96:99]	22	1			T82	2		T178	2		T199	2
auto[100:103]	6	1			T72	2		T199	2		T369	2
auto[104:107]	315	1			T6	8		T13	2		T75	2
auto[108:111]	18	1			T11	4		T58	2		T27	4
auto[112:115]	28	1			T10	2		T58	2		T101	4
auto[116:119]	18	1			T201	4		T275	2		T206	4
auto[120:123]	20	1			T237	2		T265	4		T262	2
auto[124:127]	20	1			T179	2		T92	4		T235	4
auto[128:131]	54	1			T179	4		T101	6		T92	2
auto[132:135]	30	1			T178	4		T28	2		T223	2
auto[136:139]	16	1			T76	2		T342	4		T88	2
auto[140:143]	10	1			T95	2		T192	2		T218	2
auto[144:147]	20	1			T92	2		T174	4		T305	2
auto[148:151]	6	1			T214	2		T216	2		T203	2
auto[152:155]	30	1			T11	6		T28	2		T29	2
auto[156:159]	180	1			T7	2		T11	2		T42	4
auto[160:163]	24	1			T13	6		T74	2		T178	4
auto[164:167]	2	1			T85	2		-	-		-	-
auto[168:171]	16	1			T26	4		T235	4		T88	2
auto[172:175]	26	1			T101	2		T220	4		T178	2
auto[176:179]	8	1			T11	2		T26	2		T27	2
auto[180:183]	76	1			T9	2		T26	2		T27	4
auto[184:187]	271	1			T10	2		T68	2		T82	6
auto[188:191]	26	1			T228	4		T245	2		T182	4
auto[192:195]	22	1			T72	2		T200	2		T175	6
auto[196:199]	18	1			T10	2		T201	4		T370	2
auto[200:203]	10	1			T101	4		T72	2		T87	2
auto[204:207]	28	1			T178	8		T78	2		T81	2
auto[208:211]	16	1			T220	2		T210	2		T189	2
auto[212:215]	12	1			T178	2		T265	2		T194	2
auto[216:219]	10	1			T220	2		T235	2		T80	2
auto[220:223]	24	1			T251	4		T217	4		T86	2
auto[224:227]	14	1			T79	2		T233	4		T282	4
auto[228:231]	26	1			T235	6		T226	2		T199	2
auto[232:235]	319	1			T5	2		T11	2		T13	2
auto[236:239]	14	1			T82	2		T95	2		T207	6
auto[240:243]	14	1			T72	4		T73	4		T188	4
auto[244:247]	8	1			T220	2		T251	2		T369	2
auto[248:251]	6	1			T72	2		T235	2		T251	2
auto[252:255]	8	1			T286	2		T79	2		T322	2

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	107	1			T6	3		T10	1		T179	2
auto[0:3]	auto[1]	190	1			T6	3		T10	1		T179	2
auto[4:7]	auto[0]	124	1			T7	6		T82	2		T43	1
auto[4:7]	auto[1]	124	1			T7	6		T82	2		T43	1
auto[8:11]	auto[0]	100	1			T42	1		T179	4		T55	1
auto[8:11]	auto[1]	190	1			T42	1		T179	4		T55	1
auto[12:15]	auto[0]	6	1			T101	1		T336	1		T190	1
auto[12:15]	auto[1]	6	1			T101	1		T336	1		T190	1
auto[16:19]	auto[0]	15	1			T75	1		T82	1		T73	3
auto[16:19]	auto[1]	15	1			T75	1		T82	1		T73	3
auto[20:23]	auto[0]	92	1			T7	4		T68	1		T75	1
auto[20:23]	auto[1]	92	1			T7	4		T68	1		T75	1
auto[24:27]	auto[0]	16	1			T101	2		T223	1		T190	1
auto[24:27]	auto[1]	16	1			T101	2		T223	1		T190	1
auto[28:31]	auto[0]	9	1			T5	1		T286	3		T195	1
auto[28:31]	auto[1]	9	1			T5	1		T286	3		T195	1
auto[32:35]	auto[0]	6	1			T75	2		T101	1		T254	1
auto[32:35]	auto[1]	6	1			T75	2		T101	1		T254	1
auto[36:39]	auto[0]	7	1			T188	3		T189	2		T338	2
auto[36:39]	auto[1]	7	1			T188	3		T189	2		T338	2
auto[40:43]	auto[0]	11	1			T13	1		T68	1		T242	3
auto[40:43]	auto[1]	11	1			T13	1		T68	1		T242	3
auto[44:47]	auto[0]	9	1			T82	1		T174	1		T177	1
auto[44:47]	auto[1]	9	1			T82	1		T174	1		T177	1
auto[48:51]	auto[0]	11	1			T75	4		T179	1		T72	2
auto[48:51]	auto[1]	11	1			T75	4		T179	1		T72	2
auto[52:55]	auto[0]	102	1			T7	1		T42	1		T43	2
auto[52:55]	auto[1]	102	1			T7	1		T42	1		T43	2
auto[56:59]	auto[0]	103	1			T6	3		T68	2		T55	4
auto[56:59]	auto[1]	220	1			T6	3		T68	2		T69	2
auto[60:63]	auto[0]	14	1			T13	1		T68	1		T265	3
auto[60:63]	auto[1]	14	1			T13	1		T68	1		T265	3
auto[64:67]	auto[0]	11	1			T27	1		T252	2		T278	2
auto[64:67]	auto[1]	11	1			T27	1		T252	2		T278	2
auto[68:71]	auto[0]	15	1			T11	1		T43	1		T220	2
auto[68:71]	auto[1]	15	1			T11	1		T43	1		T220	2
auto[72:75]	auto[0]	6	1			T26	1		T220	1		T77	1
auto[72:75]	auto[1]	6	1			T26	1		T220	1		T77	1
auto[76:79]	auto[0]	12	1			T13	1		T77	2		T286	3
auto[76:79]	auto[1]	12	1			T13	1		T77	2		T286	3
auto[80:83]	auto[0]	10	1			T95	1		T235	1		T190	2
auto[80:83]	auto[1]	10	1			T95	1		T235	1		T190	2
auto[84:87]	auto[0]	9	1			T158	1		T265	1		T228	2
auto[84:87]	auto[1]	9	1			T158	1		T265	1		T228	2
auto[88:91]	auto[0]	80	1			T43	1		T45	2		T101	5
auto[88:91]	auto[1]	80	1			T43	1		T45	2		T101	5
auto[92:95]	auto[0]	11	1			T193	3		T246	1		T349	1
auto[92:95]	auto[1]	11	1			T193	3		T246	1		T349	1
auto[96:99]	auto[0]	11	1			T82	1		T178	1		T199	1
auto[96:99]	auto[1]	11	1			T82	1		T178	1		T199	1
auto[100:103]	auto[0]	3	1			T72	1		T199	1		T369	1
auto[100:103]	auto[1]	3	1			T72	1		T199	1		T369	1
auto[104:107]	auto[0]	123	1			T6	4		T13	1		T75	1
auto[104:107]	auto[1]	192	1			T6	4		T13	1		T75	1
auto[108:111]	auto[0]	9	1			T11	2		T58	1		T27	2
auto[108:111]	auto[1]	9	1			T11	2		T58	1		T27	2
auto[112:115]	auto[0]	14	1			T10	1		T58	1		T101	2
auto[112:115]	auto[1]	14	1			T10	1		T58	1		T101	2
auto[116:119]	auto[0]	9	1			T201	2		T275	1		T206	2
auto[116:119]	auto[1]	9	1			T201	2		T275	1		T206	2
auto[120:123]	auto[0]	10	1			T237	1		T265	2		T262	1
auto[120:123]	auto[1]	10	1			T237	1		T265	2		T262	1
auto[124:127]	auto[0]	10	1			T179	1		T92	2		T235	2
auto[124:127]	auto[1]	10	1			T179	1		T92	2		T235	2
auto[128:131]	auto[0]	27	1			T179	2		T101	3		T92	1
auto[128:131]	auto[1]	27	1			T179	2		T101	3		T92	1
auto[132:135]	auto[0]	15	1			T178	2		T28	1		T223	1
auto[132:135]	auto[1]	15	1			T178	2		T28	1		T223	1
auto[136:139]	auto[0]	8	1			T76	1		T342	2		T88	1
auto[136:139]	auto[1]	8	1			T76	1		T342	2		T88	1
auto[140:143]	auto[0]	5	1			T95	1		T192	1		T218	1
auto[140:143]	auto[1]	5	1			T95	1		T192	1		T218	1
auto[144:147]	auto[0]	10	1			T92	1		T174	2		T305	1
auto[144:147]	auto[1]	10	1			T92	1		T174	2		T305	1
auto[148:151]	auto[0]	3	1			T214	1		T216	1		T203	1
auto[148:151]	auto[1]	3	1			T214	1		T216	1		T203	1
auto[152:155]	auto[0]	15	1			T11	3		T28	1		T29	1
auto[152:155]	auto[1]	15	1			T11	3		T28	1		T29	1
auto[156:159]	auto[0]	90	1			T7	1		T11	1		T42	2
auto[156:159]	auto[1]	90	1			T7	1		T11	1		T42	2
auto[160:163]	auto[0]	12	1			T13	3		T74	1		T178	2
auto[160:163]	auto[1]	12	1			T13	3		T74	1		T178	2
auto[164:167]	auto[0]	1	1			T85	1		-	-		-	-
auto[164:167]	auto[1]	1	1			T85	1		-	-		-	-
auto[168:171]	auto[0]	8	1			T26	2		T235	2		T88	1
auto[168:171]	auto[1]	8	1			T26	2		T235	2		T88	1
auto[172:175]	auto[0]	13	1			T101	1		T220	2		T178	1
auto[172:175]	auto[1]	13	1			T101	1		T220	2		T178	1
auto[176:179]	auto[0]	4	1			T11	1		T26	1		T27	1
auto[176:179]	auto[1]	4	1			T11	1		T26	1		T27	1
auto[180:183]	auto[0]	38	1			T9	1		T26	1		T27	2
auto[180:183]	auto[1]	38	1			T9	1		T26	1		T27	2
auto[184:187]	auto[0]	103	1			T10	1		T68	1		T82	3
auto[184:187]	auto[1]	168	1			T10	1		T68	1		T82	3
auto[188:191]	auto[0]	13	1			T228	2		T245	1		T182	2
auto[188:191]	auto[1]	13	1			T228	2		T245	1		T182	2
auto[192:195]	auto[0]	11	1			T72	1		T200	1		T175	3
auto[192:195]	auto[1]	11	1			T72	1		T200	1		T175	3
auto[196:199]	auto[0]	9	1			T10	1		T201	2		T370	1
auto[196:199]	auto[1]	9	1			T10	1		T201	2		T370	1
auto[200:203]	auto[0]	5	1			T101	2		T72	1		T87	1
auto[200:203]	auto[1]	5	1			T101	2		T72	1		T87	1
auto[204:207]	auto[0]	14	1			T178	4		T78	1		T81	1
auto[204:207]	auto[1]	14	1			T178	4		T78	1		T81	1
auto[208:211]	auto[0]	8	1			T220	1		T210	1		T189	1
auto[208:211]	auto[1]	8	1			T220	1		T210	1		T189	1
auto[212:215]	auto[0]	6	1			T178	1		T265	1		T194	1
auto[212:215]	auto[1]	6	1			T178	1		T265	1		T194	1
auto[216:219]	auto[0]	5	1			T220	1		T235	1		T80	1
auto[216:219]	auto[1]	5	1			T220	1		T235	1		T80	1
auto[220:223]	auto[0]	12	1			T251	2		T217	2		T86	1
auto[220:223]	auto[1]	12	1			T251	2		T217	2		T86	1
auto[224:227]	auto[0]	7	1			T79	1		T233	2		T282	2
auto[224:227]	auto[1]	7	1			T79	1		T233	2		T282	2
auto[228:231]	auto[0]	13	1			T235	3		T226	1		T199	1
auto[228:231]	auto[1]	13	1			T235	3		T226	1		T199	1
auto[232:235]	auto[0]	130	1			T5	1		T11	1		T13	1
auto[232:235]	auto[1]	189	1			T5	1		T11	1		T13	1
auto[236:239]	auto[0]	7	1			T82	1		T95	1		T207	3
auto[236:239]	auto[1]	7	1			T82	1		T95	1		T207	3
auto[240:243]	auto[0]	7	1			T72	2		T73	2		T188	2
auto[240:243]	auto[1]	7	1			T72	2		T73	2		T188	2
auto[244:247]	auto[0]	4	1			T220	1		T251	1		T369	1
auto[244:247]	auto[1]	4	1			T220	1		T251	1		T369	1
auto[248:251]	auto[0]	3	1			T72	1		T235	1		T251	1
auto[248:251]	auto[1]	3	1			T72	1		T235	1		T251	1
auto[252:255]	auto[0]	4	1			T286	1		T79	1		T322	1
auto[252:255]	auto[1]	4	1			T286	1		T79	1		T322	1