Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

1673

1

T1

3

T4

10

T5

10

auto[1]

2147

1

T1

3

T4

10

T5

10

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	282	1			T79	2		T83	5		T68	6
auto[4:7]	270	1			T1	6		T6	2		T79	2
auto[8:11]	288	1			T7	2		T79	4		T83	6
auto[12:15]	10	1			T66	2		T281	6		T285	2
auto[16:19]	44	1			T64	2		T69	4		T229	6
auto[20:23]	154	1			T6	2		T9	2		T95	4
auto[24:27]	12	1			T6	2		T264	2		T216	2
auto[28:31]	32	1			T69	8		T236	2		T55	2
auto[32:35]	22	1			T91	2		T67	2		T289	2
auto[36:39]	12	1			T188	8		T339	2		T77	2
auto[40:43]	20	1			T72	2		T337	6		T331	2
auto[44:47]	14	1			T29	4		T172	2		T238	4
auto[48:51]	10	1			T175	2		T275	4		T268	4
auto[52:55]	172	1			T4	2		T5	2		T6	2
auto[56:59]	263	1			T4	4		T7	5		T83	4
auto[60:63]	28	1			T209	2		T172	8		T233	4
auto[64:67]	24	1			T71	2		T273	6		T281	4
auto[68:71]	2	1			T274	2		-	-		-	-
auto[72:75]	18	1			T91	2		T74	2		T236	6
auto[76:79]	32	1			T4	4		T5	2		T27	4
auto[80:83]	16	1			T4	4		T231	2		T222	2
auto[84:87]	10	1			T173	2		T283	2		T194	2
auto[88:91]	198	1			T5	2		T6	2		T63	6
auto[92:95]	22	1			T173	8		T229	2		T251	2
auto[96:99]	20	1			T68	4		T162	2		T230	2
auto[100:103]	36	1			T66	2		T236	8		T232	2
auto[104:107]	242	1			T7	6		T63	2		T95	4
auto[108:111]	22	1			T172	2		T183	4		T336	2
auto[112:115]	24	1			T162	4		T231	2		T264	4
auto[116:119]	14	1			T6	2		T64	2		T162	6
auto[120:123]	26	1			T63	2		T65	2		T229	4
auto[124:127]	32	1			T29	4		T233	4		T287	2
auto[128:131]	28	1			T175	4		T230	2		T283	2
auto[132:135]	32	1			T4	6		T329	4		T202	4
auto[136:139]	18	1			T68	6		T218	4		T243	4
auto[140:143]	28	1			T76	2		T285	2		T220	4
auto[144:147]	4	1			T76	2		T376	2		-	-
auto[148:151]	18	1			T6	2		T72	6		T223	2
auto[152:155]	8	1			T63	2		T85	2		T229	2
auto[156:159]	244	1			T5	4		T79	6		T42	8
auto[160:163]	2	1			T71	2		-	-		-	-
auto[164:167]	18	1			T65	2		T216	2		T287	6
auto[168:171]	24	1			T68	6		T162	4		T67	2
auto[172:175]	26	1			T6	2		T85	4		T73	2
auto[176:179]	30	1			T65	4		T70	4		T173	4
auto[180:183]	68	1			T9	2		T27	2		T28	2
auto[184:187]	264	1			T5	2		T7	5		T8	2
auto[188:191]	14	1			T63	2		T205	2		T199	2
auto[192:195]	18	1			T29	6		T162	2		T273	2
auto[196:199]	14	1			T73	6		T55	2		T182	2
auto[200:203]	38	1			T5	4		T65	6		T223	4
auto[204:207]	12	1			T214	2		T260	2		T208	4
auto[208:211]	38	1			T71	6		T73	6		T188	4
auto[212:215]	16	1			T67	2		T336	6		T260	4
auto[216:219]	18	1			T64	2		T72	2		T223	6
auto[220:223]	18	1			T6	2		T218	2		T223	2
auto[224:227]	30	1			T5	4		T211	4		T201	4
auto[228:231]	32	1			T27	4		T214	2		T251	4
auto[232:235]	313	1			T6	4		T10	2		T79	2
auto[236:239]	18	1			T29	4		T72	4		T225	2
auto[240:243]	16	1			T227	2		T183	4		T188	2
auto[244:247]	6	1			T314	2		T321	2		T346	2
auto[248:251]	22	1			T72	2		T243	2		T183	4
auto[252:255]	14	1			T113	2		T231	2		T277	2

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	100	1			T79	1		T68	3		T95	2
auto[0:3]	auto[1]	182	1			T79	1		T83	5		T68	3
auto[4:7]	auto[0]	135	1			T1	3		T6	1		T79	1
auto[4:7]	auto[1]	135	1			T1	3		T6	1		T79	1
auto[8:11]	auto[0]	95	1			T79	2		T63	1		T68	1
auto[8:11]	auto[1]	193	1			T7	2		T79	2		T83	6
auto[12:15]	auto[0]	5	1			T66	1		T281	3		T285	1
auto[12:15]	auto[1]	5	1			T66	1		T281	3		T285	1
auto[16:19]	auto[0]	22	1			T64	1		T69	2		T229	3
auto[16:19]	auto[1]	22	1			T64	1		T69	2		T229	3
auto[20:23]	auto[0]	77	1			T6	1		T9	1		T95	2
auto[20:23]	auto[1]	77	1			T6	1		T9	1		T95	2
auto[24:27]	auto[0]	6	1			T6	1		T264	1		T216	1
auto[24:27]	auto[1]	6	1			T6	1		T264	1		T216	1
auto[28:31]	auto[0]	16	1			T69	4		T236	1		T55	1
auto[28:31]	auto[1]	16	1			T69	4		T236	1		T55	1
auto[32:35]	auto[0]	11	1			T91	1		T67	1		T289	1
auto[32:35]	auto[1]	11	1			T91	1		T67	1		T289	1
auto[36:39]	auto[0]	6	1			T188	4		T339	1		T77	1
auto[36:39]	auto[1]	6	1			T188	4		T339	1		T77	1
auto[40:43]	auto[0]	10	1			T72	1		T337	3		T331	1
auto[40:43]	auto[1]	10	1			T72	1		T337	3		T331	1
auto[44:47]	auto[0]	7	1			T29	2		T172	1		T238	2
auto[44:47]	auto[1]	7	1			T29	2		T172	1		T238	2
auto[48:51]	auto[0]	5	1			T175	1		T275	2		T268	2
auto[48:51]	auto[1]	5	1			T175	1		T275	2		T268	2
auto[52:55]	auto[0]	86	1			T4	1		T5	1		T6	1
auto[52:55]	auto[1]	86	1			T4	1		T5	1		T6	1
auto[56:59]	auto[0]	98	1			T4	2		T114	2		T85	1
auto[56:59]	auto[1]	165	1			T4	2		T7	5		T83	4
auto[60:63]	auto[0]	14	1			T209	1		T172	4		T233	2
auto[60:63]	auto[1]	14	1			T209	1		T172	4		T233	2
auto[64:67]	auto[0]	12	1			T71	1		T273	3		T281	2
auto[64:67]	auto[1]	12	1			T71	1		T273	3		T281	2
auto[68:71]	auto[0]	1	1			T274	1		-	-		-	-
auto[68:71]	auto[1]	1	1			T274	1		-	-		-	-
auto[72:75]	auto[0]	9	1			T91	1		T74	1		T236	3
auto[72:75]	auto[1]	9	1			T91	1		T74	1		T236	3
auto[76:79]	auto[0]	16	1			T4	2		T5	1		T27	2
auto[76:79]	auto[1]	16	1			T4	2		T5	1		T27	2
auto[80:83]	auto[0]	8	1			T4	2		T231	1		T222	1
auto[80:83]	auto[1]	8	1			T4	2		T231	1		T222	1
auto[84:87]	auto[0]	5	1			T173	1		T283	1		T194	1
auto[84:87]	auto[1]	5	1			T173	1		T283	1		T194	1
auto[88:91]	auto[0]	99	1			T5	1		T6	1		T63	3
auto[88:91]	auto[1]	99	1			T5	1		T6	1		T63	3
auto[92:95]	auto[0]	11	1			T173	4		T229	1		T251	1
auto[92:95]	auto[1]	11	1			T173	4		T229	1		T251	1
auto[96:99]	auto[0]	10	1			T68	2		T162	1		T230	1
auto[96:99]	auto[1]	10	1			T68	2		T162	1		T230	1
auto[100:103]	auto[0]	18	1			T66	1		T236	4		T232	1
auto[100:103]	auto[1]	18	1			T66	1		T236	4		T232	1
auto[104:107]	auto[0]	81	1			T63	1		T95	2		T92	1
auto[104:107]	auto[1]	161	1			T7	6		T63	1		T95	2
auto[108:111]	auto[0]	11	1			T172	1		T183	2		T336	1
auto[108:111]	auto[1]	11	1			T172	1		T183	2		T336	1
auto[112:115]	auto[0]	12	1			T162	2		T231	1		T264	2
auto[112:115]	auto[1]	12	1			T162	2		T231	1		T264	2
auto[116:119]	auto[0]	7	1			T6	1		T64	1		T162	3
auto[116:119]	auto[1]	7	1			T6	1		T64	1		T162	3
auto[120:123]	auto[0]	13	1			T63	1		T65	1		T229	2
auto[120:123]	auto[1]	13	1			T63	1		T65	1		T229	2
auto[124:127]	auto[0]	16	1			T29	2		T233	2		T287	1
auto[124:127]	auto[1]	16	1			T29	2		T233	2		T287	1
auto[128:131]	auto[0]	14	1			T175	2		T230	1		T283	1
auto[128:131]	auto[1]	14	1			T175	2		T230	1		T283	1
auto[132:135]	auto[0]	16	1			T4	3		T329	2		T202	2
auto[132:135]	auto[1]	16	1			T4	3		T329	2		T202	2
auto[136:139]	auto[0]	9	1			T68	3		T218	2		T243	2
auto[136:139]	auto[1]	9	1			T68	3		T218	2		T243	2
auto[140:143]	auto[0]	14	1			T76	1		T285	1		T220	2
auto[140:143]	auto[1]	14	1			T76	1		T285	1		T220	2
auto[144:147]	auto[0]	2	1			T76	1		T376	1		-	-
auto[144:147]	auto[1]	2	1			T76	1		T376	1		-	-
auto[148:151]	auto[0]	9	1			T6	1		T72	3		T223	1
auto[148:151]	auto[1]	9	1			T6	1		T72	3		T223	1
auto[152:155]	auto[0]	4	1			T63	1		T85	1		T229	1
auto[152:155]	auto[1]	4	1			T63	1		T85	1		T229	1
auto[156:159]	auto[0]	122	1			T5	2		T79	3		T42	4
auto[156:159]	auto[1]	122	1			T5	2		T79	3		T42	4
auto[160:163]	auto[0]	1	1			T71	1		-	-		-	-
auto[160:163]	auto[1]	1	1			T71	1		-	-		-	-
auto[164:167]	auto[0]	9	1			T65	1		T216	1		T287	3
auto[164:167]	auto[1]	9	1			T65	1		T216	1		T287	3
auto[168:171]	auto[0]	12	1			T68	3		T162	2		T67	1
auto[168:171]	auto[1]	12	1			T68	3		T162	2		T67	1
auto[172:175]	auto[0]	13	1			T6	1		T85	2		T73	1
auto[172:175]	auto[1]	13	1			T6	1		T85	2		T73	1
auto[176:179]	auto[0]	15	1			T65	2		T70	2		T173	2
auto[176:179]	auto[1]	15	1			T65	2		T70	2		T173	2
auto[180:183]	auto[0]	34	1			T9	1		T27	1		T28	1
auto[180:183]	auto[1]	34	1			T9	1		T27	1		T28	1
auto[184:187]	auto[0]	86	1			T5	1		T8	1		T68	1
auto[184:187]	auto[1]	178	1			T5	1		T7	5		T8	1
auto[188:191]	auto[0]	7	1			T63	1		T205	1		T199	1
auto[188:191]	auto[1]	7	1			T63	1		T205	1		T199	1
auto[192:195]	auto[0]	9	1			T29	3		T162	1		T273	1
auto[192:195]	auto[1]	9	1			T29	3		T162	1		T273	1
auto[196:199]	auto[0]	7	1			T73	3		T55	1		T182	1
auto[196:199]	auto[1]	7	1			T73	3		T55	1		T182	1
auto[200:203]	auto[0]	19	1			T5	2		T65	3		T223	2
auto[200:203]	auto[1]	19	1			T5	2		T65	3		T223	2
auto[204:207]	auto[0]	6	1			T214	1		T260	1		T208	2
auto[204:207]	auto[1]	6	1			T214	1		T260	1		T208	2
auto[208:211]	auto[0]	19	1			T71	3		T73	3		T188	2
auto[208:211]	auto[1]	19	1			T71	3		T73	3		T188	2
auto[212:215]	auto[0]	8	1			T67	1		T336	3		T260	2
auto[212:215]	auto[1]	8	1			T67	1		T336	3		T260	2
auto[216:219]	auto[0]	9	1			T64	1		T72	1		T223	3
auto[216:219]	auto[1]	9	1			T64	1		T72	1		T223	3
auto[220:223]	auto[0]	9	1			T6	1		T218	1		T223	1
auto[220:223]	auto[1]	9	1			T6	1		T218	1		T223	1
auto[224:227]	auto[0]	15	1			T5	2		T211	2		T201	2
auto[224:227]	auto[1]	15	1			T5	2		T211	2		T201	2
auto[228:231]	auto[0]	16	1			T27	2		T214	1		T251	2
auto[228:231]	auto[1]	16	1			T27	2		T214	1		T251	2
auto[232:235]	auto[0]	129	1			T6	2		T10	1		T79	1
auto[232:235]	auto[1]	184	1			T6	2		T10	1		T79	1
auto[236:239]	auto[0]	9	1			T29	2		T72	2		T225	1
auto[236:239]	auto[1]	9	1			T29	2		T72	2		T225	1
auto[240:243]	auto[0]	8	1			T227	1		T183	2		T188	1
auto[240:243]	auto[1]	8	1			T227	1		T183	2		T188	1
auto[244:247]	auto[0]	3	1			T314	1		T321	1		T346	1
auto[244:247]	auto[1]	3	1			T314	1		T321	1		T346	1
auto[248:251]	auto[0]	11	1			T72	1		T243	1		T183	2
auto[248:251]	auto[1]	11	1			T72	1		T243	1		T183	2
auto[252:255]	auto[0]	7	1			T113	1		T231	1		T277	1
auto[252:255]	auto[1]	7	1			T113	1		T231	1		T277	1