Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

1743

1

T3

7

T4

1

T5

16

auto[1]

2284

1

T3

7

T4

1

T5

16

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	218	1			T6	5		T78	5		T66	2
auto[4:7]	330	1			T3	2		T5	2		T11	4
auto[8:11]	287	1			T78	2		T64	6		T90	2
auto[12:15]	22	1			T8	2		T256	2		T245	4
auto[16:19]	32	1			T10	4		T65	2		T164	4
auto[20:23]	260	1			T3	2		T59	2		T39	4
auto[24:27]	24	1			T5	4		T276	4		T353	6
auto[28:31]	14	1			T176	2		T81	2		T297	2
auto[32:35]	20	1			T64	2		T68	4		T256	2
auto[36:39]	30	1			T7	2		T184	6		T241	4
auto[40:43]	11	1			T236	2		T276	4		T81	1
auto[44:47]	26	1			T237	2		T241	2		T213	4
auto[48:51]	26	1			T10	2		T239	6		T259	4
auto[52:55]	248	1			T3	6		T8	4		T11	2
auto[56:59]	279	1			T5	6		T9	2		T11	6
auto[60:63]	12	1			T263	4		T274	2		T71	4
auto[64:67]	12	1			T265	2		T172	2		T233	2
auto[68:71]	20	1			T64	2		T66	4		T62	4
auto[72:75]	18	1			T183	4		T74	2		T241	2
auto[76:79]	32	1			T90	2		T237	2		T197	8
auto[80:83]	14	1			T263	2		T197	8		T269	2
auto[84:87]	14	1			T63	2		T231	4		T190	2
auto[88:91]	214	1			T10	2		T64	2		T42	6
auto[92:95]	30	1			T60	2		T171	2		T228	8
auto[96:99]	14	1			T279	4		T323	4		T223	6
auto[100:103]	24	1			T164	2		T67	4		T239	4
auto[104:107]	303	1			T12	6		T90	2		T84	4
auto[108:111]	4	1			T68	2		T213	2		-	-
auto[112:115]	42	1			T165	6		T61	2		T273	4
auto[116:119]	22	1			T5	2		T69	2		T197	2
auto[120:123]	18	1			T265	4		T217	2		T238	4
auto[124:127]	32	1			T7	2		T216	2		T228	2
auto[128:131]	9	1			T182	2		T72	2		T81	1
auto[132:135]	12	1			T59	2		T66	2		T171	2
auto[136:139]	22	1			T5	6		T59	2		T63	2
auto[140:143]	18	1			T239	4		T276	2		T320	8
auto[144:147]	18	1			T63	8		T263	2		T230	2
auto[148:151]	14	1			T9	4		T10	2		T63	4
auto[152:155]	10	1			T188	4		T250	2		T319	4
auto[156:159]	239	1			T3	4		T64	4		T39	6
auto[160:163]	18	1			T162	2		T68	4		T265	2
auto[164:167]	16	1			T59	6		T269	2		T192	2
auto[168:171]	10	1			T60	2		T67	2		T286	2
auto[172:175]	16	1			T68	2		T70	4		T248	2
auto[176:179]	16	1			T61	2		T314	2		T276	2
auto[180:183]	47	1			T5	2		T59	2		T22	8
auto[184:187]	264	1			T6	4		T8	2		T9	2
auto[188:191]	28	1			T60	2		T165	4		T171	2
auto[192:195]	18	1			T5	6		T11	2		T68	2
auto[196:199]	16	1			T165	4		T68	2		T61	4
auto[200:203]	30	1			T5	2		T63	4		T266	2
auto[204:207]	20	1			T273	4		T282	4		T255	2
auto[208:211]	24	1			T11	2		T60	2		T69	4
auto[212:215]	18	1			T7	2		T196	2		T177	2
auto[216:219]	24	1			T65	2		T69	4		T62	4
auto[220:223]	24	1			T11	6		T237	2		T182	4
auto[224:227]	16	1			T63	4		T237	2		T236	2
auto[228:231]	30	1			T67	6		T70	2		T177	2
auto[232:235]	312	1			T4	2		T5	2		T8	2
auto[236:239]	12	1			T59	2		T213	6		T242	2
auto[240:243]	14	1			T10	2		T314	2		T297	2
auto[244:247]	10	1			T182	2		T265	2		T177	2
auto[248:251]	16	1			T289	2		T275	4		T252	4
auto[252:255]	34	1			T165	10		T266	4		T62	4

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	72	1			T66	1		T60	1		T165	1
auto[0:3]	auto[1]	146	1			T6	5		T78	5		T66	1
auto[4:7]	auto[0]	164	1			T3	1		T5	1		T11	2
auto[4:7]	auto[1]	166	1			T3	1		T5	1		T11	2
auto[8:11]	auto[0]	90	1			T64	3		T90	1		T109	4
auto[8:11]	auto[1]	197	1			T78	2		T64	3		T90	1
auto[12:15]	auto[0]	11	1			T8	1		T256	1		T245	2
auto[12:15]	auto[1]	11	1			T8	1		T256	1		T245	2
auto[16:19]	auto[0]	16	1			T10	2		T65	1		T164	2
auto[16:19]	auto[1]	16	1			T10	2		T65	1		T164	2
auto[20:23]	auto[0]	129	1			T3	1		T59	1		T39	2
auto[20:23]	auto[1]	131	1			T3	1		T59	1		T39	2
auto[24:27]	auto[0]	12	1			T5	2		T276	2		T353	3
auto[24:27]	auto[1]	12	1			T5	2		T276	2		T353	3
auto[28:31]	auto[0]	6	1			T176	1		T297	1		T280	1
auto[28:31]	auto[1]	8	1			T176	1		T81	2		T297	1
auto[32:35]	auto[0]	10	1			T64	1		T68	2		T256	1
auto[32:35]	auto[1]	10	1			T64	1		T68	2		T256	1
auto[36:39]	auto[0]	15	1			T7	1		T184	3		T241	2
auto[36:39]	auto[1]	15	1			T7	1		T184	3		T241	2
auto[40:43]	auto[0]	5	1			T236	1		T276	2		T250	2
auto[40:43]	auto[1]	6	1			T236	1		T276	2		T81	1
auto[44:47]	auto[0]	13	1			T237	1		T241	1		T213	2
auto[44:47]	auto[1]	13	1			T237	1		T241	1		T213	2
auto[48:51]	auto[0]	13	1			T10	1		T239	3		T259	2
auto[48:51]	auto[1]	13	1			T10	1		T239	3		T259	2
auto[52:55]	auto[0]	123	1			T3	3		T8	2		T11	1
auto[52:55]	auto[1]	125	1			T3	3		T8	2		T11	1
auto[56:59]	auto[0]	98	1			T5	3		T9	1		T11	3
auto[56:59]	auto[1]	181	1			T5	3		T9	1		T11	3
auto[60:63]	auto[0]	6	1			T263	2		T274	1		T71	2
auto[60:63]	auto[1]	6	1			T263	2		T274	1		T71	2
auto[64:67]	auto[0]	6	1			T265	1		T172	1		T233	1
auto[64:67]	auto[1]	6	1			T265	1		T172	1		T233	1
auto[68:71]	auto[0]	10	1			T64	1		T66	2		T62	2
auto[68:71]	auto[1]	10	1			T64	1		T66	2		T62	2
auto[72:75]	auto[0]	9	1			T183	2		T74	1		T241	1
auto[72:75]	auto[1]	9	1			T183	2		T74	1		T241	1
auto[76:79]	auto[0]	16	1			T90	1		T237	1		T197	4
auto[76:79]	auto[1]	16	1			T90	1		T237	1		T197	4
auto[80:83]	auto[0]	7	1			T263	1		T197	4		T269	1
auto[80:83]	auto[1]	7	1			T263	1		T197	4		T269	1
auto[84:87]	auto[0]	7	1			T63	1		T231	2		T190	1
auto[84:87]	auto[1]	7	1			T63	1		T231	2		T190	1
auto[88:91]	auto[0]	107	1			T10	1		T64	1		T42	3
auto[88:91]	auto[1]	107	1			T10	1		T64	1		T42	3
auto[92:95]	auto[0]	15	1			T60	1		T171	1		T228	4
auto[92:95]	auto[1]	15	1			T60	1		T171	1		T228	4
auto[96:99]	auto[0]	7	1			T279	2		T323	2		T223	3
auto[96:99]	auto[1]	7	1			T279	2		T323	2		T223	3
auto[100:103]	auto[0]	11	1			T164	1		T67	2		T239	2
auto[100:103]	auto[1]	13	1			T164	1		T67	2		T239	2
auto[104:107]	auto[0]	93	1			T90	1		T84	2		T161	1
auto[104:107]	auto[1]	210	1			T12	6		T90	1		T84	2
auto[108:111]	auto[0]	2	1			T68	1		T213	1		-	-
auto[108:111]	auto[1]	2	1			T68	1		T213	1		-	-
auto[112:115]	auto[0]	21	1			T165	3		T61	1		T273	2
auto[112:115]	auto[1]	21	1			T165	3		T61	1		T273	2
auto[116:119]	auto[0]	11	1			T5	1		T69	1		T197	1
auto[116:119]	auto[1]	11	1			T5	1		T69	1		T197	1
auto[120:123]	auto[0]	9	1			T265	2		T217	1		T238	2
auto[120:123]	auto[1]	9	1			T265	2		T217	1		T238	2
auto[124:127]	auto[0]	15	1			T7	1		T216	1		T228	1
auto[124:127]	auto[1]	17	1			T7	1		T216	1		T228	1
auto[128:131]	auto[0]	4	1			T182	1		T72	1		T185	1
auto[128:131]	auto[1]	5	1			T182	1		T72	1		T81	1
auto[132:135]	auto[0]	6	1			T59	1		T66	1		T171	1
auto[132:135]	auto[1]	6	1			T59	1		T66	1		T171	1
auto[136:139]	auto[0]	11	1			T5	3		T59	1		T63	1
auto[136:139]	auto[1]	11	1			T5	3		T59	1		T63	1
auto[140:143]	auto[0]	9	1			T239	2		T276	1		T320	4
auto[140:143]	auto[1]	9	1			T239	2		T276	1		T320	4
auto[144:147]	auto[0]	9	1			T63	4		T263	1		T230	1
auto[144:147]	auto[1]	9	1			T63	4		T263	1		T230	1
auto[148:151]	auto[0]	7	1			T9	2		T10	1		T63	2
auto[148:151]	auto[1]	7	1			T9	2		T10	1		T63	2
auto[152:155]	auto[0]	5	1			T188	2		T250	1		T319	2
auto[152:155]	auto[1]	5	1			T188	2		T250	1		T319	2
auto[156:159]	auto[0]	119	1			T3	2		T64	2		T39	3
auto[156:159]	auto[1]	120	1			T3	2		T64	2		T39	3
auto[160:163]	auto[0]	9	1			T162	1		T68	2		T265	1
auto[160:163]	auto[1]	9	1			T162	1		T68	2		T265	1
auto[164:167]	auto[0]	8	1			T59	3		T269	1		T192	1
auto[164:167]	auto[1]	8	1			T59	3		T269	1		T192	1
auto[168:171]	auto[0]	5	1			T60	1		T67	1		T286	1
auto[168:171]	auto[1]	5	1			T60	1		T67	1		T286	1
auto[172:175]	auto[0]	8	1			T68	1		T70	2		T248	1
auto[172:175]	auto[1]	8	1			T68	1		T70	2		T248	1
auto[176:179]	auto[0]	8	1			T61	1		T314	1		T276	1
auto[176:179]	auto[1]	8	1			T61	1		T314	1		T276	1
auto[180:183]	auto[0]	23	1			T5	1		T59	1		T22	4
auto[180:183]	auto[1]	24	1			T5	1		T59	1		T22	4
auto[184:187]	auto[0]	102	1			T8	1		T9	1		T11	2
auto[184:187]	auto[1]	162	1			T6	4		T8	1		T9	1
auto[188:191]	auto[0]	14	1			T60	1		T165	2		T171	1
auto[188:191]	auto[1]	14	1			T60	1		T165	2		T171	1
auto[192:195]	auto[0]	9	1			T5	3		T11	1		T68	1
auto[192:195]	auto[1]	9	1			T5	3		T11	1		T68	1
auto[196:199]	auto[0]	8	1			T165	2		T68	1		T61	2
auto[196:199]	auto[1]	8	1			T165	2		T68	1		T61	2
auto[200:203]	auto[0]	15	1			T5	1		T63	2		T266	1
auto[200:203]	auto[1]	15	1			T5	1		T63	2		T266	1
auto[204:207]	auto[0]	10	1			T273	2		T282	2		T255	1
auto[204:207]	auto[1]	10	1			T273	2		T282	2		T255	1
auto[208:211]	auto[0]	12	1			T11	1		T60	1		T69	2
auto[208:211]	auto[1]	12	1			T11	1		T60	1		T69	2
auto[212:215]	auto[0]	9	1			T7	1		T196	1		T177	1
auto[212:215]	auto[1]	9	1			T7	1		T196	1		T177	1
auto[216:219]	auto[0]	12	1			T65	1		T69	2		T62	2
auto[216:219]	auto[1]	12	1			T65	1		T69	2		T62	2
auto[220:223]	auto[0]	12	1			T11	3		T237	1		T182	2
auto[220:223]	auto[1]	12	1			T11	3		T237	1		T182	2
auto[224:227]	auto[0]	8	1			T63	2		T237	1		T236	1
auto[224:227]	auto[1]	8	1			T63	2		T237	1		T236	1
auto[228:231]	auto[0]	15	1			T67	3		T70	1		T177	1
auto[228:231]	auto[1]	15	1			T67	3		T70	1		T177	1
auto[232:235]	auto[0]	114	1			T4	1		T5	1		T8	1
auto[232:235]	auto[1]	198	1			T4	1		T5	1		T8	1
auto[236:239]	auto[0]	6	1			T59	1		T213	3		T242	1
auto[236:239]	auto[1]	6	1			T59	1		T213	3		T242	1
auto[240:243]	auto[0]	7	1			T10	1		T314	1		T297	1
auto[240:243]	auto[1]	7	1			T10	1		T314	1		T297	1
auto[244:247]	auto[0]	5	1			T182	1		T265	1		T177	1
auto[244:247]	auto[1]	5	1			T182	1		T265	1		T177	1
auto[248:251]	auto[0]	8	1			T289	1		T275	2		T252	2
auto[248:251]	auto[1]	8	1			T289	1		T275	2		T252	2
auto[252:255]	auto[0]	17	1			T165	5		T266	2		T62	2
auto[252:255]	auto[1]	17	1			T165	5		T266	2		T62	2