Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

1654

1

T2

2

T4

2

T5

8

auto[1]

2211

1

T2

2

T4

2

T5

8

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	277	1			T4	2		T5	4		T8	2
auto[4:7]	278	1			T6	2		T10	2		T11	6
auto[8:11]	246	1			T6	4		T8	2		T18	2
auto[12:15]	34	1			T94	4		T27	6		T268	2
auto[16:19]	32	1			T2	2		T199	2		T266	2
auto[20:23]	216	1			T8	6		T9	10		T43	4
auto[24:27]	12	1			T60	2		T237	4		T253	4
auto[28:31]	26	1			T160	4		T187	6		T175	2
auto[32:35]	28	1			T6	6		T59	6		T233	4
auto[36:39]	8	1			T234	2		T173	2		T276	4
auto[40:43]	20	1			T8	4		T160	4		T25	2
auto[44:47]	24	1			T238	2		T209	2		T183	10
auto[48:51]	12	1			T94	2		T244	2		T204	2
auto[52:55]	224	1			T8	4		T94	6		T129	2
auto[56:59]	291	1			T6	6		T18	2		T84	2
auto[60:63]	22	1			T160	4		T61	2		T191	2
auto[64:67]	26	1			T180	8		T64	2		T68	2
auto[68:71]	8	1			T187	2		T194	2		T262	2
auto[72:75]	36	1			T56	2		T70	2		T199	2
auto[76:79]	12	1			T2	2		T160	2		T255	4
auto[80:83]	22	1			T198	4		T60	6		T61	4
auto[84:87]	6	1			T61	2		T304	2		T338	2
auto[88:91]	164	1			T9	2		T18	2		T43	2
auto[92:95]	12	1			T25	2		T58	2		T234	2
auto[96:99]	20	1			T58	4		T26	2		T27	4
auto[100:103]	20	1			T204	2		T195	2		T239	2
auto[104:107]	244	1			T5	10		T18	4		T56	4
auto[108:111]	26	1			T228	2		T227	4		T245	2
auto[112:115]	24	1			T18	4		T61	2		T224	2
auto[116:119]	16	1			T18	2		T194	2		T68	2
auto[120:123]	28	1			T160	4		T329	2		T66	4
auto[124:127]	18	1			T156	2		T64	4		T221	2
auto[128:131]	12	1			T62	2		T217	6		T272	4
auto[132:135]	26	1			T198	2		T58	8		T243	2
auto[136:139]	12	1			T161	2		T217	2		T166	4
auto[140:143]	38	1			T6	2		T8	4		T59	2
auto[144:147]	20	1			T59	4		T224	2		T238	2
auto[148:151]	14	1			T28	2		T191	2		T321	2
auto[152:155]	10	1			T209	2		T246	2		T231	2
auto[156:159]	206	1			T6	2		T8	2		T9	4
auto[160:163]	18	1			T8	2		T28	2		T265	4
auto[164:167]	14	1			T57	2		T234	4		T217	2
auto[168:171]	22	1			T8	4		T58	2		T26	2
auto[172:175]	26	1			T70	2		T311	6		T301	2
auto[176:179]	20	1			T63	6		T218	2		T222	10
auto[180:183]	100	1			T25	2		T26	2		T204	4
auto[184:187]	307	1			T8	4		T43	2		T145	6
auto[188:191]	4	1			T26	2		T195	2		-	-
auto[192:195]	30	1			T198	10		T62	2		T63	4
auto[196:199]	10	1			T260	2		T206	2		T186	2
auto[200:203]	12	1			T329	4		T227	2		T195	2
auto[204:207]	6	1			T60	2		T234	2		T201	2
auto[208:211]	16	1			T56	4		T25	2		T204	2
auto[212:215]	12	1			T58	2		T208	2		T233	2
auto[216:219]	26	1			T59	6		T25	2		T63	2
auto[220:223]	16	1			T199	6		T63	2		T335	2
auto[224:227]	12	1			T28	2		T70	2		T69	2
auto[228:231]	6	1			T6	2		T183	2		T184	2
auto[232:235]	348	1			T4	2		T5	2		T6	4
auto[236:239]	24	1			T60	2		T329	2		T64	2
auto[240:243]	24	1			T56	4		T60	2		T58	4
auto[244:247]	14	1			T56	4		T226	2		T65	4
auto[248:251]	14	1			T6	2		T63	4		T226	2
auto[252:255]	14	1			T199	2		T178	4		T236	2

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	100	1			T4	1		T5	2		T8	1
auto[0:3]	auto[1]	177	1			T4	1		T5	2		T8	1
auto[4:7]	auto[0]	139	1			T6	1		T10	1		T11	3
auto[4:7]	auto[1]	139	1			T6	1		T10	1		T11	3
auto[8:11]	auto[0]	77	1			T6	2		T8	1		T18	1
auto[8:11]	auto[1]	169	1			T6	2		T8	1		T18	1
auto[12:15]	auto[0]	17	1			T94	2		T27	3		T268	1
auto[12:15]	auto[1]	17	1			T94	2		T27	3		T268	1
auto[16:19]	auto[0]	16	1			T2	1		T199	1		T266	1
auto[16:19]	auto[1]	16	1			T2	1		T199	1		T266	1
auto[20:23]	auto[0]	108	1			T8	3		T9	5		T43	2
auto[20:23]	auto[1]	108	1			T8	3		T9	5		T43	2
auto[24:27]	auto[0]	6	1			T60	1		T237	2		T253	2
auto[24:27]	auto[1]	6	1			T60	1		T237	2		T253	2
auto[28:31]	auto[0]	13	1			T160	2		T187	3		T175	1
auto[28:31]	auto[1]	13	1			T160	2		T187	3		T175	1
auto[32:35]	auto[0]	14	1			T6	3		T59	3		T233	2
auto[32:35]	auto[1]	14	1			T6	3		T59	3		T233	2
auto[36:39]	auto[0]	4	1			T234	1		T173	1		T276	2
auto[36:39]	auto[1]	4	1			T234	1		T173	1		T276	2
auto[40:43]	auto[0]	10	1			T8	2		T160	2		T25	1
auto[40:43]	auto[1]	10	1			T8	2		T160	2		T25	1
auto[44:47]	auto[0]	12	1			T238	1		T209	1		T183	5
auto[44:47]	auto[1]	12	1			T238	1		T209	1		T183	5
auto[48:51]	auto[0]	6	1			T94	1		T244	1		T204	1
auto[48:51]	auto[1]	6	1			T94	1		T244	1		T204	1
auto[52:55]	auto[0]	112	1			T8	2		T94	3		T129	1
auto[52:55]	auto[1]	112	1			T8	2		T94	3		T129	1
auto[56:59]	auto[0]	82	1			T6	3		T18	1		T84	1
auto[56:59]	auto[1]	209	1			T6	3		T18	1		T84	1
auto[60:63]	auto[0]	11	1			T160	2		T61	1		T191	1
auto[60:63]	auto[1]	11	1			T160	2		T61	1		T191	1
auto[64:67]	auto[0]	13	1			T180	4		T64	1		T68	1
auto[64:67]	auto[1]	13	1			T180	4		T64	1		T68	1
auto[68:71]	auto[0]	4	1			T187	1		T194	1		T262	1
auto[68:71]	auto[1]	4	1			T187	1		T194	1		T262	1
auto[72:75]	auto[0]	18	1			T56	1		T70	1		T199	1
auto[72:75]	auto[1]	18	1			T56	1		T70	1		T199	1
auto[76:79]	auto[0]	6	1			T2	1		T160	1		T255	2
auto[76:79]	auto[1]	6	1			T2	1		T160	1		T255	2
auto[80:83]	auto[0]	11	1			T198	2		T60	3		T61	2
auto[80:83]	auto[1]	11	1			T198	2		T60	3		T61	2
auto[84:87]	auto[0]	3	1			T61	1		T304	1		T338	1
auto[84:87]	auto[1]	3	1			T61	1		T304	1		T338	1
auto[88:91]	auto[0]	82	1			T9	1		T18	1		T43	1
auto[88:91]	auto[1]	82	1			T9	1		T18	1		T43	1
auto[92:95]	auto[0]	6	1			T25	1		T58	1		T234	1
auto[92:95]	auto[1]	6	1			T25	1		T58	1		T234	1
auto[96:99]	auto[0]	10	1			T58	2		T26	1		T27	2
auto[96:99]	auto[1]	10	1			T58	2		T26	1		T27	2
auto[100:103]	auto[0]	10	1			T204	1		T195	1		T239	1
auto[100:103]	auto[1]	10	1			T204	1		T195	1		T239	1
auto[104:107]	auto[0]	86	1			T5	5		T18	2		T56	2
auto[104:107]	auto[1]	158	1			T5	5		T18	2		T56	2
auto[108:111]	auto[0]	13	1			T228	1		T227	2		T245	1
auto[108:111]	auto[1]	13	1			T228	1		T227	2		T245	1
auto[112:115]	auto[0]	12	1			T18	2		T61	1		T224	1
auto[112:115]	auto[1]	12	1			T18	2		T61	1		T224	1
auto[116:119]	auto[0]	8	1			T18	1		T194	1		T68	1
auto[116:119]	auto[1]	8	1			T18	1		T194	1		T68	1
auto[120:123]	auto[0]	14	1			T160	2		T329	1		T66	2
auto[120:123]	auto[1]	14	1			T160	2		T329	1		T66	2
auto[124:127]	auto[0]	9	1			T156	1		T64	2		T221	1
auto[124:127]	auto[1]	9	1			T156	1		T64	2		T221	1
auto[128:131]	auto[0]	6	1			T62	1		T217	3		T272	2
auto[128:131]	auto[1]	6	1			T62	1		T217	3		T272	2
auto[132:135]	auto[0]	13	1			T198	1		T58	4		T243	1
auto[132:135]	auto[1]	13	1			T198	1		T58	4		T243	1
auto[136:139]	auto[0]	6	1			T161	1		T217	1		T166	2
auto[136:139]	auto[1]	6	1			T161	1		T217	1		T166	2
auto[140:143]	auto[0]	19	1			T6	1		T8	2		T59	1
auto[140:143]	auto[1]	19	1			T6	1		T8	2		T59	1
auto[144:147]	auto[0]	10	1			T59	2		T224	1		T238	1
auto[144:147]	auto[1]	10	1			T59	2		T224	1		T238	1
auto[148:151]	auto[0]	7	1			T28	1		T191	1		T321	1
auto[148:151]	auto[1]	7	1			T28	1		T191	1		T321	1
auto[152:155]	auto[0]	5	1			T209	1		T246	1		T231	1
auto[152:155]	auto[1]	5	1			T209	1		T246	1		T231	1
auto[156:159]	auto[0]	103	1			T6	1		T8	1		T9	2
auto[156:159]	auto[1]	103	1			T6	1		T8	1		T9	2
auto[160:163]	auto[0]	9	1			T8	1		T28	1		T265	2
auto[160:163]	auto[1]	9	1			T8	1		T28	1		T265	2
auto[164:167]	auto[0]	7	1			T57	1		T234	2		T217	1
auto[164:167]	auto[1]	7	1			T57	1		T234	2		T217	1
auto[168:171]	auto[0]	11	1			T8	2		T58	1		T26	1
auto[168:171]	auto[1]	11	1			T8	2		T58	1		T26	1
auto[172:175]	auto[0]	13	1			T70	1		T311	3		T301	1
auto[172:175]	auto[1]	13	1			T70	1		T311	3		T301	1
auto[176:179]	auto[0]	10	1			T63	3		T218	1		T222	5
auto[176:179]	auto[1]	10	1			T63	3		T218	1		T222	5
auto[180:183]	auto[0]	50	1			T25	1		T26	1		T204	2
auto[180:183]	auto[1]	50	1			T25	1		T26	1		T204	2
auto[184:187]	auto[0]	102	1			T8	2		T43	1		T244	2
auto[184:187]	auto[1]	205	1			T8	2		T43	1		T145	6
auto[188:191]	auto[0]	2	1			T26	1		T195	1		-	-
auto[188:191]	auto[1]	2	1			T26	1		T195	1		-	-
auto[192:195]	auto[0]	15	1			T198	5		T62	1		T63	2
auto[192:195]	auto[1]	15	1			T198	5		T62	1		T63	2
auto[196:199]	auto[0]	5	1			T260	1		T206	1		T186	1
auto[196:199]	auto[1]	5	1			T260	1		T206	1		T186	1
auto[200:203]	auto[0]	6	1			T329	2		T227	1		T195	1
auto[200:203]	auto[1]	6	1			T329	2		T227	1		T195	1
auto[204:207]	auto[0]	3	1			T60	1		T234	1		T201	1
auto[204:207]	auto[1]	3	1			T60	1		T234	1		T201	1
auto[208:211]	auto[0]	8	1			T56	2		T25	1		T204	1
auto[208:211]	auto[1]	8	1			T56	2		T25	1		T204	1
auto[212:215]	auto[0]	6	1			T58	1		T208	1		T233	1
auto[212:215]	auto[1]	6	1			T58	1		T208	1		T233	1
auto[216:219]	auto[0]	13	1			T59	3		T25	1		T63	1
auto[216:219]	auto[1]	13	1			T59	3		T25	1		T63	1
auto[220:223]	auto[0]	8	1			T199	3		T63	1		T335	1
auto[220:223]	auto[1]	8	1			T199	3		T63	1		T335	1
auto[224:227]	auto[0]	6	1			T28	1		T70	1		T69	1
auto[224:227]	auto[1]	6	1			T28	1		T70	1		T69	1
auto[228:231]	auto[0]	3	1			T6	1		T183	1		T184	1
auto[228:231]	auto[1]	3	1			T6	1		T183	1		T184	1
auto[232:235]	auto[0]	131	1			T4	1		T5	1		T6	2
auto[232:235]	auto[1]	217	1			T4	1		T5	1		T6	2
auto[236:239]	auto[0]	12	1			T60	1		T329	1		T64	1
auto[236:239]	auto[1]	12	1			T60	1		T329	1		T64	1
auto[240:243]	auto[0]	12	1			T56	2		T60	1		T58	2
auto[240:243]	auto[1]	12	1			T56	2		T60	1		T58	2
auto[244:247]	auto[0]	7	1			T56	2		T226	1		T65	2
auto[244:247]	auto[1]	7	1			T56	2		T226	1		T65	2
auto[248:251]	auto[0]	7	1			T6	1		T63	2		T226	1
auto[248:251]	auto[1]	7	1			T6	1		T63	2		T226	1
auto[252:255]	auto[0]	7	1			T199	1		T178	2		T236	1
auto[252:255]	auto[1]	7	1			T199	1		T178	2		T236	1