Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
98.45	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	1	65	98.48
Crosses	128	2	126	98.44

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	1	63	98.44	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	2	126	98.44	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

1630

1

T7

12

T4

3

T8

12

auto[1]

2206

1

T2

15

T7

12

T4

3

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	1	63	98.44

Automatically Generated Bins for cp_opcode

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[212:215]]	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	307	1			T6	2		T11	6		T92	8
auto[4:7]	230	1			T7	2		T4	2		T9	4
auto[8:11]	285	1			T2	4		T6	4		T12	2
auto[12:15]	24	1			T11	2		T195	2		T69	4
auto[16:19]	24	1			T248	4		T271	2		T201	4
auto[20:23]	164	1			T7	10		T12	2		T172	12
auto[24:27]	20	1			T73	4		T231	6		T340	4
auto[28:31]	6	1			T29	4		T184	2		-	-
auto[32:35]	20	1			T64	2		T326	4		T191	4
auto[36:39]	24	1			T57	4		T231	2		T68	2
auto[40:43]	34	1			T31	2		T59	4		T196	6
auto[44:47]	32	1			T29	2		T250	6		T217	4
auto[48:51]	12	1			T9	2		T62	2		T252	2
auto[52:55]	198	1			T7	12		T4	2		T9	2
auto[56:59]	288	1			T4	2		T5	3		T8	4
auto[60:63]	14	1			T64	2		T55	4		T265	2
auto[64:67]	20	1			T73	2		T57	2		T65	4
auto[68:71]	24	1			T212	2		T225	4		T343	2
auto[72:75]	22	1			T64	2		T58	2		T242	4
auto[76:79]	32	1			T55	2		T67	2		T185	2
auto[80:83]	18	1			T59	2		T207	2		T344	4
auto[84:87]	12	1			T55	4		T73	2		T254	2
auto[88:91]	168	1			T9	6		T12	6		T92	4
auto[92:95]	8	1			T69	2		T356	6		-	-
auto[96:99]	20	1			T224	2		T232	2		T248	6
auto[100:103]	28	1			T11	2		T328	8		T208	2
auto[104:107]	300	1			T2	3		T8	8		T9	2
auto[108:111]	10	1			T234	2		T81	2		T332	2
auto[112:115]	22	1			T233	6		T329	4		T72	2
auto[116:119]	12	1			T208	2		T195	2		T212	2
auto[120:123]	32	1			T270	2		T63	4		T245	2
auto[124:127]	20	1			T29	2		T62	4		T210	2
auto[128:131]	8	1			T357	8		-	-		-	-
auto[132:135]	16	1			T55	2		T231	6		T270	2
auto[136:139]	26	1			T196	4		T326	2		T265	2
auto[140:143]	8	1			T224	4		T242	2		T71	2
auto[144:147]	20	1			T9	6		T65	2		T66	2
auto[148:151]	6	1			T9	2		T245	4		-	-
auto[152:155]	14	1			T62	2		T260	2		T210	6
auto[156:159]	168	1			T43	2		T44	4		T45	4
auto[160:163]	20	1			T66	2		T58	2		T284	2
auto[164:167]	40	1			T250	6		T81	4		T225	2
auto[168:171]	12	1			T242	2		T248	2		T358	2
auto[172:175]	18	1			T302	4		T359	2		T204	2
auto[176:179]	10	1			T259	2		T313	2		T322	4
auto[180:183]	94	1			T29	2		T26	8		T30	2
auto[184:187]	293	1			T2	4		T5	4		T8	12
auto[188:191]	20	1			T65	6		T67	2		T218	2
auto[192:195]	16	1			T249	6		T201	2		T229	4
auto[196:199]	10	1			T56	2		T243	2		T359	2
auto[200:203]	10	1			T270	4		T246	2		T302	2
auto[204:207]	14	1			T31	2		T66	2		T271	2
auto[208:211]	26	1			T11	6		T224	4		T195	4
auto[216:219]	24	1			T57	4		T58	2		T191	6
auto[220:223]	16	1			T9	2		T328	2		T302	6
auto[224:227]	26	1			T56	2		T57	2		T231	2
auto[228:231]	22	1			T326	2		T302	2		T357	10
auto[232:235]	363	1			T2	4		T6	3		T82	7
auto[236:239]	6	1			T231	2		T360	2		T330	2
auto[240:243]	26	1			T60	2		T194	4		T215	2
auto[244:247]	16	1			T55	2		T196	6		T284	4
auto[248:251]	32	1			T196	2		T192	2		T315	4
auto[252:255]	26	1			T57	4		T284	2		T328	6

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	2	126	98.44	2

Automatically Generated Cross Bins for cr_all

Element holes

cp_opcode	cp_filtered	COUNT	AT LEAST	NUMBER	STATUS
[auto[212:215]]	*	--	--	2

Covered bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	108	1			T11	3		T92	4		T94	1
auto[0:3]	auto[1]	199	1			T6	2		T11	3		T92	4
auto[4:7]	auto[0]	115	1			T7	1		T4	1		T9	2
auto[4:7]	auto[1]	115	1			T7	1		T4	1		T9	2
auto[8:11]	auto[0]	92	1			T12	1		T43	1		T64	1
auto[8:11]	auto[1]	193	1			T2	4		T6	4		T12	1
auto[12:15]	auto[0]	12	1			T11	1		T195	1		T69	2
auto[12:15]	auto[1]	12	1			T11	1		T195	1		T69	2
auto[16:19]	auto[0]	12	1			T248	2		T271	1		T201	2
auto[16:19]	auto[1]	12	1			T248	2		T271	1		T201	2
auto[20:23]	auto[0]	82	1			T7	5		T12	1		T172	6
auto[20:23]	auto[1]	82	1			T7	5		T12	1		T172	6
auto[24:27]	auto[0]	10	1			T73	2		T231	3		T340	2
auto[24:27]	auto[1]	10	1			T73	2		T231	3		T340	2
auto[28:31]	auto[0]	3	1			T29	2		T184	1		-	-
auto[28:31]	auto[1]	3	1			T29	2		T184	1		-	-
auto[32:35]	auto[0]	10	1			T64	1		T326	2		T191	2
auto[32:35]	auto[1]	10	1			T64	1		T326	2		T191	2
auto[36:39]	auto[0]	12	1			T57	2		T231	1		T68	1
auto[36:39]	auto[1]	12	1			T57	2		T231	1		T68	1
auto[40:43]	auto[0]	17	1			T31	1		T59	2		T196	3
auto[40:43]	auto[1]	17	1			T31	1		T59	2		T196	3
auto[44:47]	auto[0]	16	1			T29	1		T250	3		T217	2
auto[44:47]	auto[1]	16	1			T29	1		T250	3		T217	2
auto[48:51]	auto[0]	6	1			T9	1		T62	1		T252	1
auto[48:51]	auto[1]	6	1			T9	1		T62	1		T252	1
auto[52:55]	auto[0]	99	1			T7	6		T4	1		T9	1
auto[52:55]	auto[1]	99	1			T7	6		T4	1		T9	1
auto[56:59]	auto[0]	99	1			T4	1		T8	2		T43	1
auto[56:59]	auto[1]	189	1			T4	1		T5	3		T8	2
auto[60:63]	auto[0]	7	1			T64	1		T55	2		T265	1
auto[60:63]	auto[1]	7	1			T64	1		T55	2		T265	1
auto[64:67]	auto[0]	10	1			T73	1		T57	1		T65	2
auto[64:67]	auto[1]	10	1			T73	1		T57	1		T65	2
auto[68:71]	auto[0]	12	1			T212	1		T225	2		T343	1
auto[68:71]	auto[1]	12	1			T212	1		T225	2		T343	1
auto[72:75]	auto[0]	11	1			T64	1		T58	1		T242	2
auto[72:75]	auto[1]	11	1			T64	1		T58	1		T242	2
auto[76:79]	auto[0]	16	1			T55	1		T67	1		T185	1
auto[76:79]	auto[1]	16	1			T55	1		T67	1		T185	1
auto[80:83]	auto[0]	9	1			T59	1		T207	1		T344	2
auto[80:83]	auto[1]	9	1			T59	1		T207	1		T344	2
auto[84:87]	auto[0]	6	1			T55	2		T73	1		T254	1
auto[84:87]	auto[1]	6	1			T55	2		T73	1		T254	1
auto[88:91]	auto[0]	84	1			T9	3		T12	3		T92	2
auto[88:91]	auto[1]	84	1			T9	3		T12	3		T92	2
auto[92:95]	auto[0]	4	1			T69	1		T356	3		-	-
auto[92:95]	auto[1]	4	1			T69	1		T356	3		-	-
auto[96:99]	auto[0]	10	1			T224	1		T232	1		T248	3
auto[96:99]	auto[1]	10	1			T224	1		T232	1		T248	3
auto[100:103]	auto[0]	14	1			T11	1		T328	4		T208	1
auto[100:103]	auto[1]	14	1			T11	1		T328	4		T208	1
auto[104:107]	auto[0]	107	1			T8	4		T9	1		T43	1
auto[104:107]	auto[1]	193	1			T2	3		T8	4		T9	1
auto[108:111]	auto[0]	5	1			T234	1		T81	1		T332	1
auto[108:111]	auto[1]	5	1			T234	1		T81	1		T332	1
auto[112:115]	auto[0]	11	1			T233	3		T329	2		T72	1
auto[112:115]	auto[1]	11	1			T233	3		T329	2		T72	1
auto[116:119]	auto[0]	6	1			T208	1		T195	1		T212	1
auto[116:119]	auto[1]	6	1			T208	1		T195	1		T212	1
auto[120:123]	auto[0]	16	1			T270	1		T63	2		T245	1
auto[120:123]	auto[1]	16	1			T270	1		T63	2		T245	1
auto[124:127]	auto[0]	10	1			T29	1		T62	2		T210	1
auto[124:127]	auto[1]	10	1			T29	1		T62	2		T210	1
auto[128:131]	auto[0]	4	1			T357	4		-	-		-	-
auto[128:131]	auto[1]	4	1			T357	4		-	-		-	-
auto[132:135]	auto[0]	8	1			T55	1		T231	3		T270	1
auto[132:135]	auto[1]	8	1			T55	1		T231	3		T270	1
auto[136:139]	auto[0]	13	1			T196	2		T326	1		T265	1
auto[136:139]	auto[1]	13	1			T196	2		T326	1		T265	1
auto[140:143]	auto[0]	4	1			T224	2		T242	1		T71	1
auto[140:143]	auto[1]	4	1			T224	2		T242	1		T71	1
auto[144:147]	auto[0]	10	1			T9	3		T65	1		T66	1
auto[144:147]	auto[1]	10	1			T9	3		T65	1		T66	1
auto[148:151]	auto[0]	3	1			T9	1		T245	2		-	-
auto[148:151]	auto[1]	3	1			T9	1		T245	2		-	-
auto[152:155]	auto[0]	7	1			T62	1		T260	1		T210	3
auto[152:155]	auto[1]	7	1			T62	1		T260	1		T210	3
auto[156:159]	auto[0]	84	1			T43	1		T44	2		T45	2
auto[156:159]	auto[1]	84	1			T43	1		T44	2		T45	2
auto[160:163]	auto[0]	10	1			T66	1		T58	1		T284	1
auto[160:163]	auto[1]	10	1			T66	1		T58	1		T284	1
auto[164:167]	auto[0]	20	1			T250	3		T81	2		T225	1
auto[164:167]	auto[1]	20	1			T250	3		T81	2		T225	1
auto[168:171]	auto[0]	6	1			T242	1		T248	1		T358	1
auto[168:171]	auto[1]	6	1			T242	1		T248	1		T358	1
auto[172:175]	auto[0]	9	1			T302	2		T359	1		T204	1
auto[172:175]	auto[1]	9	1			T302	2		T359	1		T204	1
auto[176:179]	auto[0]	5	1			T259	1		T313	1		T322	2
auto[176:179]	auto[1]	5	1			T259	1		T313	1		T322	2
auto[180:183]	auto[0]	47	1			T29	1		T26	4		T30	1
auto[180:183]	auto[1]	47	1			T29	1		T26	4		T30	1
auto[184:187]	auto[0]	88	1			T8	6		T180	1		T73	1
auto[184:187]	auto[1]	205	1			T2	4		T5	4		T8	6
auto[188:191]	auto[0]	10	1			T65	3		T67	1		T218	1
auto[188:191]	auto[1]	10	1			T65	3		T67	1		T218	1
auto[192:195]	auto[0]	8	1			T249	3		T201	1		T229	2
auto[192:195]	auto[1]	8	1			T249	3		T201	1		T229	2
auto[196:199]	auto[0]	5	1			T56	1		T243	1		T359	1
auto[196:199]	auto[1]	5	1			T56	1		T243	1		T359	1
auto[200:203]	auto[0]	5	1			T270	2		T246	1		T302	1
auto[200:203]	auto[1]	5	1			T270	2		T246	1		T302	1
auto[204:207]	auto[0]	7	1			T31	1		T66	1		T271	1
auto[204:207]	auto[1]	7	1			T31	1		T66	1		T271	1
auto[208:211]	auto[0]	13	1			T11	3		T224	2		T195	2
auto[208:211]	auto[1]	13	1			T11	3		T224	2		T195	2
auto[216:219]	auto[0]	12	1			T57	2		T58	1		T191	3
auto[216:219]	auto[1]	12	1			T57	2		T58	1		T191	3
auto[220:223]	auto[0]	8	1			T9	1		T328	1		T302	3
auto[220:223]	auto[1]	8	1			T9	1		T328	1		T302	3
auto[224:227]	auto[0]	13	1			T56	1		T57	1		T231	1
auto[224:227]	auto[1]	13	1			T56	1		T57	1		T231	1
auto[228:231]	auto[0]	11	1			T326	1		T302	1		T357	5
auto[228:231]	auto[1]	11	1			T326	1		T302	1		T357	5
auto[232:235]	auto[0]	136	1			T177	1		T26	4		T45	1
auto[232:235]	auto[1]	227	1			T2	4		T6	3		T82	7
auto[236:239]	auto[0]	3	1			T231	1		T360	1		T330	1
auto[236:239]	auto[1]	3	1			T231	1		T360	1		T330	1
auto[240:243]	auto[0]	13	1			T60	1		T194	2		T215	1
auto[240:243]	auto[1]	13	1			T60	1		T194	2		T215	1
auto[244:247]	auto[0]	8	1			T55	1		T196	3		T284	2
auto[244:247]	auto[1]	8	1			T55	1		T196	3		T284	2
auto[248:251]	auto[0]	16	1			T196	1		T192	1		T315	2
auto[248:251]	auto[1]	16	1			T196	1		T192	1		T315	2
auto[252:255]	auto[0]	13	1			T57	2		T284	1		T328	3
auto[252:255]	auto[1]	13	1			T57	2		T284	1		T328	3