Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

1612

1

T1

2

T2

14

T4

17

auto[1]

2114

1

T1

2

T2

14

T4

17

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	274	1			T4	4		T6	8		T7	2
auto[4:7]	276	1			T1	2		T2	2		T7	2
auto[8:11]	250	1			T4	2		T5	2		T8	2
auto[12:15]	16	1			T68	6		T194	4		T247	2
auto[16:19]	18	1			T253	2		T78	2		T193	4
auto[20:23]	186	1			T4	4		T7	2		T9	4
auto[24:27]	48	1			T2	2		T10	2		T19	2
auto[28:31]	24	1			T4	2		T7	4		T188	2
auto[32:35]	30	1			T25	2		T275	2		T80	2
auto[36:39]	36	1			T19	2		T25	6		T290	2
auto[40:43]	24	1			T255	4		T212	4		T77	4
auto[44:47]	30	1			T4	4		T9	4		T277	2
auto[48:51]	8	1			T277	2		T287	2		T354	2
auto[52:55]	218	1			T2	2		T4	2		T93	14
auto[56:59]	281	1			T2	4		T4	2		T5	6
auto[60:63]	12	1			T10	2		T19	2		T190	2
auto[64:67]	12	1			T74	2		T215	2		T349	4
auto[68:71]	20	1			T286	4		T194	6		T275	2
auto[72:75]	18	1			T9	2		T19	2		T187	2
auto[76:79]	20	1			T8	2		T182	2		T51	2
auto[80:83]	24	1			T8	2		T73	2		T55	2
auto[84:87]	26	1			T2	4		T277	2		T261	2
auto[88:91]	196	1			T72	2		T88	2		T43	2
auto[92:95]	16	1			T200	2		T80	2		T276	2
auto[96:99]	8	1			T73	4		T285	4		-	-
auto[100:103]	22	1			T72	6		T68	4		T55	2
auto[104:107]	255	1			T2	4		T19	2		T26	6
auto[108:111]	12	1			T71	2		T275	2		T359	4
auto[112:115]	14	1			T8	2		T273	2		T223	2
auto[116:119]	12	1			T4	2		T187	2		T276	4
auto[120:123]	6	1			T25	2		T240	4		-	-
auto[124:127]	16	1			T121	2		T77	2		T78	2
auto[128:131]	20	1			T10	2		T41	2		T297	4
auto[132:135]	10	1			T85	2		T242	2		T334	2
auto[136:139]	24	1			T7	4		T71	2		T76	4
auto[140:143]	32	1			T4	4		T186	2		T51	2
auto[144:147]	14	1			T71	4		T185	4		T74	4
auto[148:151]	18	1			T72	2		T80	2		T76	2
auto[152:155]	16	1			T189	2		T275	2		T212	4
auto[156:159]	188	1			T2	2		T4	2		T25	8
auto[160:163]	14	1			T297	4		T207	2		T243	6
auto[164:167]	22	1			T189	2		T264	2		T380	2
auto[168:171]	16	1			T19	4		T72	2		T297	2
auto[172:175]	14	1			T290	4		T77	2		T233	4
auto[176:179]	12	1			T41	2		T26	2		T273	2
auto[180:183]	92	1			T25	2		T26	4		T71	4
auto[184:187]	255	1			T2	2		T4	2		T5	5
auto[188:191]	10	1			T339	4		T276	2		T381	2
auto[192:195]	24	1			T8	2		T207	4		T334	4
auto[196:199]	22	1			T4	4		T9	4		T25	2
auto[200:203]	4	1			T189	2		T281	2		-	-
auto[204:207]	18	1			T200	2		T333	2		T240	2
auto[208:211]	16	1			T260	2		T193	4		T287	2
auto[212:215]	10	1			T183	2		T74	2		T280	2
auto[216:219]	8	1			T51	4		T290	2		T339	2
auto[220:223]	8	1			T73	2		T295	2		T217	2
auto[224:227]	30	1			T194	2		T205	4		T70	2
auto[228:231]	20	1			T73	4		T69	6		T252	6
auto[232:235]	323	1			T1	2		T2	6		T8	2
auto[236:239]	12	1			T7	6		T68	4		T254	2
auto[240:243]	8	1			T339	2		T382	4		T383	2
auto[244:247]	22	1			T71	4		T51	8		T205	2
auto[248:251]	28	1			T7	4		T73	6		T246	4
auto[252:255]	8	1			T69	2		T242	2		T364	4

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	97	1			T4	2		T6	4		T7	1
auto[0:3]	auto[1]	177	1			T4	2		T6	4		T7	1
auto[4:7]	auto[0]	138	1			T1	1		T2	1		T7	1
auto[4:7]	auto[1]	138	1			T1	1		T2	1		T7	1
auto[8:11]	auto[0]	65	1			T4	1		T8	1		T10	5
auto[8:11]	auto[1]	185	1			T4	1		T5	2		T8	1
auto[12:15]	auto[0]	8	1			T68	3		T194	2		T247	1
auto[12:15]	auto[1]	8	1			T68	3		T194	2		T247	1
auto[16:19]	auto[0]	9	1			T253	1		T78	1		T193	2
auto[16:19]	auto[1]	9	1			T253	1		T78	1		T193	2
auto[20:23]	auto[0]	93	1			T4	2		T7	1		T9	2
auto[20:23]	auto[1]	93	1			T4	2		T7	1		T9	2
auto[24:27]	auto[0]	24	1			T2	1		T10	1		T19	1
auto[24:27]	auto[1]	24	1			T2	1		T10	1		T19	1
auto[28:31]	auto[0]	12	1			T4	1		T7	2		T188	1
auto[28:31]	auto[1]	12	1			T4	1		T7	2		T188	1
auto[32:35]	auto[0]	15	1			T25	1		T275	1		T80	1
auto[32:35]	auto[1]	15	1			T25	1		T275	1		T80	1
auto[36:39]	auto[0]	18	1			T19	1		T25	3		T290	1
auto[36:39]	auto[1]	18	1			T19	1		T25	3		T290	1
auto[40:43]	auto[0]	12	1			T255	2		T212	2		T77	2
auto[40:43]	auto[1]	12	1			T255	2		T212	2		T77	2
auto[44:47]	auto[0]	15	1			T4	2		T9	2		T277	1
auto[44:47]	auto[1]	15	1			T4	2		T9	2		T277	1
auto[48:51]	auto[0]	4	1			T277	1		T287	1		T354	1
auto[48:51]	auto[1]	4	1			T277	1		T287	1		T354	1
auto[52:55]	auto[0]	109	1			T2	1		T4	1		T93	7
auto[52:55]	auto[1]	109	1			T2	1		T4	1		T93	7
auto[56:59]	auto[0]	90	1			T2	2		T4	1		T6	1
auto[56:59]	auto[1]	191	1			T2	2		T4	1		T5	6
auto[60:63]	auto[0]	6	1			T10	1		T19	1		T190	1
auto[60:63]	auto[1]	6	1			T10	1		T19	1		T190	1
auto[64:67]	auto[0]	6	1			T74	1		T215	1		T349	2
auto[64:67]	auto[1]	6	1			T74	1		T215	1		T349	2
auto[68:71]	auto[0]	10	1			T286	2		T194	3		T275	1
auto[68:71]	auto[1]	10	1			T286	2		T194	3		T275	1
auto[72:75]	auto[0]	9	1			T9	1		T19	1		T187	1
auto[72:75]	auto[1]	9	1			T9	1		T19	1		T187	1
auto[76:79]	auto[0]	10	1			T8	1		T182	1		T51	1
auto[76:79]	auto[1]	10	1			T8	1		T182	1		T51	1
auto[80:83]	auto[0]	12	1			T8	1		T73	1		T55	1
auto[80:83]	auto[1]	12	1			T8	1		T73	1		T55	1
auto[84:87]	auto[0]	13	1			T2	2		T277	1		T261	1
auto[84:87]	auto[1]	13	1			T2	2		T277	1		T261	1
auto[88:91]	auto[0]	98	1			T72	1		T88	1		T43	1
auto[88:91]	auto[1]	98	1			T72	1		T88	1		T43	1
auto[92:95]	auto[0]	8	1			T200	1		T80	1		T276	1
auto[92:95]	auto[1]	8	1			T200	1		T80	1		T276	1
auto[96:99]	auto[0]	4	1			T73	2		T285	2		-	-
auto[96:99]	auto[1]	4	1			T73	2		T285	2		-	-
auto[100:103]	auto[0]	11	1			T72	3		T68	2		T55	1
auto[100:103]	auto[1]	11	1			T72	3		T68	2		T55	1
auto[104:107]	auto[0]	98	1			T2	2		T19	1		T26	3
auto[104:107]	auto[1]	157	1			T2	2		T19	1		T26	3
auto[108:111]	auto[0]	6	1			T71	1		T275	1		T359	2
auto[108:111]	auto[1]	6	1			T71	1		T275	1		T359	2
auto[112:115]	auto[0]	7	1			T8	1		T273	1		T223	1
auto[112:115]	auto[1]	7	1			T8	1		T273	1		T223	1
auto[116:119]	auto[0]	6	1			T4	1		T187	1		T276	2
auto[116:119]	auto[1]	6	1			T4	1		T187	1		T276	2
auto[120:123]	auto[0]	3	1			T25	1		T240	2		-	-
auto[120:123]	auto[1]	3	1			T25	1		T240	2		-	-
auto[124:127]	auto[0]	8	1			T121	1		T77	1		T78	1
auto[124:127]	auto[1]	8	1			T121	1		T77	1		T78	1
auto[128:131]	auto[0]	10	1			T10	1		T41	1		T297	2
auto[128:131]	auto[1]	10	1			T10	1		T41	1		T297	2
auto[132:135]	auto[0]	5	1			T85	1		T242	1		T334	1
auto[132:135]	auto[1]	5	1			T85	1		T242	1		T334	1
auto[136:139]	auto[0]	12	1			T7	2		T71	1		T76	2
auto[136:139]	auto[1]	12	1			T7	2		T71	1		T76	2
auto[140:143]	auto[0]	16	1			T4	2		T186	1		T51	1
auto[140:143]	auto[1]	16	1			T4	2		T186	1		T51	1
auto[144:147]	auto[0]	7	1			T71	2		T185	2		T74	2
auto[144:147]	auto[1]	7	1			T71	2		T185	2		T74	2
auto[148:151]	auto[0]	9	1			T72	1		T80	1		T76	1
auto[148:151]	auto[1]	9	1			T72	1		T80	1		T76	1
auto[152:155]	auto[0]	8	1			T189	1		T275	1		T212	2
auto[152:155]	auto[1]	8	1			T189	1		T275	1		T212	2
auto[156:159]	auto[0]	94	1			T2	1		T4	1		T25	4
auto[156:159]	auto[1]	94	1			T2	1		T4	1		T25	4
auto[160:163]	auto[0]	7	1			T297	2		T207	1		T243	3
auto[160:163]	auto[1]	7	1			T297	2		T207	1		T243	3
auto[164:167]	auto[0]	11	1			T189	1		T264	1		T380	1
auto[164:167]	auto[1]	11	1			T189	1		T264	1		T380	1
auto[168:171]	auto[0]	8	1			T19	2		T72	1		T297	1
auto[168:171]	auto[1]	8	1			T19	2		T72	1		T297	1
auto[172:175]	auto[0]	7	1			T290	2		T77	1		T233	2
auto[172:175]	auto[1]	7	1			T290	2		T77	1		T233	2
auto[176:179]	auto[0]	6	1			T41	1		T26	1		T273	1
auto[176:179]	auto[1]	6	1			T41	1		T26	1		T273	1
auto[180:183]	auto[0]	46	1			T25	1		T26	2		T71	2
auto[180:183]	auto[1]	46	1			T25	1		T26	2		T71	2
auto[184:187]	auto[0]	89	1			T2	1		T4	1		T7	3
auto[184:187]	auto[1]	166	1			T2	1		T4	1		T5	5
auto[188:191]	auto[0]	5	1			T339	2		T276	1		T381	1
auto[188:191]	auto[1]	5	1			T339	2		T276	1		T381	1
auto[192:195]	auto[0]	12	1			T8	1		T207	2		T334	2
auto[192:195]	auto[1]	12	1			T8	1		T207	2		T334	2
auto[196:199]	auto[0]	11	1			T4	2		T9	2		T25	1
auto[196:199]	auto[1]	11	1			T4	2		T9	2		T25	1
auto[200:203]	auto[0]	2	1			T189	1		T281	1		-	-
auto[200:203]	auto[1]	2	1			T189	1		T281	1		-	-
auto[204:207]	auto[0]	9	1			T200	1		T333	1		T240	1
auto[204:207]	auto[1]	9	1			T200	1		T333	1		T240	1
auto[208:211]	auto[0]	8	1			T260	1		T193	2		T287	1
auto[208:211]	auto[1]	8	1			T260	1		T193	2		T287	1
auto[212:215]	auto[0]	5	1			T183	1		T74	1		T280	1
auto[212:215]	auto[1]	5	1			T183	1		T74	1		T280	1
auto[216:219]	auto[0]	4	1			T51	2		T290	1		T339	1
auto[216:219]	auto[1]	4	1			T51	2		T290	1		T339	1
auto[220:223]	auto[0]	4	1			T73	1		T295	1		T217	1
auto[220:223]	auto[1]	4	1			T73	1		T295	1		T217	1
auto[224:227]	auto[0]	15	1			T194	1		T205	2		T70	1
auto[224:227]	auto[1]	15	1			T194	1		T205	2		T70	1
auto[228:231]	auto[0]	10	1			T73	2		T69	3		T252	3
auto[228:231]	auto[1]	10	1			T73	2		T69	3		T252	3
auto[232:235]	auto[0]	129	1			T1	1		T2	3		T8	1
auto[232:235]	auto[1]	194	1			T1	1		T2	3		T8	1
auto[236:239]	auto[0]	6	1			T7	3		T68	2		T254	1
auto[236:239]	auto[1]	6	1			T7	3		T68	2		T254	1
auto[240:243]	auto[0]	4	1			T339	1		T382	2		T383	1
auto[240:243]	auto[1]	4	1			T339	1		T382	2		T383	1
auto[244:247]	auto[0]	11	1			T71	2		T51	4		T205	1
auto[244:247]	auto[1]	11	1			T71	2		T51	4		T205	1
auto[248:251]	auto[0]	14	1			T7	2		T73	3		T246	2
auto[248:251]	auto[1]	14	1			T7	2		T73	3		T246	2
auto[252:255]	auto[0]	4	1			T69	1		T242	1		T364	2
auto[252:255]	auto[1]	4	1			T69	1		T242	1		T364	2