Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

1757

1

T2

11

T4

4

T7

5

auto[1]

2271

1

T2

11

T4

4

T5

8

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	307	1			T2	2		T5	4		T9	7
auto[4:7]	252	1			T2	4		T6	2		T10	2
auto[8:11]	252	1			T4	2		T11	4		T12	2
auto[12:15]	28	1			T238	6		T204	2		T215	2
auto[16:19]	34	1			T68	2		T72	4		T245	2
auto[20:23]	244	1			T2	2		T6	3		T7	2
auto[24:27]	22	1			T4	2		T30	2		T214	2
auto[28:31]	18	1			T94	2		T74	4		T310	2
auto[32:35]	22	1			T252	2		T75	2		T217	4
auto[36:39]	30	1			T11	2		T186	2		T262	2
auto[40:43]	25	1			T94	12		T66	2		T70	2
auto[44:47]	14	1			T71	8		T254	2		T199	2
auto[48:51]	20	1			T64	6		T96	6		T240	4
auto[52:55]	170	1			T6	1		T63	8		T186	4
auto[56:59]	307	1			T6	4		T7	4		T8	2
auto[60:63]	28	1			T184	4		T69	6		T205	2
auto[64:67]	42	1			T71	6		T287	2		T84	4
auto[68:71]	22	1			T65	2		T252	2		T58	2
auto[72:75]	26	1			T10	2		T96	4		T262	2
auto[76:79]	6	1			T205	2		T233	2		T292	2
auto[80:83]	18	1			T61	2		T64	4		T190	4
auto[84:87]	18	1			T65	2		T190	2		T216	2
auto[88:91]	243	1			T6	1		T7	2		T12	2
auto[92:95]	10	1			T68	4		T327	2		T213	2
auto[96:99]	30	1			T176	2		T71	4		T73	4
auto[100:103]	10	1			T4	2		T176	4		T250	2
auto[104:107]	271	1			T5	4		T12	4		T45	4
auto[108:111]	22	1			T73	2		T314	2		T255	2
auto[112:115]	12	1			T247	4		T287	2		T84	2
auto[116:119]	6	1			T294	4		T233	2		-	-
auto[120:123]	18	1			T2	4		T10	6		T281	2
auto[124:127]	36	1			T69	2		T71	2		T238	2
auto[128:131]	36	1			T62	2		T64	4		T222	2
auto[132:135]	26	1			T2	6		T10	2		T300	4
auto[136:139]	4	1			T330	4		-	-		-	-
auto[140:143]	29	1			T6	1		T64	4		T216	6
auto[144:147]	20	1			T61	6		T71	4		T266	2
auto[148:151]	24	1			T238	2		T84	2		T215	8
auto[152:155]	2	1			T289	2		-	-		-	-
auto[156:159]	222	1			T2	2		T4	2		T6	1
auto[160:163]	12	1			T10	2		T30	2		T337	2
auto[164:167]	30	1			T61	4		T190	2		T58	4
auto[168:171]	8	1			T261	2		T325	2		T338	4
auto[172:175]	17	1			T94	2		T64	2		T66	2
auto[176:179]	16	1			T61	6		T51	2		T255	4
auto[180:183]	79	1			T6	3		T29	2		T30	2
auto[184:187]	294	1			T12	6		T63	2		T30	4
auto[188:191]	30	1			T66	6		T173	2		T195	4
auto[192:195]	14	1			T64	2		T170	2		T68	2
auto[196:199]	22	1			T10	4		T66	2		T70	2
auto[200:203]	20	1			T210	4		T223	2		T335	4
auto[204:207]	8	1			T62	4		T268	2		T386	2
auto[208:211]	12	1			T186	4		T222	4		T266	2
auto[212:215]	15	1			T6	1		T312	4		T288	4
auto[216:219]	41	1			T69	4		T170	2		T222	6
auto[220:223]	36	1			T170	4		T176	2		T190	6
auto[224:227]	24	1			T238	6		T57	2		T58	4
auto[228:231]	9	1			T6	1		T246	6		T334	2
auto[232:235]	321	1			T6	1		T10	2		T86	4
auto[236:239]	16	1			T173	2		T68	4		T204	4
auto[240:243]	18	1			T63	6		T287	6		T58	6
auto[244:247]	20	1			T6	1		T176	4		T287	2
auto[248:251]	18	1			T62	4		T63	2		T269	4
auto[252:255]	22	1			T2	2		T11	2		T224	6

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	102	1			T2	1		T12	2		T87	2
auto[0:3]	auto[1]	205	1			T2	1		T5	4		T9	7
auto[4:7]	auto[0]	124	1			T2	2		T10	1		T27	2
auto[4:7]	auto[1]	128	1			T2	2		T6	2		T10	1
auto[8:11]	auto[0]	100	1			T4	1		T11	2		T12	1
auto[8:11]	auto[1]	152	1			T4	1		T11	2		T12	1
auto[12:15]	auto[0]	14	1			T238	3		T204	1		T215	1
auto[12:15]	auto[1]	14	1			T238	3		T204	1		T215	1
auto[16:19]	auto[0]	17	1			T68	1		T72	2		T245	1
auto[16:19]	auto[1]	17	1			T68	1		T72	2		T245	1
auto[20:23]	auto[0]	119	1			T2	1		T7	1		T12	1
auto[20:23]	auto[1]	125	1			T2	1		T6	3		T7	1
auto[24:27]	auto[0]	11	1			T4	1		T30	1		T214	1
auto[24:27]	auto[1]	11	1			T4	1		T30	1		T214	1
auto[28:31]	auto[0]	9	1			T94	1		T74	2		T310	1
auto[28:31]	auto[1]	9	1			T94	1		T74	2		T310	1
auto[32:35]	auto[0]	11	1			T252	1		T75	1		T217	2
auto[32:35]	auto[1]	11	1			T252	1		T75	1		T217	2
auto[36:39]	auto[0]	15	1			T11	1		T186	1		T262	1
auto[36:39]	auto[1]	15	1			T11	1		T186	1		T262	1
auto[40:43]	auto[0]	13	1			T94	6		T66	1		T70	1
auto[40:43]	auto[1]	12	1			T94	6		T66	1		T70	1
auto[44:47]	auto[0]	7	1			T71	4		T254	1		T199	1
auto[44:47]	auto[1]	7	1			T71	4		T254	1		T199	1
auto[48:51]	auto[0]	10	1			T64	3		T96	3		T240	2
auto[48:51]	auto[1]	10	1			T64	3		T96	3		T240	2
auto[52:55]	auto[0]	85	1			T63	4		T186	2		T96	2
auto[52:55]	auto[1]	85	1			T6	1		T63	4		T186	2
auto[56:59]	auto[0]	120	1			T7	2		T8	1		T12	4
auto[56:59]	auto[1]	187	1			T6	4		T7	2		T8	1
auto[60:63]	auto[0]	14	1			T184	2		T69	3		T205	1
auto[60:63]	auto[1]	14	1			T184	2		T69	3		T205	1
auto[64:67]	auto[0]	21	1			T71	3		T287	1		T84	2
auto[64:67]	auto[1]	21	1			T71	3		T287	1		T84	2
auto[68:71]	auto[0]	11	1			T65	1		T252	1		T58	1
auto[68:71]	auto[1]	11	1			T65	1		T252	1		T58	1
auto[72:75]	auto[0]	13	1			T10	1		T96	2		T262	1
auto[72:75]	auto[1]	13	1			T10	1		T96	2		T262	1
auto[76:79]	auto[0]	3	1			T205	1		T233	1		T292	1
auto[76:79]	auto[1]	3	1			T205	1		T233	1		T292	1
auto[80:83]	auto[0]	9	1			T61	1		T64	2		T190	2
auto[80:83]	auto[1]	9	1			T61	1		T64	2		T190	2
auto[84:87]	auto[0]	9	1			T65	1		T190	1		T216	1
auto[84:87]	auto[1]	9	1			T65	1		T190	1		T216	1
auto[88:91]	auto[0]	120	1			T7	1		T12	1		T79	3
auto[88:91]	auto[1]	123	1			T6	1		T7	1		T12	1
auto[92:95]	auto[0]	5	1			T68	2		T327	1		T213	1
auto[92:95]	auto[1]	5	1			T68	2		T327	1		T213	1
auto[96:99]	auto[0]	15	1			T176	1		T71	2		T73	2
auto[96:99]	auto[1]	15	1			T176	1		T71	2		T73	2
auto[100:103]	auto[0]	5	1			T4	1		T176	2		T250	1
auto[100:103]	auto[1]	5	1			T4	1		T176	2		T250	1
auto[104:107]	auto[0]	89	1			T12	2		T45	2		T63	1
auto[104:107]	auto[1]	182	1			T5	4		T12	2		T45	2
auto[108:111]	auto[0]	11	1			T73	1		T314	1		T255	1
auto[108:111]	auto[1]	11	1			T73	1		T314	1		T255	1
auto[112:115]	auto[0]	6	1			T247	2		T287	1		T84	1
auto[112:115]	auto[1]	6	1			T247	2		T287	1		T84	1
auto[116:119]	auto[0]	3	1			T294	2		T233	1		-	-
auto[116:119]	auto[1]	3	1			T294	2		T233	1		-	-
auto[120:123]	auto[0]	9	1			T2	2		T10	3		T281	1
auto[120:123]	auto[1]	9	1			T2	2		T10	3		T281	1
auto[124:127]	auto[0]	18	1			T69	1		T71	1		T238	1
auto[124:127]	auto[1]	18	1			T69	1		T71	1		T238	1
auto[128:131]	auto[0]	18	1			T62	1		T64	2		T222	1
auto[128:131]	auto[1]	18	1			T62	1		T64	2		T222	1
auto[132:135]	auto[0]	13	1			T2	3		T10	1		T300	2
auto[132:135]	auto[1]	13	1			T2	3		T10	1		T300	2
auto[136:139]	auto[0]	2	1			T330	2		-	-		-	-
auto[136:139]	auto[1]	2	1			T330	2		-	-		-	-
auto[140:143]	auto[0]	14	1			T64	2		T216	3		T220	1
auto[140:143]	auto[1]	15	1			T6	1		T64	2		T216	3
auto[144:147]	auto[0]	10	1			T61	3		T71	2		T266	1
auto[144:147]	auto[1]	10	1			T61	3		T71	2		T266	1
auto[148:151]	auto[0]	12	1			T238	1		T84	1		T215	4
auto[148:151]	auto[1]	12	1			T238	1		T84	1		T215	4
auto[152:155]	auto[0]	1	1			T289	1		-	-		-	-
auto[152:155]	auto[1]	1	1			T289	1		-	-		-	-
auto[156:159]	auto[0]	110	1			T2	1		T4	1		T7	1
auto[156:159]	auto[1]	112	1			T2	1		T4	1		T6	1
auto[160:163]	auto[0]	6	1			T10	1		T30	1		T337	1
auto[160:163]	auto[1]	6	1			T10	1		T30	1		T337	1
auto[164:167]	auto[0]	15	1			T61	2		T190	1		T58	2
auto[164:167]	auto[1]	15	1			T61	2		T190	1		T58	2
auto[168:171]	auto[0]	4	1			T261	1		T325	1		T338	2
auto[168:171]	auto[1]	4	1			T261	1		T325	1		T338	2
auto[172:175]	auto[0]	8	1			T94	1		T64	1		T66	1
auto[172:175]	auto[1]	9	1			T94	1		T64	1		T66	1
auto[176:179]	auto[0]	8	1			T61	3		T51	1		T255	2
auto[176:179]	auto[1]	8	1			T61	3		T51	1		T255	2
auto[180:183]	auto[0]	38	1			T29	1		T30	1		T31	5
auto[180:183]	auto[1]	41	1			T6	3		T29	1		T30	1
auto[184:187]	auto[0]	101	1			T12	3		T63	1		T30	2
auto[184:187]	auto[1]	193	1			T12	3		T63	1		T30	2
auto[188:191]	auto[0]	15	1			T66	3		T173	1		T195	2
auto[188:191]	auto[1]	15	1			T66	3		T173	1		T195	2
auto[192:195]	auto[0]	7	1			T64	1		T170	1		T68	1
auto[192:195]	auto[1]	7	1			T64	1		T170	1		T68	1
auto[196:199]	auto[0]	11	1			T10	2		T66	1		T70	1
auto[196:199]	auto[1]	11	1			T10	2		T66	1		T70	1
auto[200:203]	auto[0]	10	1			T210	2		T223	1		T335	2
auto[200:203]	auto[1]	10	1			T210	2		T223	1		T335	2
auto[204:207]	auto[0]	4	1			T62	2		T268	1		T386	1
auto[204:207]	auto[1]	4	1			T62	2		T268	1		T386	1
auto[208:211]	auto[0]	6	1			T186	2		T222	2		T266	1
auto[208:211]	auto[1]	6	1			T186	2		T222	2		T266	1
auto[212:215]	auto[0]	7	1			T312	2		T288	2		T387	2
auto[212:215]	auto[1]	8	1			T6	1		T312	2		T288	2
auto[216:219]	auto[0]	20	1			T69	2		T170	1		T222	3
auto[216:219]	auto[1]	21	1			T69	2		T170	1		T222	3
auto[220:223]	auto[0]	18	1			T170	2		T176	1		T190	3
auto[220:223]	auto[1]	18	1			T170	2		T176	1		T190	3
auto[224:227]	auto[0]	12	1			T238	3		T57	1		T58	2
auto[224:227]	auto[1]	12	1			T238	3		T57	1		T58	2
auto[228:231]	auto[0]	4	1			T246	3		T334	1		-	-
auto[228:231]	auto[1]	5	1			T6	1		T246	3		T334	1
auto[232:235]	auto[0]	120	1			T10	1		T61	1		T45	4
auto[232:235]	auto[1]	201	1			T6	1		T10	1		T86	4
auto[236:239]	auto[0]	7	1			T173	1		T68	2		T204	2
auto[236:239]	auto[1]	9	1			T173	1		T68	2		T204	2
auto[240:243]	auto[0]	9	1			T63	3		T287	3		T58	3
auto[240:243]	auto[1]	9	1			T63	3		T287	3		T58	3
auto[244:247]	auto[0]	9	1			T176	2		T287	1		T51	2
auto[244:247]	auto[1]	11	1			T6	1		T176	2		T287	1
auto[248:251]	auto[0]	9	1			T62	2		T63	1		T269	2
auto[248:251]	auto[1]	9	1			T62	2		T63	1		T269	2
auto[252:255]	auto[0]	11	1			T2	1		T11	1		T224	3
auto[252:255]	auto[1]	11	1			T2	1		T11	1		T224	3