Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

1675

1

T1

7

T4

13

T5

1

auto[1]

2179

1

T1

7

T4

13

T5

1

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	267	1			T97	2		T53	2		T26	2
auto[4:7]	286	1			T1	12		T4	4		T70	2
auto[8:11]	287	1			T4	6		T46	2		T74	4
auto[12:15]	30	1			T98	4		T252	2		T176	2
auto[16:19]	22	1			T234	4		T254	4		T283	6
auto[20:23]	179	1			T6	6		T8	2		T83	4
auto[24:27]	2	1			T299	2		-	-		-	-
auto[28:31]	14	1			T176	2		T201	4		T223	2
auto[32:35]	20	1			T97	6		T299	2		T253	4
auto[36:39]	12	1			T329	2		T201	2		T272	2
auto[40:43]	31	1			T68	2		T75	8		T190	2
auto[44:47]	2	1			T76	2		-	-		-	-
auto[48:51]	21	1			T281	2		T320	2		T94	1
auto[52:55]	162	1			T4	4		T46	8		T47	2
auto[56:59]	297	1			T4	2		T9	4		T11	4
auto[60:63]	28	1			T68	2		T239	4		T223	6
auto[64:67]	12	1			T98	6		T81	2		T188	2
auto[68:71]	38	1			T11	2		T67	6		T83	4
auto[72:75]	18	1			T97	6		T282	4		T229	2
auto[76:79]	20	1			T190	4		T28	2		T253	2
auto[80:83]	20	1			T209	2		T337	4		T392	2
auto[84:87]	20	1			T69	2		T181	2		T234	2
auto[88:91]	180	1			T11	4		T46	6		T47	2
auto[92:95]	26	1			T283	6		T298	2		T370	2
auto[96:99]	28	1			T67	4		T175	4		T176	6
auto[100:103]	18	1			T9	2		T253	2		T73	2
auto[104:107]	307	1			T5	2		T11	2		T70	2
auto[108:111]	18	1			T67	2		T345	2		T370	4
auto[112:115]	22	1			T190	4		T204	4		T94	2
auto[116:119]	12	1			T225	2		T276	4		T203	2
auto[120:123]	28	1			T4	2		T9	2		T70	2
auto[124:127]	38	1			T4	6		T266	2		T176	2
auto[128:131]	20	1			T11	4		T27	2		T78	4
auto[132:135]	22	1			T83	6		T298	2		T392	2
auto[136:139]	16	1			T282	2		T173	2		T320	2
auto[140:143]	8	1			T229	2		T239	2		T299	4
auto[144:147]	18	1			T97	6		T81	2		T82	4
auto[148:151]	20	1			T251	2		T271	2		T345	4
auto[152:155]	14	1			T27	2		T254	2		T299	2
auto[156:159]	196	1			T6	4		T97	2		T47	2
auto[160:163]	20	1			T320	2		T79	2		T253	2
auto[164:167]	28	1			T75	2		T281	6		T226	4
auto[168:171]	10	1			T58	4		T207	2		T82	2
auto[172:175]	18	1			T9	4		T75	4		T81	2
auto[176:179]	10	1			T281	2		T266	2		T175	2
auto[180:183]	107	1			T1	2		T26	4		T27	2
auto[184:187]	243	1			T9	2		T11	2		T83	6
auto[188:191]	14	1			T276	4		T78	4		T82	4
auto[192:195]	22	1			T83	4		T28	2		T187	4
auto[196:199]	6	1			T181	6		-	-		-	-
auto[200:203]	8	1			T266	6		T299	2		-	-
auto[204:207]	22	1			T361	6		T207	4		T332	2
auto[208:211]	10	1			T76	2		T252	2		T282	2
auto[212:215]	18	1			T76	2		T253	4		T188	2
auto[216:219]	22	1			T276	2		T252	2		T357	6
auto[220:223]	24	1			T26	4		T281	2		T357	4
auto[224:227]	8	1			T10	2		T26	2		T393	4
auto[228:231]	18	1			T77	4		T80	2		T370	2
auto[232:235]	353	1			T10	2		T74	2		T49	2
auto[236:239]	16	1			T329	2		T295	2		T198	4
auto[240:243]	14	1			T281	2		T94	2		T72	2
auto[244:247]	32	1			T75	6		T268	4		T295	6
auto[248:251]	22	1			T74	2		T68	2		T276	2
auto[252:255]	30	1			T4	2		T175	2		T94	4

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	94	1			T97	1		T53	1		T26	1
auto[0:3]	auto[1]	173	1			T97	1		T53	1		T26	1
auto[4:7]	auto[0]	143	1			T1	6		T4	2		T70	1
auto[4:7]	auto[1]	143	1			T1	6		T4	2		T70	1
auto[8:11]	auto[0]	116	1			T4	3		T46	1		T74	2
auto[8:11]	auto[1]	171	1			T4	3		T46	1		T74	2
auto[12:15]	auto[0]	15	1			T98	2		T252	1		T176	1
auto[12:15]	auto[1]	15	1			T98	2		T252	1		T176	1
auto[16:19]	auto[0]	11	1			T234	2		T254	2		T283	3
auto[16:19]	auto[1]	11	1			T234	2		T254	2		T283	3
auto[20:23]	auto[0]	88	1			T6	3		T8	1		T83	2
auto[20:23]	auto[1]	91	1			T6	3		T8	1		T83	2
auto[24:27]	auto[0]	1	1			T299	1		-	-		-	-
auto[24:27]	auto[1]	1	1			T299	1		-	-		-	-
auto[28:31]	auto[0]	7	1			T176	1		T201	2		T223	1
auto[28:31]	auto[1]	7	1			T176	1		T201	2		T223	1
auto[32:35]	auto[0]	10	1			T97	3		T299	1		T253	2
auto[32:35]	auto[1]	10	1			T97	3		T299	1		T253	2
auto[36:39]	auto[0]	6	1			T329	1		T201	1		T272	1
auto[36:39]	auto[1]	6	1			T329	1		T201	1		T272	1
auto[40:43]	auto[0]	15	1			T68	1		T75	4		T190	1
auto[40:43]	auto[1]	16	1			T68	1		T75	4		T190	1
auto[44:47]	auto[0]	1	1			T76	1		-	-		-	-
auto[44:47]	auto[1]	1	1			T76	1		-	-		-	-
auto[48:51]	auto[0]	10	1			T281	1		T320	1		T240	1
auto[48:51]	auto[1]	11	1			T281	1		T320	1		T94	1
auto[52:55]	auto[0]	80	1			T4	2		T46	4		T47	1
auto[52:55]	auto[1]	82	1			T4	2		T46	4		T47	1
auto[56:59]	auto[0]	111	1			T4	1		T9	2		T11	2
auto[56:59]	auto[1]	186	1			T4	1		T9	2		T11	2
auto[60:63]	auto[0]	14	1			T68	1		T239	2		T223	3
auto[60:63]	auto[1]	14	1			T68	1		T239	2		T223	3
auto[64:67]	auto[0]	6	1			T98	3		T81	1		T188	1
auto[64:67]	auto[1]	6	1			T98	3		T81	1		T188	1
auto[68:71]	auto[0]	19	1			T11	1		T67	3		T83	2
auto[68:71]	auto[1]	19	1			T11	1		T67	3		T83	2
auto[72:75]	auto[0]	9	1			T97	3		T282	2		T229	1
auto[72:75]	auto[1]	9	1			T97	3		T282	2		T229	1
auto[76:79]	auto[0]	10	1			T190	2		T28	1		T253	1
auto[76:79]	auto[1]	10	1			T190	2		T28	1		T253	1
auto[80:83]	auto[0]	10	1			T209	1		T337	2		T392	1
auto[80:83]	auto[1]	10	1			T209	1		T337	2		T392	1
auto[84:87]	auto[0]	10	1			T69	1		T181	1		T234	1
auto[84:87]	auto[1]	10	1			T69	1		T181	1		T234	1
auto[88:91]	auto[0]	90	1			T11	2		T46	3		T47	1
auto[88:91]	auto[1]	90	1			T11	2		T46	3		T47	1
auto[92:95]	auto[0]	13	1			T283	3		T298	1		T370	1
auto[92:95]	auto[1]	13	1			T283	3		T298	1		T370	1
auto[96:99]	auto[0]	14	1			T67	2		T175	2		T176	3
auto[96:99]	auto[1]	14	1			T67	2		T175	2		T176	3
auto[100:103]	auto[0]	9	1			T9	1		T253	1		T73	1
auto[100:103]	auto[1]	9	1			T9	1		T253	1		T73	1
auto[104:107]	auto[0]	108	1			T5	1		T11	1		T70	1
auto[104:107]	auto[1]	199	1			T5	1		T11	1		T70	1
auto[108:111]	auto[0]	9	1			T67	1		T345	1		T370	2
auto[108:111]	auto[1]	9	1			T67	1		T345	1		T370	2
auto[112:115]	auto[0]	10	1			T190	2		T204	2		T333	1
auto[112:115]	auto[1]	12	1			T190	2		T204	2		T94	2
auto[116:119]	auto[0]	6	1			T225	1		T276	2		T203	1
auto[116:119]	auto[1]	6	1			T225	1		T276	2		T203	1
auto[120:123]	auto[0]	14	1			T4	1		T9	1		T70	1
auto[120:123]	auto[1]	14	1			T4	1		T9	1		T70	1
auto[124:127]	auto[0]	18	1			T4	3		T266	1		T176	1
auto[124:127]	auto[1]	20	1			T4	3		T266	1		T176	1
auto[128:131]	auto[0]	10	1			T11	2		T27	1		T78	2
auto[128:131]	auto[1]	10	1			T11	2		T27	1		T78	2
auto[132:135]	auto[0]	11	1			T83	3		T298	1		T392	1
auto[132:135]	auto[1]	11	1			T83	3		T298	1		T392	1
auto[136:139]	auto[0]	8	1			T282	1		T173	1		T320	1
auto[136:139]	auto[1]	8	1			T282	1		T173	1		T320	1
auto[140:143]	auto[0]	4	1			T229	1		T239	1		T299	2
auto[140:143]	auto[1]	4	1			T229	1		T239	1		T299	2
auto[144:147]	auto[0]	9	1			T97	3		T81	1		T82	2
auto[144:147]	auto[1]	9	1			T97	3		T81	1		T82	2
auto[148:151]	auto[0]	10	1			T251	1		T271	1		T345	2
auto[148:151]	auto[1]	10	1			T251	1		T271	1		T345	2
auto[152:155]	auto[0]	7	1			T27	1		T254	1		T299	1
auto[152:155]	auto[1]	7	1			T27	1		T254	1		T299	1
auto[156:159]	auto[0]	97	1			T6	2		T97	1		T47	1
auto[156:159]	auto[1]	99	1			T6	2		T97	1		T47	1
auto[160:163]	auto[0]	10	1			T320	1		T79	1		T253	1
auto[160:163]	auto[1]	10	1			T320	1		T79	1		T253	1
auto[164:167]	auto[0]	14	1			T75	1		T281	3		T226	2
auto[164:167]	auto[1]	14	1			T75	1		T281	3		T226	2
auto[168:171]	auto[0]	5	1			T58	2		T207	1		T82	1
auto[168:171]	auto[1]	5	1			T58	2		T207	1		T82	1
auto[172:175]	auto[0]	9	1			T9	2		T75	2		T81	1
auto[172:175]	auto[1]	9	1			T9	2		T75	2		T81	1
auto[176:179]	auto[0]	5	1			T281	1		T266	1		T175	1
auto[176:179]	auto[1]	5	1			T281	1		T266	1		T175	1
auto[180:183]	auto[0]	53	1			T1	1		T26	2		T27	1
auto[180:183]	auto[1]	54	1			T1	1		T26	2		T27	1
auto[184:187]	auto[0]	77	1			T9	1		T11	1		T83	3
auto[184:187]	auto[1]	166	1			T9	1		T11	1		T83	3
auto[188:191]	auto[0]	7	1			T276	2		T78	2		T82	2
auto[188:191]	auto[1]	7	1			T276	2		T78	2		T82	2
auto[192:195]	auto[0]	11	1			T83	2		T28	1		T187	2
auto[192:195]	auto[1]	11	1			T83	2		T28	1		T187	2
auto[196:199]	auto[0]	3	1			T181	3		-	-		-	-
auto[196:199]	auto[1]	3	1			T181	3		-	-		-	-
auto[200:203]	auto[0]	4	1			T266	3		T299	1		-	-
auto[200:203]	auto[1]	4	1			T266	3		T299	1		-	-
auto[204:207]	auto[0]	11	1			T361	3		T207	2		T332	1
auto[204:207]	auto[1]	11	1			T361	3		T207	2		T332	1
auto[208:211]	auto[0]	5	1			T76	1		T252	1		T282	1
auto[208:211]	auto[1]	5	1			T76	1		T252	1		T282	1
auto[212:215]	auto[0]	9	1			T76	1		T253	2		T188	1
auto[212:215]	auto[1]	9	1			T76	1		T253	2		T188	1
auto[216:219]	auto[0]	11	1			T276	1		T252	1		T357	3
auto[216:219]	auto[1]	11	1			T276	1		T252	1		T357	3
auto[220:223]	auto[0]	12	1			T26	2		T281	1		T357	2
auto[220:223]	auto[1]	12	1			T26	2		T281	1		T357	2
auto[224:227]	auto[0]	4	1			T10	1		T26	1		T393	2
auto[224:227]	auto[1]	4	1			T10	1		T26	1		T393	2
auto[228:231]	auto[0]	9	1			T77	2		T80	1		T370	1
auto[228:231]	auto[1]	9	1			T77	2		T80	1		T370	1
auto[232:235]	auto[0]	129	1			T10	1		T74	1		T49	1
auto[232:235]	auto[1]	224	1			T10	1		T74	1		T49	1
auto[236:239]	auto[0]	8	1			T329	1		T295	1		T198	2
auto[236:239]	auto[1]	8	1			T329	1		T295	1		T198	2
auto[240:243]	auto[0]	6	1			T281	1		T72	1		T297	1
auto[240:243]	auto[1]	8	1			T281	1		T94	2		T72	1
auto[244:247]	auto[0]	16	1			T75	3		T268	2		T295	3
auto[244:247]	auto[1]	16	1			T75	3		T268	2		T295	3
auto[248:251]	auto[0]	11	1			T74	1		T68	1		T276	1
auto[248:251]	auto[1]	11	1			T74	1		T68	1		T276	1
auto[252:255]	auto[0]	13	1			T4	1		T175	1		T201	2
auto[252:255]	auto[1]	17	1			T4	1		T175	1		T94	4