| T816 |
/workspace/coverage/default/27.spi_device_flash_all.209657974 |
|
|
May 16 03:27:13 PM PDT 24 |
May 16 03:27:31 PM PDT 24 |
1075176873 ps |
| T817 |
/workspace/coverage/default/27.spi_device_upload.3253085260 |
|
|
May 16 03:27:13 PM PDT 24 |
May 16 03:27:24 PM PDT 24 |
99029337 ps |
| T818 |
/workspace/coverage/default/45.spi_device_pass_addr_payload_swap.3912386093 |
|
|
May 16 03:28:23 PM PDT 24 |
May 16 03:28:45 PM PDT 24 |
16318850039 ps |
| T819 |
/workspace/coverage/default/8.spi_device_tpm_sts_read.814604997 |
|
|
May 16 03:26:13 PM PDT 24 |
May 16 03:26:20 PM PDT 24 |
17304507 ps |
| T820 |
/workspace/coverage/default/16.spi_device_stress_all.4116357908 |
|
|
May 16 03:26:39 PM PDT 24 |
May 16 03:27:16 PM PDT 24 |
2392993780 ps |
| T821 |
/workspace/coverage/default/5.spi_device_pass_cmd_filtering.4183853170 |
|
|
May 16 03:26:08 PM PDT 24 |
May 16 03:26:16 PM PDT 24 |
77539078 ps |
| T822 |
/workspace/coverage/default/46.spi_device_tpm_sts_read.90410145 |
|
|
May 16 03:28:24 PM PDT 24 |
May 16 03:28:30 PM PDT 24 |
16248385 ps |
| T823 |
/workspace/coverage/default/42.spi_device_read_buffer_direct.295503356 |
|
|
May 16 03:28:14 PM PDT 24 |
May 16 03:28:27 PM PDT 24 |
1487480303 ps |
| T824 |
/workspace/coverage/default/38.spi_device_flash_mode.540886691 |
|
|
May 16 03:27:55 PM PDT 24 |
May 16 03:28:05 PM PDT 24 |
499656096 ps |
| T825 |
/workspace/coverage/default/26.spi_device_tpm_sts_read.4290011491 |
|
|
May 16 03:27:09 PM PDT 24 |
May 16 03:27:19 PM PDT 24 |
35041916 ps |
| T826 |
/workspace/coverage/default/17.spi_device_alert_test.3053203282 |
|
|
May 16 03:26:36 PM PDT 24 |
May 16 03:26:48 PM PDT 24 |
46638357 ps |
| T827 |
/workspace/coverage/default/32.spi_device_stress_all.3826654174 |
|
|
May 16 03:27:42 PM PDT 24 |
May 16 03:32:37 PM PDT 24 |
96143784580 ps |
| T828 |
/workspace/coverage/default/17.spi_device_intercept.1541856691 |
|
|
May 16 03:26:40 PM PDT 24 |
May 16 03:27:11 PM PDT 24 |
8674743899 ps |
| T829 |
/workspace/coverage/default/28.spi_device_flash_mode.2704175611 |
|
|
May 16 03:27:15 PM PDT 24 |
May 16 03:27:44 PM PDT 24 |
8076734061 ps |
| T830 |
/workspace/coverage/default/22.spi_device_mailbox.3124005209 |
|
|
May 16 03:27:05 PM PDT 24 |
May 16 03:28:52 PM PDT 24 |
25255963273 ps |
| T831 |
/workspace/coverage/default/40.spi_device_read_buffer_direct.3056659363 |
|
|
May 16 03:28:06 PM PDT 24 |
May 16 03:28:15 PM PDT 24 |
101304962 ps |
| T832 |
/workspace/coverage/default/15.spi_device_pass_addr_payload_swap.2815540672 |
|
|
May 16 03:26:36 PM PDT 24 |
May 16 03:27:05 PM PDT 24 |
9368909149 ps |
| T833 |
/workspace/coverage/default/46.spi_device_flash_and_tpm_min_idle.299076738 |
|
|
May 16 03:28:28 PM PDT 24 |
May 16 03:29:01 PM PDT 24 |
15615520984 ps |
| T834 |
/workspace/coverage/default/15.spi_device_upload.2372994165 |
|
|
May 16 03:26:35 PM PDT 24 |
May 16 03:26:55 PM PDT 24 |
5282519265 ps |
| T835 |
/workspace/coverage/default/45.spi_device_upload.1594096604 |
|
|
May 16 03:28:25 PM PDT 24 |
May 16 03:28:41 PM PDT 24 |
1165212404 ps |
| T836 |
/workspace/coverage/default/33.spi_device_tpm_all.4111651592 |
|
|
May 16 03:27:41 PM PDT 24 |
May 16 03:28:20 PM PDT 24 |
6122893046 ps |
| T837 |
/workspace/coverage/default/24.spi_device_pass_addr_payload_swap.2218263897 |
|
|
May 16 03:27:05 PM PDT 24 |
May 16 03:27:37 PM PDT 24 |
16975949005 ps |
| T838 |
/workspace/coverage/default/49.spi_device_alert_test.2629130773 |
|
|
May 16 03:28:39 PM PDT 24 |
May 16 03:28:50 PM PDT 24 |
13909038 ps |
| T839 |
/workspace/coverage/default/22.spi_device_tpm_rw.2955942241 |
|
|
May 16 03:26:54 PM PDT 24 |
May 16 03:27:13 PM PDT 24 |
238027129 ps |
| T840 |
/workspace/coverage/default/49.spi_device_pass_addr_payload_swap.3422985605 |
|
|
May 16 03:28:39 PM PDT 24 |
May 16 03:28:54 PM PDT 24 |
6009010784 ps |
| T841 |
/workspace/coverage/default/22.spi_device_tpm_read_hw_reg.1890433912 |
|
|
May 16 03:26:54 PM PDT 24 |
May 16 03:27:07 PM PDT 24 |
1131079071 ps |
| T842 |
/workspace/coverage/default/17.spi_device_tpm_all.2260326940 |
|
|
May 16 03:26:39 PM PDT 24 |
May 16 03:26:57 PM PDT 24 |
699507923 ps |
| T843 |
/workspace/coverage/default/36.spi_device_alert_test.3231285206 |
|
|
May 16 03:27:45 PM PDT 24 |
May 16 03:27:51 PM PDT 24 |
45178195 ps |
| T844 |
/workspace/coverage/default/21.spi_device_tpm_rw.1129694366 |
|
|
May 16 03:26:47 PM PDT 24 |
May 16 03:27:00 PM PDT 24 |
23524836 ps |
| T845 |
/workspace/coverage/default/17.spi_device_tpm_rw.498038487 |
|
|
May 16 03:26:38 PM PDT 24 |
May 16 03:26:50 PM PDT 24 |
13582827 ps |
| T846 |
/workspace/coverage/default/36.spi_device_intercept.717802278 |
|
|
May 16 03:27:53 PM PDT 24 |
May 16 03:28:03 PM PDT 24 |
61683261 ps |
| T847 |
/workspace/coverage/default/28.spi_device_mailbox.1618110957 |
|
|
May 16 03:27:16 PM PDT 24 |
May 16 03:27:39 PM PDT 24 |
5769916942 ps |
| T848 |
/workspace/coverage/default/44.spi_device_csb_read.3164997902 |
|
|
May 16 03:28:24 PM PDT 24 |
May 16 03:28:29 PM PDT 24 |
17114685 ps |
| T849 |
/workspace/coverage/default/6.spi_device_flash_and_tpm.2842750591 |
|
|
May 16 03:26:03 PM PDT 24 |
May 16 03:28:03 PM PDT 24 |
25923831061 ps |
| T850 |
/workspace/coverage/default/24.spi_device_read_buffer_direct.4277862643 |
|
|
May 16 03:27:02 PM PDT 24 |
May 16 03:27:15 PM PDT 24 |
158784911 ps |
| T293 |
/workspace/coverage/default/3.spi_device_flash_and_tpm_min_idle.3241256306 |
|
|
May 16 03:25:54 PM PDT 24 |
May 16 03:29:00 PM PDT 24 |
33074072762 ps |
| T851 |
/workspace/coverage/default/29.spi_device_alert_test.3514710876 |
|
|
May 16 03:27:23 PM PDT 24 |
May 16 03:27:29 PM PDT 24 |
23124257 ps |
| T852 |
/workspace/coverage/default/3.spi_device_flash_and_tpm.2701021904 |
|
|
May 16 03:25:50 PM PDT 24 |
May 16 03:27:12 PM PDT 24 |
9424683976 ps |
| T853 |
/workspace/coverage/default/11.spi_device_pass_addr_payload_swap.1574415059 |
|
|
May 16 03:26:28 PM PDT 24 |
May 16 03:26:49 PM PDT 24 |
20243847095 ps |
| T854 |
/workspace/coverage/default/37.spi_device_pass_addr_payload_swap.1866198251 |
|
|
May 16 03:27:52 PM PDT 24 |
May 16 03:28:13 PM PDT 24 |
10051236420 ps |
| T855 |
/workspace/coverage/default/12.spi_device_pass_addr_payload_swap.3360938028 |
|
|
May 16 03:26:21 PM PDT 24 |
May 16 03:26:30 PM PDT 24 |
206003544 ps |
| T856 |
/workspace/coverage/default/24.spi_device_flash_mode.1364370713 |
|
|
May 16 03:27:03 PM PDT 24 |
May 16 03:27:49 PM PDT 24 |
1670980704 ps |
| T857 |
/workspace/coverage/default/27.spi_device_tpm_sts_read.3103915155 |
|
|
May 16 03:27:10 PM PDT 24 |
May 16 03:27:22 PM PDT 24 |
234846441 ps |
| T858 |
/workspace/coverage/default/33.spi_device_read_buffer_direct.1533932996 |
|
|
May 16 03:27:40 PM PDT 24 |
May 16 03:28:02 PM PDT 24 |
5659681242 ps |
| T859 |
/workspace/coverage/default/1.spi_device_flash_all.3682903455 |
|
|
May 16 03:25:52 PM PDT 24 |
May 16 03:27:39 PM PDT 24 |
15896585527 ps |
| T860 |
/workspace/coverage/default/48.spi_device_tpm_read_hw_reg.388133610 |
|
|
May 16 03:28:36 PM PDT 24 |
May 16 03:28:55 PM PDT 24 |
1910155841 ps |
| T861 |
/workspace/coverage/default/49.spi_device_mailbox.9245358 |
|
|
May 16 03:28:38 PM PDT 24 |
May 16 03:30:17 PM PDT 24 |
21453035891 ps |
| T862 |
/workspace/coverage/default/49.spi_device_flash_mode.2399633366 |
|
|
May 16 03:28:36 PM PDT 24 |
May 16 03:29:05 PM PDT 24 |
4703242079 ps |
| T863 |
/workspace/coverage/default/32.spi_device_flash_all.2070966284 |
|
|
May 16 03:27:41 PM PDT 24 |
May 16 03:30:05 PM PDT 24 |
18274436179 ps |
| T864 |
/workspace/coverage/default/14.spi_device_upload.1051481378 |
|
|
May 16 03:26:33 PM PDT 24 |
May 16 03:26:54 PM PDT 24 |
2223527578 ps |
| T865 |
/workspace/coverage/default/25.spi_device_upload.3967125871 |
|
|
May 16 03:27:02 PM PDT 24 |
May 16 03:27:14 PM PDT 24 |
40172999 ps |
| T866 |
/workspace/coverage/default/24.spi_device_flash_and_tpm_min_idle.3317362944 |
|
|
May 16 03:27:01 PM PDT 24 |
May 16 03:31:59 PM PDT 24 |
32863704458 ps |
| T867 |
/workspace/coverage/default/6.spi_device_alert_test.1903766280 |
|
|
May 16 03:26:05 PM PDT 24 |
May 16 03:26:13 PM PDT 24 |
15946490 ps |
| T868 |
/workspace/coverage/default/15.spi_device_read_buffer_direct.2629755470 |
|
|
May 16 03:26:35 PM PDT 24 |
May 16 03:26:51 PM PDT 24 |
169821743 ps |
| T869 |
/workspace/coverage/default/28.spi_device_stress_all.3544811906 |
|
|
May 16 03:27:19 PM PDT 24 |
May 16 03:27:54 PM PDT 24 |
3127699355 ps |
| T870 |
/workspace/coverage/default/9.spi_device_read_buffer_direct.954846190 |
|
|
May 16 03:26:14 PM PDT 24 |
May 16 03:26:24 PM PDT 24 |
167668172 ps |
| T871 |
/workspace/coverage/default/11.spi_device_flash_all.3059353970 |
|
|
May 16 03:26:27 PM PDT 24 |
May 16 03:28:46 PM PDT 24 |
36859702609 ps |
| T872 |
/workspace/coverage/default/33.spi_device_tpm_read_hw_reg.48066628 |
|
|
May 16 03:27:42 PM PDT 24 |
May 16 03:28:12 PM PDT 24 |
32333414105 ps |
| T873 |
/workspace/coverage/default/14.spi_device_tpm_rw.3796588317 |
|
|
May 16 03:26:34 PM PDT 24 |
May 16 03:26:46 PM PDT 24 |
100027907 ps |
| T874 |
/workspace/coverage/default/23.spi_device_alert_test.54437445 |
|
|
May 16 03:27:05 PM PDT 24 |
May 16 03:27:16 PM PDT 24 |
15612118 ps |
| T875 |
/workspace/coverage/default/16.spi_device_upload.1547659220 |
|
|
May 16 03:26:39 PM PDT 24 |
May 16 03:26:53 PM PDT 24 |
69466553 ps |
| T876 |
/workspace/coverage/default/20.spi_device_tpm_sts_read.2290944485 |
|
|
May 16 03:26:46 PM PDT 24 |
May 16 03:26:57 PM PDT 24 |
63381139 ps |
| T877 |
/workspace/coverage/default/9.spi_device_tpm_all.3510889272 |
|
|
May 16 03:26:14 PM PDT 24 |
May 16 03:26:34 PM PDT 24 |
4837688136 ps |
| T64 |
/workspace/coverage/default/4.spi_device_sec_cm.1770325128 |
|
|
May 16 03:26:05 PM PDT 24 |
May 16 03:26:13 PM PDT 24 |
128358530 ps |
| T878 |
/workspace/coverage/default/42.spi_device_mailbox.1959832841 |
|
|
May 16 03:28:10 PM PDT 24 |
May 16 03:28:19 PM PDT 24 |
1474855973 ps |
| T879 |
/workspace/coverage/default/18.spi_device_flash_mode.354739394 |
|
|
May 16 03:26:38 PM PDT 24 |
May 16 03:27:16 PM PDT 24 |
1752496185 ps |
| T880 |
/workspace/coverage/default/11.spi_device_intercept.4093218168 |
|
|
May 16 03:26:28 PM PDT 24 |
May 16 03:26:39 PM PDT 24 |
1668122558 ps |
| T881 |
/workspace/coverage/default/49.spi_device_flash_and_tpm_min_idle.1679528403 |
|
|
May 16 03:28:38 PM PDT 24 |
May 16 03:31:03 PM PDT 24 |
13700904677 ps |
| T882 |
/workspace/coverage/default/13.spi_device_tpm_read_hw_reg.3908472783 |
|
|
May 16 03:26:22 PM PDT 24 |
May 16 03:26:35 PM PDT 24 |
1522782880 ps |
| T883 |
/workspace/coverage/default/32.spi_device_mailbox.1268008157 |
|
|
May 16 03:27:30 PM PDT 24 |
May 16 03:27:51 PM PDT 24 |
1154724881 ps |
| T884 |
/workspace/coverage/default/14.spi_device_csb_read.472156400 |
|
|
May 16 03:26:33 PM PDT 24 |
May 16 03:26:44 PM PDT 24 |
62762931 ps |
| T885 |
/workspace/coverage/default/4.spi_device_pass_cmd_filtering.1627760650 |
|
|
May 16 03:25:50 PM PDT 24 |
May 16 03:26:03 PM PDT 24 |
1691195311 ps |
| T886 |
/workspace/coverage/default/48.spi_device_intercept.2964977740 |
|
|
May 16 03:28:33 PM PDT 24 |
May 16 03:29:04 PM PDT 24 |
2753893438 ps |
| T305 |
/workspace/coverage/default/5.spi_device_stress_all.2206067262 |
|
|
May 16 03:26:01 PM PDT 24 |
May 16 03:32:37 PM PDT 24 |
212695029960 ps |
| T294 |
/workspace/coverage/default/22.spi_device_stress_all.1574085109 |
|
|
May 16 03:26:54 PM PDT 24 |
May 16 03:31:21 PM PDT 24 |
22294133793 ps |
| T887 |
/workspace/coverage/default/13.spi_device_tpm_rw.4061815484 |
|
|
May 16 03:26:20 PM PDT 24 |
May 16 03:26:26 PM PDT 24 |
21809668 ps |
| T888 |
/workspace/coverage/default/25.spi_device_flash_and_tpm_min_idle.1350417265 |
|
|
May 16 03:27:08 PM PDT 24 |
May 16 03:27:59 PM PDT 24 |
3540250265 ps |
| T889 |
/workspace/coverage/default/48.spi_device_csb_read.1001980263 |
|
|
May 16 03:28:29 PM PDT 24 |
May 16 03:28:40 PM PDT 24 |
15074967 ps |
| T890 |
/workspace/coverage/default/37.spi_device_flash_mode.2255246319 |
|
|
May 16 03:27:48 PM PDT 24 |
May 16 03:27:55 PM PDT 24 |
90755946 ps |
| T891 |
/workspace/coverage/default/13.spi_device_alert_test.1089083439 |
|
|
May 16 03:26:30 PM PDT 24 |
May 16 03:26:39 PM PDT 24 |
14192079 ps |
| T892 |
/workspace/coverage/default/2.spi_device_upload.3582799978 |
|
|
May 16 03:25:50 PM PDT 24 |
May 16 03:26:01 PM PDT 24 |
503711526 ps |
| T893 |
/workspace/coverage/default/22.spi_device_pass_addr_payload_swap.2691200523 |
|
|
May 16 03:26:59 PM PDT 24 |
May 16 03:27:17 PM PDT 24 |
1330813581 ps |
| T894 |
/workspace/coverage/default/35.spi_device_mailbox.1670604986 |
|
|
May 16 03:27:50 PM PDT 24 |
May 16 03:28:41 PM PDT 24 |
22839181065 ps |
| T895 |
/workspace/coverage/default/25.spi_device_read_buffer_direct.1958635087 |
|
|
May 16 03:27:06 PM PDT 24 |
May 16 03:27:29 PM PDT 24 |
4626793420 ps |
| T896 |
/workspace/coverage/default/43.spi_device_pass_addr_payload_swap.3883409621 |
|
|
May 16 03:28:13 PM PDT 24 |
May 16 03:28:26 PM PDT 24 |
2896349531 ps |
| T897 |
/workspace/coverage/default/10.spi_device_read_buffer_direct.3796484908 |
|
|
May 16 03:26:21 PM PDT 24 |
May 16 03:26:43 PM PDT 24 |
3535452323 ps |
| T898 |
/workspace/coverage/default/33.spi_device_intercept.1690421235 |
|
|
May 16 03:27:41 PM PDT 24 |
May 16 03:27:53 PM PDT 24 |
606941599 ps |
| T899 |
/workspace/coverage/default/1.spi_device_pass_cmd_filtering.343519055 |
|
|
May 16 03:25:42 PM PDT 24 |
May 16 03:26:03 PM PDT 24 |
53924773668 ps |
| T900 |
/workspace/coverage/default/8.spi_device_pass_addr_payload_swap.10614393 |
|
|
May 16 03:26:12 PM PDT 24 |
May 16 03:26:25 PM PDT 24 |
2435700505 ps |
| T901 |
/workspace/coverage/default/4.spi_device_csb_read.2925600598 |
|
|
May 16 03:25:53 PM PDT 24 |
May 16 03:26:02 PM PDT 24 |
49077321 ps |
| T902 |
/workspace/coverage/default/45.spi_device_cfg_cmd.3272050539 |
|
|
May 16 03:28:25 PM PDT 24 |
May 16 03:28:35 PM PDT 24 |
35484357 ps |
| T903 |
/workspace/coverage/default/41.spi_device_flash_mode.2782152755 |
|
|
May 16 03:28:03 PM PDT 24 |
May 16 03:28:10 PM PDT 24 |
148933629 ps |
| T904 |
/workspace/coverage/default/40.spi_device_flash_mode.2694792764 |
|
|
May 16 03:28:07 PM PDT 24 |
May 16 03:28:18 PM PDT 24 |
950623534 ps |
| T905 |
/workspace/coverage/default/34.spi_device_alert_test.4056733200 |
|
|
May 16 03:27:43 PM PDT 24 |
May 16 03:27:49 PM PDT 24 |
20614928 ps |
| T906 |
/workspace/coverage/default/15.spi_device_tpm_rw.391165944 |
|
|
May 16 03:26:35 PM PDT 24 |
May 16 03:26:47 PM PDT 24 |
34719375 ps |
| T907 |
/workspace/coverage/default/0.spi_device_cfg_cmd.3886326299 |
|
|
May 16 03:25:41 PM PDT 24 |
May 16 03:25:56 PM PDT 24 |
603006189 ps |
| T908 |
/workspace/coverage/default/36.spi_device_upload.112748905 |
|
|
May 16 03:27:48 PM PDT 24 |
May 16 03:27:55 PM PDT 24 |
369439525 ps |
| T909 |
/workspace/coverage/default/13.spi_device_mailbox.234912944 |
|
|
May 16 03:26:29 PM PDT 24 |
May 16 03:27:11 PM PDT 24 |
9780489753 ps |
| T910 |
/workspace/coverage/default/45.spi_device_pass_cmd_filtering.1850444605 |
|
|
May 16 03:28:23 PM PDT 24 |
May 16 03:28:47 PM PDT 24 |
6708741238 ps |
| T911 |
/workspace/coverage/default/6.spi_device_tpm_sts_read.2080445812 |
|
|
May 16 03:26:01 PM PDT 24 |
May 16 03:26:09 PM PDT 24 |
10339618 ps |
| T912 |
/workspace/coverage/default/35.spi_device_read_buffer_direct.3234767729 |
|
|
May 16 03:27:49 PM PDT 24 |
May 16 03:27:58 PM PDT 24 |
134845172 ps |
| T913 |
/workspace/coverage/default/29.spi_device_tpm_all.2677455252 |
|
|
May 16 03:27:16 PM PDT 24 |
May 16 03:27:25 PM PDT 24 |
36917379 ps |
| T914 |
/workspace/coverage/default/5.spi_device_mailbox.2912478369 |
|
|
May 16 03:26:07 PM PDT 24 |
May 16 03:26:19 PM PDT 24 |
468837107 ps |
| T301 |
/workspace/coverage/default/8.spi_device_flash_and_tpm_min_idle.1838197463 |
|
|
May 16 03:26:13 PM PDT 24 |
May 16 03:28:39 PM PDT 24 |
32487716763 ps |
| T915 |
/workspace/coverage/default/7.spi_device_pass_addr_payload_swap.2372301854 |
|
|
May 16 03:26:04 PM PDT 24 |
May 16 03:26:32 PM PDT 24 |
36163856739 ps |
| T916 |
/workspace/coverage/default/1.spi_device_pass_addr_payload_swap.2918305051 |
|
|
May 16 03:25:37 PM PDT 24 |
May 16 03:25:46 PM PDT 24 |
91648898 ps |
| T917 |
/workspace/coverage/default/20.spi_device_flash_all.3925550964 |
|
|
May 16 03:26:49 PM PDT 24 |
May 16 03:27:55 PM PDT 24 |
5317399524 ps |
| T918 |
/workspace/coverage/default/17.spi_device_pass_cmd_filtering.1584838355 |
|
|
May 16 03:26:38 PM PDT 24 |
May 16 03:26:55 PM PDT 24 |
451588532 ps |
| T919 |
/workspace/coverage/default/38.spi_device_flash_and_tpm_min_idle.1885246772 |
|
|
May 16 03:27:55 PM PDT 24 |
May 16 03:32:31 PM PDT 24 |
35766079570 ps |
| T920 |
/workspace/coverage/default/45.spi_device_flash_and_tpm_min_idle.2144775774 |
|
|
May 16 03:28:25 PM PDT 24 |
May 16 03:30:52 PM PDT 24 |
56264869415 ps |
| T295 |
/workspace/coverage/default/42.spi_device_flash_and_tpm_min_idle.105626290 |
|
|
May 16 03:28:11 PM PDT 24 |
May 16 03:31:44 PM PDT 24 |
16622928375 ps |
| T302 |
/workspace/coverage/default/35.spi_device_flash_all.654809633 |
|
|
May 16 03:27:45 PM PDT 24 |
May 16 03:36:01 PM PDT 24 |
72049324751 ps |
| T921 |
/workspace/coverage/default/28.spi_device_pass_addr_payload_swap.3203131174 |
|
|
May 16 03:27:18 PM PDT 24 |
May 16 03:27:32 PM PDT 24 |
289037532 ps |
| T922 |
/workspace/coverage/default/27.spi_device_tpm_all.3485245286 |
|
|
May 16 03:27:11 PM PDT 24 |
May 16 03:27:46 PM PDT 24 |
9701466297 ps |
| T923 |
/workspace/coverage/default/33.spi_device_tpm_rw.327555549 |
|
|
May 16 03:27:40 PM PDT 24 |
May 16 03:27:49 PM PDT 24 |
512772412 ps |
| T924 |
/workspace/coverage/default/45.spi_device_flash_and_tpm.1344390382 |
|
|
May 16 03:28:23 PM PDT 24 |
May 16 03:30:02 PM PDT 24 |
11913945016 ps |
| T925 |
/workspace/coverage/default/19.spi_device_stress_all.2499258287 |
|
|
May 16 03:26:43 PM PDT 24 |
May 16 03:26:56 PM PDT 24 |
53319901 ps |
| T926 |
/workspace/coverage/default/17.spi_device_read_buffer_direct.226237975 |
|
|
May 16 03:26:40 PM PDT 24 |
May 16 03:27:03 PM PDT 24 |
5072666373 ps |
| T927 |
/workspace/coverage/default/24.spi_device_flash_and_tpm.2624962389 |
|
|
May 16 03:27:03 PM PDT 24 |
May 16 03:28:02 PM PDT 24 |
6888583548 ps |
| T928 |
/workspace/coverage/default/4.spi_device_intercept.1203435561 |
|
|
May 16 03:25:55 PM PDT 24 |
May 16 03:26:08 PM PDT 24 |
369292892 ps |
| T929 |
/workspace/coverage/default/3.spi_device_flash_mode.1805880911 |
|
|
May 16 03:25:51 PM PDT 24 |
May 16 03:26:11 PM PDT 24 |
980729886 ps |
| T930 |
/workspace/coverage/default/4.spi_device_tpm_all.3397934357 |
|
|
May 16 03:25:48 PM PDT 24 |
May 16 03:25:57 PM PDT 24 |
363760353 ps |
| T931 |
/workspace/coverage/default/37.spi_device_alert_test.1852630069 |
|
|
May 16 03:27:54 PM PDT 24 |
May 16 03:28:01 PM PDT 24 |
44407829 ps |
| T932 |
/workspace/coverage/default/20.spi_device_flash_and_tpm_min_idle.963565254 |
|
|
May 16 03:26:47 PM PDT 24 |
May 16 03:29:30 PM PDT 24 |
13375013445 ps |
| T933 |
/workspace/coverage/default/24.spi_device_pass_cmd_filtering.2349124002 |
|
|
May 16 03:27:01 PM PDT 24 |
May 16 03:27:30 PM PDT 24 |
6698038365 ps |
| T934 |
/workspace/coverage/default/3.spi_device_pass_addr_payload_swap.2800093021 |
|
|
May 16 03:25:49 PM PDT 24 |
May 16 03:26:06 PM PDT 24 |
5157475798 ps |
| T935 |
/workspace/coverage/default/23.spi_device_tpm_all.50470059 |
|
|
May 16 03:26:53 PM PDT 24 |
May 16 03:27:50 PM PDT 24 |
8677786567 ps |
| T936 |
/workspace/coverage/default/36.spi_device_tpm_sts_read.3996364050 |
|
|
May 16 03:27:52 PM PDT 24 |
May 16 03:27:58 PM PDT 24 |
19803637 ps |
| T937 |
/workspace/coverage/default/0.spi_device_csb_read.1436022717 |
|
|
May 16 03:25:29 PM PDT 24 |
May 16 03:25:38 PM PDT 24 |
36700582 ps |
| T296 |
/workspace/coverage/default/15.spi_device_flash_all.2704695423 |
|
|
May 16 03:26:35 PM PDT 24 |
May 16 03:28:21 PM PDT 24 |
15207349422 ps |
| T938 |
/workspace/coverage/default/30.spi_device_pass_addr_payload_swap.3137117545 |
|
|
May 16 03:27:28 PM PDT 24 |
May 16 03:27:38 PM PDT 24 |
1250895674 ps |
| T939 |
/workspace/coverage/default/43.spi_device_flash_all.894994709 |
|
|
May 16 03:28:23 PM PDT 24 |
May 16 03:32:35 PM PDT 24 |
67590375682 ps |
| T940 |
/workspace/coverage/default/46.spi_device_read_buffer_direct.2210007174 |
|
|
May 16 03:28:30 PM PDT 24 |
May 16 03:28:55 PM PDT 24 |
1998495480 ps |
| T941 |
/workspace/coverage/default/43.spi_device_alert_test.1254391130 |
|
|
May 16 03:28:23 PM PDT 24 |
May 16 03:28:27 PM PDT 24 |
27491525 ps |
| T942 |
/workspace/coverage/default/45.spi_device_tpm_rw.1147030807 |
|
|
May 16 03:28:22 PM PDT 24 |
May 16 03:28:26 PM PDT 24 |
16954510 ps |
| T943 |
/workspace/coverage/default/42.spi_device_tpm_read_hw_reg.268757905 |
|
|
May 16 03:28:11 PM PDT 24 |
May 16 03:28:20 PM PDT 24 |
6000476601 ps |
| T944 |
/workspace/coverage/default/28.spi_device_upload.2174019076 |
|
|
May 16 03:27:17 PM PDT 24 |
May 16 03:27:31 PM PDT 24 |
1058141904 ps |
| T945 |
/workspace/coverage/default/19.spi_device_cfg_cmd.2678286991 |
|
|
May 16 03:26:44 PM PDT 24 |
May 16 03:26:57 PM PDT 24 |
127625474 ps |
| T946 |
/workspace/coverage/default/8.spi_device_tpm_all.438352418 |
|
|
May 16 03:26:11 PM PDT 24 |
May 16 03:26:37 PM PDT 24 |
2501478159 ps |
| T947 |
/workspace/coverage/default/19.spi_device_tpm_read_hw_reg.1458519996 |
|
|
May 16 03:26:46 PM PDT 24 |
May 16 03:27:12 PM PDT 24 |
37810853359 ps |
| T948 |
/workspace/coverage/default/3.spi_device_tpm_all.1170679741 |
|
|
May 16 03:25:55 PM PDT 24 |
May 16 03:26:22 PM PDT 24 |
14906342253 ps |
| T949 |
/workspace/coverage/default/34.spi_device_tpm_rw.2803989855 |
|
|
May 16 03:27:40 PM PDT 24 |
May 16 03:27:45 PM PDT 24 |
28582750 ps |
| T950 |
/workspace/coverage/default/23.spi_device_stress_all.849685310 |
|
|
May 16 03:26:59 PM PDT 24 |
May 16 03:27:10 PM PDT 24 |
210774036 ps |
| T951 |
/workspace/coverage/default/0.spi_device_tpm_all.2648879738 |
|
|
May 16 03:25:38 PM PDT 24 |
May 16 03:26:21 PM PDT 24 |
6203044829 ps |
| T952 |
/workspace/coverage/default/7.spi_device_stress_all.3947499970 |
|
|
May 16 03:26:04 PM PDT 24 |
May 16 03:26:12 PM PDT 24 |
57888115 ps |
| T953 |
/workspace/coverage/default/12.spi_device_alert_test.1094218097 |
|
|
May 16 03:26:22 PM PDT 24 |
May 16 03:26:29 PM PDT 24 |
14380782 ps |
| T954 |
/workspace/coverage/default/37.spi_device_flash_and_tpm.1945836280 |
|
|
May 16 03:27:53 PM PDT 24 |
May 16 03:30:42 PM PDT 24 |
58819039763 ps |
| T955 |
/workspace/coverage/default/38.spi_device_pass_cmd_filtering.1543239599 |
|
|
May 16 03:27:56 PM PDT 24 |
May 16 03:28:09 PM PDT 24 |
2847058542 ps |
| T956 |
/workspace/coverage/default/23.spi_device_read_buffer_direct.2095880346 |
|
|
May 16 03:27:05 PM PDT 24 |
May 16 03:27:29 PM PDT 24 |
1397927146 ps |
| T65 |
/workspace/coverage/default/2.spi_device_sec_cm.1128677902 |
|
|
May 16 03:25:50 PM PDT 24 |
May 16 03:25:59 PM PDT 24 |
130583057 ps |
| T957 |
/workspace/coverage/default/14.spi_device_flash_and_tpm_min_idle.110984661 |
|
|
May 16 03:26:32 PM PDT 24 |
May 16 03:27:54 PM PDT 24 |
4952234456 ps |
| T958 |
/workspace/coverage/default/30.spi_device_upload.1117639697 |
|
|
May 16 03:27:25 PM PDT 24 |
May 16 03:27:39 PM PDT 24 |
2009860852 ps |
| T959 |
/workspace/coverage/default/11.spi_device_alert_test.392069107 |
|
|
May 16 03:26:21 PM PDT 24 |
May 16 03:26:28 PM PDT 24 |
31386904 ps |
| T960 |
/workspace/coverage/default/21.spi_device_pass_cmd_filtering.3113898248 |
|
|
May 16 03:26:50 PM PDT 24 |
May 16 03:27:11 PM PDT 24 |
1829264609 ps |
| T961 |
/workspace/coverage/default/47.spi_device_intercept.2663915565 |
|
|
May 16 03:28:35 PM PDT 24 |
May 16 03:28:54 PM PDT 24 |
1188553888 ps |
| T962 |
/workspace/coverage/default/34.spi_device_intercept.2174412925 |
|
|
May 16 03:27:41 PM PDT 24 |
May 16 03:27:49 PM PDT 24 |
167889324 ps |
| T963 |
/workspace/coverage/cover_reg_top/27.spi_device_intr_test.2228668701 |
|
|
May 16 01:22:42 PM PDT 24 |
May 16 01:22:50 PM PDT 24 |
28149801 ps |
| T964 |
/workspace/coverage/cover_reg_top/41.spi_device_intr_test.1388161812 |
|
|
May 16 01:22:51 PM PDT 24 |
May 16 01:23:01 PM PDT 24 |
59940773 ps |
| T965 |
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.1144538687 |
|
|
May 16 01:22:42 PM PDT 24 |
May 16 01:22:50 PM PDT 24 |
24854203 ps |
| T966 |
/workspace/coverage/cover_reg_top/43.spi_device_intr_test.207811366 |
|
|
May 16 01:22:52 PM PDT 24 |
May 16 01:23:02 PM PDT 24 |
14263510 ps |
| T967 |
/workspace/coverage/cover_reg_top/4.spi_device_intr_test.904428027 |
|
|
May 16 01:21:48 PM PDT 24 |
May 16 01:21:53 PM PDT 24 |
13136204 ps |
| T54 |
/workspace/coverage/cover_reg_top/11.spi_device_tl_errors.1037068273 |
|
|
May 16 01:22:27 PM PDT 24 |
May 16 01:22:36 PM PDT 24 |
105540400 ps |
| T103 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_rw.1384076088 |
|
|
May 16 01:21:37 PM PDT 24 |
May 16 01:21:44 PM PDT 24 |
139691928 ps |
| T968 |
/workspace/coverage/cover_reg_top/10.spi_device_intr_test.2224779308 |
|
|
May 16 01:22:25 PM PDT 24 |
May 16 01:22:29 PM PDT 24 |
13421131 ps |
| T55 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.1795099930 |
|
|
May 16 01:22:36 PM PDT 24 |
May 16 01:22:49 PM PDT 24 |
362798669 ps |
| T969 |
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.2211813148 |
|
|
May 16 01:22:41 PM PDT 24 |
May 16 01:22:50 PM PDT 24 |
16329160 ps |
| T970 |
/workspace/coverage/cover_reg_top/16.spi_device_intr_test.2497721442 |
|
|
May 16 01:22:37 PM PDT 24 |
May 16 01:22:43 PM PDT 24 |
14671662 ps |
| T971 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_walk.140801231 |
|
|
May 16 01:21:52 PM PDT 24 |
May 16 01:21:57 PM PDT 24 |
162466812 ps |
| T128 |
/workspace/coverage/cover_reg_top/18.spi_device_csr_rw.219639707 |
|
|
May 16 01:22:39 PM PDT 24 |
May 16 01:22:46 PM PDT 24 |
341200499 ps |
| T972 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.966640519 |
|
|
May 16 01:21:47 PM PDT 24 |
May 16 01:22:16 PM PDT 24 |
5031372744 ps |
| T56 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_errors.877337847 |
|
|
May 16 01:22:39 PM PDT 24 |
May 16 01:22:46 PM PDT 24 |
58647185 ps |
| T973 |
/workspace/coverage/cover_reg_top/34.spi_device_intr_test.2652680210 |
|
|
May 16 01:22:50 PM PDT 24 |
May 16 01:23:00 PM PDT 24 |
13556835 ps |
| T974 |
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.2700925012 |
|
|
May 16 01:22:40 PM PDT 24 |
May 16 01:22:48 PM PDT 24 |
48937779 ps |
| T104 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_rw.953770283 |
|
|
May 16 01:21:43 PM PDT 24 |
May 16 01:21:49 PM PDT 24 |
149492844 ps |
| T88 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_errors.2479622193 |
|
|
May 16 01:21:34 PM PDT 24 |
May 16 01:21:44 PM PDT 24 |
786769170 ps |
| T129 |
/workspace/coverage/cover_reg_top/9.spi_device_same_csr_outstanding.2764875057 |
|
|
May 16 01:22:25 PM PDT 24 |
May 16 01:22:30 PM PDT 24 |
220621091 ps |
| T93 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_errors.1234902760 |
|
|
May 16 01:22:37 PM PDT 24 |
May 16 01:22:46 PM PDT 24 |
62270542 ps |
| T139 |
/workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.820313544 |
|
|
May 16 01:22:37 PM PDT 24 |
May 16 01:22:45 PM PDT 24 |
499871126 ps |
| T975 |
/workspace/coverage/cover_reg_top/47.spi_device_intr_test.3461725919 |
|
|
May 16 01:22:49 PM PDT 24 |
May 16 01:22:57 PM PDT 24 |
34214033 ps |
| T105 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_partial_access.3250963044 |
|
|
May 16 01:21:34 PM PDT 24 |
May 16 01:21:42 PM PDT 24 |
23663603 ps |
| T976 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.532202594 |
|
|
May 16 01:21:36 PM PDT 24 |
May 16 01:21:49 PM PDT 24 |
135701200 ps |
| T977 |
/workspace/coverage/cover_reg_top/5.spi_device_csr_rw.1572020946 |
|
|
May 16 01:21:50 PM PDT 24 |
May 16 01:21:58 PM PDT 24 |
66511857 ps |
| T978 |
/workspace/coverage/cover_reg_top/46.spi_device_intr_test.3505029825 |
|
|
May 16 01:22:49 PM PDT 24 |
May 16 01:22:57 PM PDT 24 |
72289193 ps |
| T979 |
/workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.573575334 |
|
|
May 16 01:22:28 PM PDT 24 |
May 16 01:22:36 PM PDT 24 |
57094311 ps |
| T91 |
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.3608720641 |
|
|
May 16 01:22:39 PM PDT 24 |
May 16 01:22:48 PM PDT 24 |
44730609 ps |
| T980 |
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.2174865785 |
|
|
May 16 01:22:38 PM PDT 24 |
May 16 01:22:44 PM PDT 24 |
107779328 ps |
| T981 |
/workspace/coverage/cover_reg_top/7.spi_device_intr_test.1387850811 |
|
|
May 16 01:21:47 PM PDT 24 |
May 16 01:21:52 PM PDT 24 |
12367348 ps |
| T982 |
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.3268562572 |
|
|
May 16 01:22:40 PM PDT 24 |
May 16 01:22:47 PM PDT 24 |
176942590 ps |
| T89 |
/workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.1741225831 |
|
|
May 16 01:22:27 PM PDT 24 |
May 16 01:22:40 PM PDT 24 |
203526174 ps |
| T76 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_hw_reset.1048378489 |
|
|
May 16 01:21:39 PM PDT 24 |
May 16 01:21:45 PM PDT 24 |
36166041 ps |
| T983 |
/workspace/coverage/cover_reg_top/0.spi_device_intr_test.3180248655 |
|
|
May 16 01:21:46 PM PDT 24 |
May 16 01:21:51 PM PDT 24 |
43094379 ps |
| T92 |
/workspace/coverage/cover_reg_top/9.spi_device_tl_errors.4186315336 |
|
|
May 16 01:22:25 PM PDT 24 |
May 16 01:22:31 PM PDT 24 |
276103977 ps |
| T97 |
/workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.3248710232 |
|
|
May 16 01:22:37 PM PDT 24 |
May 16 01:22:44 PM PDT 24 |
85495069 ps |
| T98 |
/workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.3884172988 |
|
|
May 16 01:22:50 PM PDT 24 |
May 16 01:22:59 PM PDT 24 |
201120185 ps |
| T106 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.667651447 |
|
|
May 16 01:21:48 PM PDT 24 |
May 16 01:22:01 PM PDT 24 |
400472990 ps |
| T99 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.167586006 |
|
|
May 16 01:21:48 PM PDT 24 |
May 16 01:21:55 PM PDT 24 |
92637061 ps |
| T107 |
/workspace/coverage/cover_reg_top/12.spi_device_csr_rw.941320389 |
|
|
May 16 01:22:28 PM PDT 24 |
May 16 01:22:36 PM PDT 24 |
269158068 ps |
| T108 |
/workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.1847614583 |
|
|
May 16 01:21:43 PM PDT 24 |
May 16 01:22:25 PM PDT 24 |
7492932052 ps |
| T140 |
/workspace/coverage/cover_reg_top/13.spi_device_same_csr_outstanding.3617363948 |
|
|
May 16 01:22:28 PM PDT 24 |
May 16 01:22:36 PM PDT 24 |
72607283 ps |
| T109 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_rw.2373902412 |
|
|
May 16 01:22:25 PM PDT 24 |
May 16 01:22:30 PM PDT 24 |
98079051 ps |
| T90 |
/workspace/coverage/cover_reg_top/6.spi_device_tl_intg_err.39093935 |
|
|
May 16 01:21:48 PM PDT 24 |
May 16 01:21:59 PM PDT 24 |
128075095 ps |
| T984 |
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.2653923756 |
|
|
May 16 01:22:25 PM PDT 24 |
May 16 01:22:30 PM PDT 24 |
15082237 ps |
| T985 |
/workspace/coverage/cover_reg_top/18.spi_device_intr_test.1891302295 |
|
|
May 16 01:22:39 PM PDT 24 |
May 16 01:22:46 PM PDT 24 |
35417868 ps |
| T94 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_errors.174787791 |
|
|
May 16 01:21:47 PM PDT 24 |
May 16 01:21:56 PM PDT 24 |
988524215 ps |
| T986 |
/workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.3955716738 |
|
|
May 16 01:22:38 PM PDT 24 |
May 16 01:22:45 PM PDT 24 |
27611937 ps |
| T141 |
/workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.3342276639 |
|
|
May 16 01:21:49 PM PDT 24 |
May 16 01:22:18 PM PDT 24 |
1030433165 ps |
| T110 |
/workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.3420275506 |
|
|
May 16 01:21:47 PM PDT 24 |
May 16 01:21:53 PM PDT 24 |
333786855 ps |
| T987 |
/workspace/coverage/cover_reg_top/6.spi_device_intr_test.484358184 |
|
|
May 16 01:21:48 PM PDT 24 |
May 16 01:21:54 PM PDT 24 |
41123316 ps |
| T988 |
/workspace/coverage/cover_reg_top/25.spi_device_intr_test.1287644952 |
|
|
May 16 01:22:41 PM PDT 24 |
May 16 01:22:49 PM PDT 24 |
41888136 ps |
| T989 |
/workspace/coverage/cover_reg_top/30.spi_device_intr_test.2578521872 |
|
|
May 16 01:22:42 PM PDT 24 |
May 16 01:22:51 PM PDT 24 |
40475517 ps |
| T990 |
/workspace/coverage/cover_reg_top/20.spi_device_intr_test.764881855 |
|
|
May 16 01:22:41 PM PDT 24 |
May 16 01:22:49 PM PDT 24 |
17972962 ps |
| T95 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_errors.2754558629 |
|
|
May 16 01:22:35 PM PDT 24 |
May 16 01:22:43 PM PDT 24 |
53538986 ps |
| T142 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.186994621 |
|
|
May 16 01:21:39 PM PDT 24 |
May 16 01:21:45 PM PDT 24 |
95057610 ps |
| T179 |
/workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.2132739412 |
|
|
May 16 01:21:36 PM PDT 24 |
May 16 01:21:49 PM PDT 24 |
286436737 ps |
| T111 |
/workspace/coverage/cover_reg_top/3.spi_device_csr_rw.1281145797 |
|
|
May 16 01:21:50 PM PDT 24 |
May 16 01:21:58 PM PDT 24 |
175037915 ps |
| T991 |
/workspace/coverage/cover_reg_top/3.spi_device_intr_test.710169635 |
|
|
May 16 01:21:48 PM PDT 24 |
May 16 01:21:54 PM PDT 24 |
44080386 ps |
| T992 |
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.3688961261 |
|
|
May 16 01:22:50 PM PDT 24 |
May 16 01:23:00 PM PDT 24 |
17858202 ps |
| T993 |
/workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.854439262 |
|
|
May 16 01:21:51 PM PDT 24 |
May 16 01:21:58 PM PDT 24 |
121547336 ps |
| T112 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_rw.3662031659 |
|
|
May 16 01:21:44 PM PDT 24 |
May 16 01:21:50 PM PDT 24 |
170624903 ps |
| T77 |
/workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.2344771907 |
|
|
May 16 01:21:37 PM PDT 24 |
May 16 01:21:43 PM PDT 24 |
173864795 ps |
| T994 |
/workspace/coverage/cover_reg_top/18.spi_device_csr_mem_rw_with_rand_reset.1103736038 |
|
|
May 16 01:22:38 PM PDT 24 |
May 16 01:22:46 PM PDT 24 |
40354818 ps |
| T78 |
/workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.2182660648 |
|
|
May 16 01:21:48 PM PDT 24 |
May 16 01:21:54 PM PDT 24 |
72424911 ps |
| T995 |
/workspace/coverage/cover_reg_top/39.spi_device_intr_test.2677528627 |
|
|
May 16 01:22:47 PM PDT 24 |
May 16 01:22:56 PM PDT 24 |
11225962 ps |
| T996 |
/workspace/coverage/cover_reg_top/12.spi_device_intr_test.13152493 |
|
|
May 16 01:22:27 PM PDT 24 |
May 16 01:22:34 PM PDT 24 |
31279921 ps |
| T177 |
/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.1794278959 |
|
|
May 16 01:21:51 PM PDT 24 |
May 16 01:22:14 PM PDT 24 |
1253835657 ps |
| T997 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_errors.2182704420 |
|
|
May 16 01:21:51 PM PDT 24 |
May 16 01:21:59 PM PDT 24 |
211450840 ps |
| T998 |
/workspace/coverage/cover_reg_top/0.spi_device_mem_walk.1009265875 |
|
|
May 16 01:21:33 PM PDT 24 |
May 16 01:21:40 PM PDT 24 |
10346458 ps |
| T999 |
/workspace/coverage/cover_reg_top/9.spi_device_csr_mem_rw_with_rand_reset.89661383 |
|
|
May 16 01:22:25 PM PDT 24 |
May 16 01:22:29 PM PDT 24 |
470238778 ps |
| T1000 |
/workspace/coverage/cover_reg_top/49.spi_device_intr_test.3969387144 |
|
|
May 16 01:22:49 PM PDT 24 |
May 16 01:22:58 PM PDT 24 |
39420535 ps |
| T143 |
/workspace/coverage/cover_reg_top/10.spi_device_csr_mem_rw_with_rand_reset.4042525883 |
|
|
May 16 01:22:27 PM PDT 24 |
May 16 01:22:35 PM PDT 24 |
386260330 ps |
| T144 |
/workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.3458186970 |
|
|
May 16 01:22:27 PM PDT 24 |
May 16 01:22:35 PM PDT 24 |
200690810 ps |
| T178 |
/workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.2441738050 |
|
|
May 16 01:21:36 PM PDT 24 |
May 16 01:22:05 PM PDT 24 |
3172889467 ps |
| T145 |
/workspace/coverage/cover_reg_top/7.spi_device_tl_intg_err.1207372831 |
|
|
May 16 01:21:49 PM PDT 24 |
May 16 01:22:11 PM PDT 24 |
706889723 ps |
| T146 |
/workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.1165589470 |
|
|
May 16 01:22:39 PM PDT 24 |
May 16 01:23:00 PM PDT 24 |
2436690021 ps |
| T1001 |
/workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.2078955719 |
|
|
May 16 01:22:38 PM PDT 24 |
May 16 01:22:46 PM PDT 24 |
146136858 ps |
| T1002 |
/workspace/coverage/cover_reg_top/48.spi_device_intr_test.3338656432 |
|
|
May 16 01:22:52 PM PDT 24 |
May 16 01:23:04 PM PDT 24 |
14597625 ps |
| T1003 |
/workspace/coverage/cover_reg_top/8.spi_device_intr_test.2117914261 |
|
|
May 16 01:21:52 PM PDT 24 |
May 16 01:21:57 PM PDT 24 |
40141220 ps |
| T1004 |
/workspace/coverage/cover_reg_top/8.spi_device_csr_mem_rw_with_rand_reset.1613878066 |
|
|
May 16 01:22:26 PM PDT 24 |
May 16 01:22:32 PM PDT 24 |
74156829 ps |
| T96 |
/workspace/coverage/cover_reg_top/1.spi_device_tl_errors.2447914964 |
|
|
May 16 01:21:36 PM PDT 24 |
May 16 01:21:43 PM PDT 24 |
33400264 ps |
| T1005 |
/workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.1514124799 |
|
|
May 16 01:22:40 PM PDT 24 |
May 16 01:22:49 PM PDT 24 |
42501724 ps |
| T1006 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.2041418842 |
|
|
May 16 01:21:42 PM PDT 24 |
May 16 01:21:50 PM PDT 24 |
518690840 ps |
| T1007 |
/workspace/coverage/cover_reg_top/14.spi_device_intr_test.3209655226 |
|
|
May 16 01:22:35 PM PDT 24 |
May 16 01:22:40 PM PDT 24 |
19970605 ps |
| T113 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_rw.1784942834 |
|
|
May 16 01:22:41 PM PDT 24 |
May 16 01:22:49 PM PDT 24 |
45432744 ps |
| T147 |
/workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.2564821805 |
|
|
May 16 01:21:43 PM PDT 24 |
May 16 01:21:56 PM PDT 24 |
397412543 ps |
| T172 |
/workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.3535026304 |
|
|
May 16 01:22:37 PM PDT 24 |
May 16 01:22:48 PM PDT 24 |
95486999 ps |
| T173 |
/workspace/coverage/cover_reg_top/5.spi_device_tl_intg_err.3073726563 |
|
|
May 16 01:21:52 PM PDT 24 |
May 16 01:22:09 PM PDT 24 |
321731766 ps |
| T1008 |
/workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.1130929063 |
|
|
May 16 01:22:40 PM PDT 24 |
May 16 01:22:51 PM PDT 24 |
496328048 ps |
| T1009 |
/workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.2876431107 |
|
|
May 16 01:22:36 PM PDT 24 |
May 16 01:22:56 PM PDT 24 |
2331693225 ps |
| T1010 |
/workspace/coverage/cover_reg_top/35.spi_device_intr_test.2621536532 |
|
|
May 16 01:22:49 PM PDT 24 |
May 16 01:22:57 PM PDT 24 |
27666312 ps |
| T171 |
/workspace/coverage/cover_reg_top/14.spi_device_tl_errors.2531574489 |
|
|
May 16 01:22:36 PM PDT 24 |
May 16 01:22:45 PM PDT 24 |
832525987 ps |