Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

11489

1

T2

5

T9

140

T10

9

auto[1]

36817

1

T1

119

T2

5

T3

380

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	1035	1			T1	3		T3	2		T4	7
auto[4:7]	19906	1			T1	37		T3	270		T4	379
auto[8:11]	1036	1			T1	1		T3	1		T4	5
auto[12:15]	211	1			T1	2		T3	3		T16	1
auto[16:19]	288	1			T3	3		T4	2		T22	5
auto[20:23]	1575	1			T1	9		T3	3		T4	12
auto[24:27]	303	1			T1	2		T4	5		T9	2
auto[28:31]	252	1			T3	3		T9	4		T16	3
auto[32:35]	292	1			T4	2		T9	2		T16	7
auto[36:39]	246	1			T3	2		T4	5		T9	1
auto[40:43]	257	1			T3	1		T4	5		T16	1
auto[44:47]	272	1			T4	1		T9	6		T22	2
auto[48:51]	243	1			T3	1		T9	3		T16	2
auto[52:55]	1491	1			T1	5		T3	13		T4	11
auto[56:59]	1061	1			T1	3		T2	4		T3	3
auto[60:63]	261	1			T4	2		T9	6		T22	1
auto[64:67]	251	1			T1	2		T4	3		T9	1
auto[68:71]	215	1			T22	3		T16	1		T17	1
auto[72:75]	291	1			T4	1		T22	1		T24	2
auto[76:79]	244	1			T4	3		T22	1		T16	1
auto[80:83]	284	1			T4	1		T22	2		T17	1
auto[84:87]	237	1			T1	1		T4	2		T9	1
auto[88:91]	1482	1			T1	6		T3	8		T4	7
auto[92:95]	269	1			T1	1		T3	1		T4	8
auto[96:99]	265	1			T3	1		T4	1		T9	1
auto[100:103]	287	1			T1	2		T3	1		T4	1
auto[104:107]	1061	1			T1	1		T2	2		T4	4
auto[108:111]	249	1			T1	3		T3	1		T4	2
auto[112:115]	276	1			T1	1		T3	1		T4	1
auto[116:119]	264	1			T1	2		T4	1		T9	2
auto[120:123]	261	1			T3	1		T4	1		T22	2
auto[124:127]	265	1			T1	2		T3	3		T9	4
auto[128:131]	210	1			T1	2		T4	2		T9	3
auto[132:135]	259	1			T4	1		T9	1		T22	6
auto[136:139]	269	1			T4	6		T9	7		T16	2
auto[140:143]	248	1			T4	1		T9	1		T22	1
auto[144:147]	289	1			T1	1		T3	1		T4	3
auto[148:151]	254	1			T1	1		T3	3		T4	5
auto[152:155]	260	1			T1	3		T3	5		T9	2
auto[156:159]	1491	1			T1	2		T2	2		T3	8
auto[160:163]	244	1			T1	2		T3	2		T4	2
auto[164:167]	318	1			T3	3		T4	2		T9	5
auto[168:171]	264	1			T4	1		T9	2		T22	3
auto[172:175]	252	1			T4	2		T9	4		T22	3
auto[176:179]	230	1			T4	2		T9	5		T22	1
auto[180:183]	1438	1			T1	5		T3	2		T4	9
auto[184:187]	1020	1			T1	1		T3	3		T4	5
auto[188:191]	205	1			T1	1		T3	3		T4	2
auto[192:195]	253	1			T4	3		T9	3		T22	1
auto[196:199]	278	1			T1	1		T3	4		T4	5
auto[200:203]	251	1			T3	1		T4	5		T9	4
auto[204:207]	284	1			T1	2		T3	1		T4	13
auto[208:211]	277	1			T4	6		T9	1		T22	2
auto[212:215]	278	1			T3	3		T4	2		T9	1
auto[216:219]	237	1			T3	2		T4	1		T9	1
auto[220:223]	316	1			T4	6		T9	2		T22	3
auto[224:227]	238	1			T1	1		T3	1		T4	2
auto[228:231]	240	1			T1	2		T3	2		T4	4
auto[232:235]	2173	1			T1	1		T2	2		T3	7
auto[236:239]	232	1			T3	3		T4	6		T22	4
auto[240:243]	298	1			T1	3		T3	1		T4	8
auto[244:247]	292	1			T1	5		T3	1		T9	1
auto[248:251]	244	1			T1	1		T3	1		T4	3
auto[252:255]	234	1			T1	2		T3	1		T4	2

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	372	1			T9	10		T24	2		T74	1
auto[0:3]	auto[1]	663	1			T1	3		T3	2		T4	7
auto[4:7]	auto[0]	4309	1			T9	36		T10	3		T25	32
auto[4:7]	auto[1]	15597	1			T1	37		T3	270		T4	379
auto[8:11]	auto[0]	336	1			T9	3		T24	1		T36	1
auto[8:11]	auto[1]	700	1			T1	1		T3	1		T4	5
auto[12:15]	auto[0]	43	1			T25	1		T29	1		T33	1
auto[12:15]	auto[1]	168	1			T1	2		T3	3		T16	1
auto[16:19]	auto[0]	57	1			T28	1		T31	3		T79	3
auto[16:19]	auto[1]	231	1			T3	3		T4	2		T22	5
auto[20:23]	auto[0]	380	1			T9	5		T10	6		T74	3
auto[20:23]	auto[1]	1195	1			T1	9		T3	3		T4	12
auto[24:27]	auto[0]	75	1			T26	2		T32	2		T33	5
auto[24:27]	auto[1]	228	1			T1	2		T4	5		T9	2
auto[28:31]	auto[0]	64	1			T9	4		T29	2		T27	1
auto[28:31]	auto[1]	188	1			T3	3		T16	3		T17	1
auto[32:35]	auto[0]	58	1			T29	2		T31	2		T33	2
auto[32:35]	auto[1]	234	1			T4	2		T9	2		T16	7
auto[36:39]	auto[0]	59	1			T9	1		T28	2		T25	1
auto[36:39]	auto[1]	187	1			T3	2		T4	5		T16	1
auto[40:43]	auto[0]	57	1			T25	1		T29	3		T31	1
auto[40:43]	auto[1]	200	1			T3	1		T4	5		T16	1
auto[44:47]	auto[0]	65	1			T25	2		T31	1		T32	2
auto[44:47]	auto[1]	207	1			T4	1		T9	6		T22	2
auto[48:51]	auto[0]	49	1			T169	1		T194	1		T58	1
auto[48:51]	auto[1]	194	1			T3	1		T9	3		T16	2
auto[52:55]	auto[0]	332	1			T9	6		T25	3		T88	1
auto[52:55]	auto[1]	1159	1			T1	5		T3	13		T4	11
auto[56:59]	auto[0]	370	1			T2	2		T9	1		T24	1
auto[56:59]	auto[1]	691	1			T1	3		T2	2		T3	3
auto[60:63]	auto[0]	69	1			T9	3		T26	1		T29	1
auto[60:63]	auto[1]	192	1			T4	2		T9	3		T22	1
auto[64:67]	auto[0]	59	1			T26	1		T29	3		T31	2
auto[64:67]	auto[1]	192	1			T1	2		T4	3		T9	1
auto[68:71]	auto[0]	58	1			T25	2		T29	3		T194	1
auto[68:71]	auto[1]	157	1			T22	3		T16	1		T17	1
auto[72:75]	auto[0]	62	1			T24	1		T26	4		T168	1
auto[72:75]	auto[1]	229	1			T4	1		T22	1		T24	1
auto[76:79]	auto[0]	57	1			T26	1		T169	1		T34	6
auto[76:79]	auto[1]	187	1			T4	3		T22	1		T16	1
auto[80:83]	auto[0]	72	1			T25	1		T29	1		T31	4
auto[80:83]	auto[1]	212	1			T4	1		T22	2		T17	1
auto[84:87]	auto[0]	44	1			T9	1		T29	3		T30	1
auto[84:87]	auto[1]	193	1			T1	1		T4	2		T22	2
auto[88:91]	auto[0]	345	1			T9	8		T25	4		T26	2
auto[88:91]	auto[1]	1137	1			T1	6		T3	8		T4	7
auto[92:95]	auto[0]	52	1			T25	1		T31	1		T32	2
auto[92:95]	auto[1]	217	1			T1	1		T3	1		T4	8
auto[96:99]	auto[0]	68	1			T9	1		T26	1		T31	2
auto[96:99]	auto[1]	197	1			T3	1		T4	1		T22	1
auto[100:103]	auto[0]	72	1			T26	2		T30	1		T31	2
auto[100:103]	auto[1]	215	1			T1	2		T3	1		T4	1
auto[104:107]	auto[0]	353	1			T2	1		T9	2		T74	1
auto[104:107]	auto[1]	708	1			T1	1		T2	1		T4	4
auto[108:111]	auto[0]	64	1			T9	1		T25	2		T26	4
auto[108:111]	auto[1]	185	1			T1	3		T3	1		T4	2
auto[112:115]	auto[0]	58	1			T31	1		T32	1		T194	1
auto[112:115]	auto[1]	218	1			T1	1		T3	1		T4	1
auto[116:119]	auto[0]	65	1			T9	1		T25	2		T31	3
auto[116:119]	auto[1]	199	1			T1	2		T4	1		T9	1
auto[120:123]	auto[0]	60	1			T29	1		T30	1		T172	1
auto[120:123]	auto[1]	201	1			T3	1		T4	1		T22	2
auto[124:127]	auto[0]	58	1			T9	1		T32	3		T194	2
auto[124:127]	auto[1]	207	1			T1	2		T3	3		T9	3
auto[128:131]	auto[0]	60	1			T9	3		T29	1		T31	3
auto[128:131]	auto[1]	150	1			T1	2		T4	2		T22	1
auto[132:135]	auto[0]	65	1			T26	4		T31	3		T168	1
auto[132:135]	auto[1]	194	1			T4	1		T9	1		T22	6
auto[136:139]	auto[0]	63	1			T9	4		T29	1		T31	1
auto[136:139]	auto[1]	206	1			T4	6		T9	3		T16	2
auto[140:143]	auto[0]	62	1			T169	1		T34	1		T170	2
auto[140:143]	auto[1]	186	1			T4	1		T9	1		T22	1
auto[144:147]	auto[0]	68	1			T29	1		T30	3		T31	1
auto[144:147]	auto[1]	221	1			T1	1		T3	1		T4	3
auto[148:151]	auto[0]	54	1			T9	1		T25	3		T194	1
auto[148:151]	auto[1]	200	1			T1	1		T3	3		T4	5
auto[152:155]	auto[0]	62	1			T9	2		T29	1		T31	5
auto[152:155]	auto[1]	198	1			T1	3		T3	5		T17	1
auto[156:159]	auto[0]	348	1			T2	1		T9	9		T24	2
auto[156:159]	auto[1]	1143	1			T1	2		T2	1		T3	8
auto[160:163]	auto[0]	44	1			T9	3		T29	1		T31	2
auto[160:163]	auto[1]	200	1			T1	2		T3	2		T4	2
auto[164:167]	auto[0]	65	1			T9	3		T26	3		T33	1
auto[164:167]	auto[1]	253	1			T3	3		T4	2		T9	2
auto[168:171]	auto[0]	48	1			T9	2		T29	1		T31	1
auto[168:171]	auto[1]	216	1			T4	1		T22	3		T17	3
auto[172:175]	auto[0]	58	1			T9	1		T29	3		T31	1
auto[172:175]	auto[1]	194	1			T4	2		T9	3		T22	3
auto[176:179]	auto[0]	60	1			T9	2		T29	3		T31	2
auto[176:179]	auto[1]	170	1			T4	2		T9	3		T22	1
auto[180:183]	auto[0]	306	1			T9	4		T25	3		T26	3
auto[180:183]	auto[1]	1132	1			T1	5		T3	2		T4	9
auto[184:187]	auto[0]	341	1			T9	7		T25	5		T26	2
auto[184:187]	auto[1]	679	1			T1	1		T3	3		T4	5
auto[188:191]	auto[0]	50	1			T31	2		T32	2		T172	1
auto[188:191]	auto[1]	155	1			T1	1		T3	3		T4	2
auto[192:195]	auto[0]	66	1			T9	1		T28	1		T26	1
auto[192:195]	auto[1]	187	1			T4	3		T9	2		T22	1
auto[196:199]	auto[0]	73	1			T28	1		T25	5		T26	2
auto[196:199]	auto[1]	205	1			T1	1		T3	4		T4	5
auto[200:203]	auto[0]	52	1			T9	2		T30	1		T31	3
auto[200:203]	auto[1]	199	1			T3	1		T4	5		T9	2
auto[204:207]	auto[0]	69	1			T25	1		T29	3		T31	1
auto[204:207]	auto[1]	215	1			T1	2		T3	1		T4	13
auto[208:211]	auto[0]	60	1			T25	3		T26	2		T30	1
auto[208:211]	auto[1]	217	1			T4	6		T9	1		T22	2
auto[212:215]	auto[0]	51	1			T26	4		T29	1		T233	1
auto[212:215]	auto[1]	227	1			T3	3		T4	2		T9	1
auto[216:219]	auto[0]	47	1			T29	1		T30	1		T171	1
auto[216:219]	auto[1]	190	1			T3	2		T4	1		T9	1
auto[220:223]	auto[0]	69	1			T29	1		T200	1		T32	3
auto[220:223]	auto[1]	247	1			T4	6		T9	2		T22	3
auto[224:227]	auto[0]	54	1			T9	1		T32	1		T33	1
auto[224:227]	auto[1]	184	1			T1	1		T3	1		T4	2
auto[228:231]	auto[0]	64	1			T9	3		T25	1		T26	2
auto[228:231]	auto[1]	176	1			T1	2		T3	2		T4	4
auto[232:235]	auto[0]	583	1			T2	1		T9	5		T13	1
auto[232:235]	auto[1]	1590	1			T1	1		T2	1		T3	7
auto[236:239]	auto[0]	65	1			T26	2		T29	1		T32	1
auto[236:239]	auto[1]	167	1			T3	3		T4	6		T22	4
auto[240:243]	auto[0]	83	1			T9	3		T30	1		T27	1
auto[240:243]	auto[1]	215	1			T1	3		T3	1		T4	8
auto[244:247]	auto[0]	68	1			T28	2		T25	3		T29	1
auto[244:247]	auto[1]	224	1			T1	5		T3	1		T9	1
auto[248:251]	auto[0]	49	1			T25	1		T26	4		T233	1
auto[248:251]	auto[1]	195	1			T1	1		T3	1		T4	3
auto[252:255]	auto[0]	40	1			T29	1		T31	1		T34	1
auto[252:255]	auto[1]	194	1			T1	2		T3	1		T4	2