Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
99.32	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	18	0	18	100.00
Crosses	128	1	127	99.22

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_data	8	0	8	100.00	100	1	1	0
cp_mask	8	0	8	100.00	100	1	1	0
cp_payload_swap_en	2	0	2	100.00	100	1	1	2

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	1	127	99.22	100	1	1	0

Summary for Variable cp_data

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_data

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	2943	1			T27	36		T46	20		T161	40
values[1]	2877	1			T27	20		T43	2		T92	8
values[2]	3720	1			T1	12		T2	40		T3	20
values[3]	3197	1			T2	20		T10	4		T12	20
values[4]	3278	1			T2	47		T15	20		T27	97
values[5]	3128	1			T2	20		T27	20		T46	20
values[6]	3695	1			T2	30		T15	27		T151	2
values[7]	3796	1			T2	53		T27	40		T162	4

---

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_mask

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	3402	1			T2	69		T3	20		T27	80
values[1]	3674	1			T46	20		T153	12		T163	6
values[2]	4386	1			T1	12		T2	27		T25	6
values[3]	2893	1			T2	30		T12	20		T27	20
values[4]	3386	1			T2	24		T15	20		T43	2
values[5]	2927	1			T27	40		T164	18		T36	12
values[6]	3003	1			T2	20		T27	58		T162	4
values[7]	2963	1			T2	40		T10	4		T15	27

---

Summary for Variable cp_payload_swap_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_payload_swap_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

26198

1

T1

12

T2

208

T3

20

auto[1]

436

1

T2

2

T12

6

T15

1

---

Summary for Cross cr_all

Samples crossed: cp_payload_swap_en cp_data cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	1	127	99.22	1

Automatically Generated Cross Bins for cr_all

Uncovered bins

cp_payload_swap_en	cp_data	cp_mask	COUNT	AT LEAST	NUMBER	STATUS
[auto[1]]	[values[1]]	[values[4]]	0	1	1

Covered bins

cp_payload_swap_en	cp_data	cp_mask	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	values[0]	values[0]	360	1			T161	20		T29	33		T157	52
auto[0]	values[0]	values[1]	519	1			T165	14		T166	31		T167	27
auto[0]	values[0]	values[2]	250	1			T46	20		T20	20		T168	32
auto[0]	values[0]	values[3]	331	1			T161	20		T41	20		T169	16
auto[0]	values[0]	values[4]	334	1			T170	19		T20	78		T41	21
auto[0]	values[0]	values[5]	381	1			T37	20		T171	4		T157	20
auto[0]	values[0]	values[6]	334	1			T38	20		T124	16		T21	21
auto[0]	values[0]	values[7]	391	1			T27	36		T20	20		T41	33
auto[0]	values[1]	values[0]	475	1			T27	20		T39	41		T40	20
auto[0]	values[1]	values[1]	380	1			T157	41		T156	20		T168	22
auto[0]	values[1]	values[2]	543	1			T92	8		T37	19		T157	217
auto[0]	values[1]	values[3]	230	1			T172	20		T173	18		T174	40
auto[0]	values[1]	values[4]	217	1			T43	2		T152	22		T20	20
auto[0]	values[1]	values[5]	376	1			T175	14		T176	20		T177	18
auto[0]	values[1]	values[6]	189	1			T178	21		T179	20		T180	20
auto[0]	values[1]	values[7]	416	1			T181	40		T29	20		T85	6
auto[0]	values[2]	values[0]	593	1			T2	20		T3	20		T29	28
auto[0]	values[2]	values[1]	423	1			T182	16		T38	20		T181	35
auto[0]	values[2]	values[2]	568	1			T1	12		T37	78		T183	20
auto[0]	values[2]	values[3]	401	1			T39	20		T181	51		T29	19
auto[0]	values[2]	values[4]	498	1			T37	20		T38	28		T41	26
auto[0]	values[2]	values[5]	423	1			T38	22		T157	25		T174	20
auto[0]	values[2]	values[6]	517	1			T29	47		T184	14		T178	20
auto[0]	values[2]	values[7]	236	1			T2	20		T174	37		T145	20
auto[0]	values[3]	values[0]	264	1			T125	2		T174	21		T156	20
auto[0]	values[3]	values[1]	494	1			T46	20		T38	18		T181	27
auto[0]	values[3]	values[2]	291	1			T25	6		T37	39		T86	10
auto[0]	values[3]	values[3]	275	1			T12	14		T27	20		T185	6
auto[0]	values[3]	values[4]	490	1			T29	25		T172	31		T186	20
auto[0]	values[3]	values[5]	332	1			T187	8		T188	24		T189	20
auto[0]	values[3]	values[6]	369	1			T27	21		T93	12		T181	20
auto[0]	values[3]	values[7]	627	1			T2	19		T10	4		T37	24
auto[0]	values[4]	values[0]	223	1			T2	20		T27	39		T189	20
auto[0]	values[4]	values[1]	411	1			T123	16		T29	45		T190	18
auto[0]	values[4]	values[2]	929	1			T2	27		T31	2		T156	293
auto[0]	values[4]	values[3]	320	1			T39	20		T174	83		T191	6
auto[0]	values[4]	values[4]	419	1			T15	20		T46	24		T145	20
auto[0]	values[4]	values[5]	265	1			T181	73		T192	20		T193	2
auto[0]	values[4]	values[6]	338	1			T27	36		T194	8		T37	19
auto[0]	values[4]	values[7]	332	1			T27	20		T39	20		T21	20
auto[0]	values[5]	values[0]	392	1			T75	19		T195	2		T157	20
auto[0]	values[5]	values[1]	570	1			T181	25		T157	36		T196	10
auto[0]	values[5]	values[2]	596	1			T38	20		T84	8		T29	39
auto[0]	values[5]	values[3]	376	1			T46	20		T37	20		T38	20
auto[0]	values[5]	values[4]	253	1			T41	20		T29	21		T197	4
auto[0]	values[5]	values[5]	332	1			T27	20		T164	18		T36	8
auto[0]	values[5]	values[6]	290	1			T2	19		T29	28		T198	8
auto[0]	values[5]	values[7]	266	1			T199	12		T156	20		T200	20
auto[0]	values[6]	values[0]	592	1			T39	21		T38	26		T21	318
auto[0]	values[6]	values[1]	313	1			T153	12		T157	17		T167	26
auto[0]	values[6]	values[2]	600	1			T20	25		T38	20		T41	20
auto[0]	values[6]	values[3]	339	1			T2	30		T37	55		T177	20
auto[0]	values[6]	values[4]	711	1			T151	2		T37	20		T21	100
auto[0]	values[6]	values[5]	346	1			T29	20		T157	105		T156	20
auto[0]	values[6]	values[6]	386	1			T161	20		T39	24		T37	20
auto[0]	values[6]	values[7]	341	1			T15	26		T201	16		T202	4
auto[0]	values[7]	values[0]	459	1			T2	29		T27	20		T21	40
auto[0]	values[7]	values[1]	505	1			T163	6		T39	23		T29	50
auto[0]	values[7]	values[2]	548	1			T72	20		T40	20		T41	94
auto[0]	values[7]	values[3]	553	1			T37	69		T20	20		T38	21
auto[0]	values[7]	values[4]	410	1			T2	24		T203	24		T156	71
auto[0]	values[7]	values[5]	429	1			T27	20		T178	20		T204	22
auto[0]	values[7]	values[6]	522	1			T162	4		T39	33		T38	20
auto[0]	values[7]	values[7]	305	1			T39	20		T205	8		T29	22
auto[1]	values[0]	values[0]	4	1			T206	2		T207	1		T208	1
auto[1]	values[0]	values[1]	6	1			T180	2		T209	1		T210	1
auto[1]	values[0]	values[2]	6	1			T168	3		T211	1		T212	2
auto[1]	values[0]	values[3]	3	1			T213	1		T214	1		T208	1
auto[1]	values[0]	values[4]	8	1			T174	1		T189	1		T215	1
auto[1]	values[0]	values[5]	6	1			T216	1		T146	1		T55	2
auto[1]	values[0]	values[6]	6	1			T217	3		T218	1		T214	1
auto[1]	values[0]	values[7]	4	1			T41	1		T219	2		T214	1
auto[1]	values[1]	values[0]	12	1			T39	1		T40	1		T41	2
auto[1]	values[1]	values[1]	3	1			T220	3		-	-		-	-
auto[1]	values[1]	values[2]	9	1			T37	1		T157	5		T176	2
auto[1]	values[1]	values[3]	7	1			T174	4		T218	1		T212	2
auto[1]	values[1]	values[5]	7	1			T177	2		T166	3		T221	2
auto[1]	values[1]	values[6]	5	1			T221	1		T220	4		-	-
auto[1]	values[1]	values[7]	8	1			T166	2		T146	3		T55	1
auto[1]	values[2]	values[0]	3	1			T172	1		T222	1		T223	1
auto[1]	values[2]	values[1]	7	1			T156	1		T180	2		T212	1
auto[1]	values[2]	values[2]	6	1			T37	1		T216	1		T221	1
auto[1]	values[2]	values[3]	18	1			T29	1		T179	3		T47	3
auto[1]	values[2]	values[4]	8	1			T38	1		T183	2		T204	1
auto[1]	values[2]	values[5]	4	1			T189	1		T146	1		T52	1
auto[1]	values[2]	values[6]	10	1			T224	4		T180	3		T213	1
auto[1]	values[2]	values[7]	5	1			T174	2		T177	2		T52	1
auto[1]	values[3]	values[0]	5	1			T174	1		T225	4		-	-
auto[1]	values[3]	values[1]	9	1			T38	2		T209	1		T226	6
auto[1]	values[3]	values[2]	5	1			T178	2		T227	2		T180	1
auto[1]	values[3]	values[3]	8	1			T12	6		T47	2		-	-
auto[1]	values[3]	values[4]	5	1			T178	2		T189	1		T221	1
auto[1]	values[3]	values[5]	7	1			T228	3		T215	3		T229	1
auto[1]	values[3]	values[6]	6	1			T29	3		T230	3		-	-
auto[1]	values[3]	values[7]	10	1			T2	1		T216	3		T47	1
auto[1]	values[4]	values[0]	2	1			T27	1		T231	1		-	-
auto[1]	values[4]	values[1]	6	1			T29	1		T183	3		T223	2
auto[1]	values[4]	values[2]	7	1			T156	3		T183	1		T178	1
auto[1]	values[4]	values[3]	8	1			T177	1		T222	1		T47	3
auto[1]	values[4]	values[4]	5	1			T204	2		T192	2		T232	1
auto[1]	values[4]	values[5]	3	1			T181	2		T207	1		-	-
auto[1]	values[4]	values[6]	8	1			T27	1		T37	2		T20	1
auto[1]	values[4]	values[7]	2	1			T168	1		T233	1		-	-
auto[1]	values[5]	values[0]	4	1			T234	1		T179	1		T47	2
auto[1]	values[5]	values[1]	12	1			T157	3		T166	3		T179	1
auto[1]	values[5]	values[2]	12	1			T29	3		T216	1		T235	3
auto[1]	values[5]	values[3]	4	1			T210	1		T236	2		T231	1
auto[1]	values[5]	values[4]	5	1			T213	1		T237	1		T208	3
auto[1]	values[5]	values[5]	7	1			T36	4		T238	3		-	-
auto[1]	values[5]	values[6]	4	1			T2	1		T166	1		T239	2
auto[1]	values[5]	values[7]	5	1			T146	3		T210	1		T225	1
auto[1]	values[6]	values[0]	9	1			T38	3		T21	3		T189	2
auto[1]	values[6]	values[1]	11	1			T157	3		T167	3		T47	2
auto[1]	values[6]	values[2]	9	1			T38	3		T240	1		T241	2
auto[1]	values[6]	values[3]	4	1			T58	2		T242	2		-	-
auto[1]	values[6]	values[4]	11	1			T21	1		T178	1		T234	2
auto[1]	values[6]	values[5]	3	1			T157	1		T212	2		-	-
auto[1]	values[6]	values[6]	12	1			T39	3		T21	2		T29	3
auto[1]	values[6]	values[7]	8	1			T15	1		T21	1		T168	2
auto[1]	values[7]	values[0]	5	1			T146	2		T214	1		T233	1
auto[1]	values[7]	values[1]	5	1			T156	1		T240	1		T207	1
auto[1]	values[7]	values[2]	7	1			T41	2		T243	1		T240	1
auto[1]	values[7]	values[3]	16	1			T38	3		T122	2		T21	2
auto[1]	values[7]	values[4]	12	1			T156	1		T168	2		T189	1
auto[1]	values[7]	values[5]	6	1			T204	1		T244	1		T245	3
auto[1]	values[7]	values[6]	7	1			T210	2		T236	1		T246	1
auto[1]	values[7]	values[7]	7	1			T174	1		T245	3		T47	2