Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::flash_read_commands_cg

Group : spi_device_env_pkg::spi_device_env_cov::flash_read_commands_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::flash_read_commands_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	20	0	20	100.00
Crosses	154	0	154	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::flash_read_commands_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	11	0	11	100.00	100	1	1	0
cp_payload_size	7	0	7	100.00	100	1	1	0

Crosses for Group spi_device_env_pkg::spi_device_env_cov::flash_read_commands_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	154	0	154	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

13970

1

T3

9

T4

5

T6

197

auto[1]

39177

1

T1

62

T3

9

T4

5

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	11	0	11	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
internal_process_ops[0x9f]	1364	1			T1	1		T5	13		T6	8
internal_process_ops[0x5a]	1374	1			T1	3		T5	7		T6	4
internal_process_ops[0x05]	20468	1			T1	22		T4	2		T5	286
internal_process_ops[0x35]	1391	1			T1	2		T5	9		T6	6
internal_process_ops[0x15]	1343	1			T1	2		T5	11		T6	5
internal_process_ops[0x03]	1021	1			T5	1		T6	4		T8	2
internal_process_ops[0x0b]	959	1			T1	1		T5	2		T6	5
internal_process_ops[0x3b]	889	1			T1	1		T6	5		T10	1
internal_process_ops[0x6b]	993	1			T1	1		T4	2		T5	5
internal_process_ops[0xbb]	929	1			T4	2		T5	3		T6	9
internal_process_ops[0xeb]	929	1			T1	2		T5	5		T6	3

---

Summary for Variable cp_payload_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	7	0	7	100.00

User Defined Bins for cp_payload_size

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
excess_fifo	9694	1			T1	15		T4	2		T5	48
frequent_use_values[0]	7396	1			T1	11		T3	18		T5	67
frequent_use_values[1]	19992	1			T1	22		T5	288		T6	135
frequent_use_values[2]	1011	1			T1	2		T4	2		T5	10
frequent_use_values[3]	1137	1			T4	2		T5	5		T6	3
frequent_use_values[4]	1252	1			T1	2		T5	5		T6	1
frequent_use_values[256]	5501	1			T1	3		T4	2		T5	50

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered cp_payload_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	154	0	154	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	cp_payload_size	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
internal_process_ops[0x9f]	auto[0]	excess_fifo	161	1			T6	2		T40	1		T35	1
internal_process_ops[0x9f]	auto[0]	frequent_use_values[0]	13	1			T6	1		T113	1		T12	1
internal_process_ops[0x9f]	auto[0]	frequent_use_values[1]	8	1			T44	1		T192	1		T42	1
internal_process_ops[0x9f]	auto[0]	frequent_use_values[2]	12	1			T40	2		T158	1		T48	1
internal_process_ops[0x9f]	auto[0]	frequent_use_values[3]	14	1			T42	1		T193	1		T194	1
internal_process_ops[0x9f]	auto[0]	frequent_use_values[4]	14	1			T45	1		T57	1		T195	1
internal_process_ops[0x9f]	auto[0]	frequent_use_values[256]	67	1			T6	1		T8	1		T40	2
internal_process_ops[0x9f]	auto[1]	excess_fifo	339	1			T1	1		T5	1		T6	1
internal_process_ops[0x9f]	auto[1]	frequent_use_values[0]	31	1			T5	1		T6	1		T113	1
internal_process_ops[0x9f]	auto[1]	frequent_use_values[1]	30	1			T5	1		T192	1		T87	1
internal_process_ops[0x9f]	auto[1]	frequent_use_values[2]	41	1			T5	2		T158	1		T87	1
internal_process_ops[0x9f]	auto[1]	frequent_use_values[3]	43	1			T5	1		T12	1		T87	1
internal_process_ops[0x9f]	auto[1]	frequent_use_values[4]	32	1			T5	1		T22	1		T196	1
internal_process_ops[0x9f]	auto[1]	frequent_use_values[256]	237	1			T5	3		T6	1		T8	1
internal_process_ops[0x5a]	auto[0]	excess_fifo	134	1			T6	1		T40	3		T35	1
internal_process_ops[0x5a]	auto[0]	frequent_use_values[0]	9	1			T197	1		T198	1		T199	1
internal_process_ops[0x5a]	auto[0]	frequent_use_values[1]	5	1			T14	1		T57	1		T198	1
internal_process_ops[0x5a]	auto[0]	frequent_use_values[2]	12	1			T200	1		T201	1		T202	1
internal_process_ops[0x5a]	auto[0]	frequent_use_values[3]	22	1			T44	1		T47	1		T48	1
internal_process_ops[0x5a]	auto[0]	frequent_use_values[4]	15	1			T203	1		T201	1		T20	1
internal_process_ops[0x5a]	auto[0]	frequent_use_values[256]	82	1			T7	1		T35	1		T42	2
internal_process_ops[0x5a]	auto[1]	excess_fifo	320	1			T1	2		T5	1		T6	3
internal_process_ops[0x5a]	auto[1]	frequent_use_values[0]	40	1			T33	1		T40	1		T12	1
internal_process_ops[0x5a]	auto[1]	frequent_use_values[1]	31	1			T23	1		T183	1		T42	1
internal_process_ops[0x5a]	auto[1]	frequent_use_values[2]	43	1			T33	1		T23	1		T183	1
internal_process_ops[0x5a]	auto[1]	frequent_use_values[3]	39	1			T12	1		T22	1		T23	2
internal_process_ops[0x5a]	auto[1]	frequent_use_values[4]	35	1			T40	2		T23	1		T42	1
internal_process_ops[0x5a]	auto[1]	frequent_use_values[256]	265	1			T1	1		T5	4		T7	1
internal_process_ops[0x05]	auto[0]	excess_fifo	146	1			T6	1		T12	4		T42	3
internal_process_ops[0x05]	auto[0]	frequent_use_values[0]	3	1			T45	1		T204	1		T205	1
internal_process_ops[0x05]	auto[0]	frequent_use_values[1]	4455	1			T6	116		T40	152		T12	15
internal_process_ops[0x05]	auto[0]	frequent_use_values[2]	16	1			T40	1		T15	1		T206	1
internal_process_ops[0x05]	auto[0]	frequent_use_values[3]	9	1			T4	1		T178	1		T68	1
internal_process_ops[0x05]	auto[0]	frequent_use_values[4]	18	1			T6	1		T206	1		T207	1
internal_process_ops[0x05]	auto[0]	frequent_use_values[256]	80	1			T6	2		T7	1		T35	1
internal_process_ops[0x05]	auto[1]	excess_fifo	341	1			T6	1		T33	4		T40	5
internal_process_ops[0x05]	auto[1]	frequent_use_values[0]	29	1			T22	1		T182	1		T180	1
internal_process_ops[0x05]	auto[1]	frequent_use_values[1]	14718	1			T1	22		T5	281		T6	16
internal_process_ops[0x05]	auto[1]	frequent_use_values[2]	29	1			T40	1		T183	1		T47	1
internal_process_ops[0x05]	auto[1]	frequent_use_values[3]	28	1			T4	1		T42	1		T182	1
internal_process_ops[0x05]	auto[1]	frequent_use_values[4]	40	1			T42	2		T182	3		T196	1
internal_process_ops[0x05]	auto[1]	frequent_use_values[256]	235	1			T5	3		T6	1		T7	1
internal_process_ops[0x35]	auto[0]	excess_fifo	150	1			T6	1		T40	3		T35	4
internal_process_ops[0x35]	auto[0]	frequent_use_values[0]	7	1			T45	1		T42	1		T208	1
internal_process_ops[0x35]	auto[0]	frequent_use_values[1]	7	1			T40	1		T44	1		T17	1
internal_process_ops[0x35]	auto[0]	frequent_use_values[2]	15	1			T209	1		T47	1		T48	1
internal_process_ops[0x35]	auto[0]	frequent_use_values[3]	14	1			T40	2		T172	1		T195	1
internal_process_ops[0x35]	auto[0]	frequent_use_values[4]	20	1			T35	1		T45	1		T178	1
internal_process_ops[0x35]	auto[0]	frequent_use_values[256]	74	1			T6	2		T40	1		T12	2
internal_process_ops[0x35]	auto[1]	excess_fifo	335	1			T1	1		T5	4		T6	1
internal_process_ops[0x35]	auto[1]	frequent_use_values[0]	30	1			T83	1		T48	1		T180	1
internal_process_ops[0x35]	auto[1]	frequent_use_values[1]	28	1			T5	1		T33	1		T182	2
internal_process_ops[0x35]	auto[1]	frequent_use_values[2]	40	1			T35	1		T45	1		T209	1
internal_process_ops[0x35]	auto[1]	frequent_use_values[3]	33	1			T40	1		T23	3		T182	1
internal_process_ops[0x35]	auto[1]	frequent_use_values[4]	54	1			T35	1		T23	1		T42	2
internal_process_ops[0x35]	auto[1]	frequent_use_values[256]	249	1			T5	4		T33	1		T22	1
internal_process_ops[0x15]	auto[0]	excess_fifo	151	1			T6	2		T40	2		T12	2
internal_process_ops[0x15]	auto[0]	frequent_use_values[0]	2	1			T48	1		T210	1		-	-
internal_process_ops[0x15]	auto[0]	frequent_use_values[1]	6	1			T20	1		T211	1		T212	1
internal_process_ops[0x15]	auto[0]	frequent_use_values[2]	8	1			T172	1		T48	1		T213	1
internal_process_ops[0x15]	auto[0]	frequent_use_values[3]	13	1			T6	1		T74	1		T214	1
internal_process_ops[0x15]	auto[0]	frequent_use_values[4]	18	1			T12	1		T57	2		T215	1
internal_process_ops[0x15]	auto[0]	frequent_use_values[256]	75	1			T6	1		T40	1		T12	1
internal_process_ops[0x15]	auto[1]	excess_fifo	319	1			T5	2		T6	1		T33	1
internal_process_ops[0x15]	auto[1]	frequent_use_values[0]	37	1			T5	1		T23	1		T183	1
internal_process_ops[0x15]	auto[1]	frequent_use_values[1]	42	1			T35	1		T12	1		T23	1
internal_process_ops[0x15]	auto[1]	frequent_use_values[2]	28	1			T5	1		T182	1		T83	1
internal_process_ops[0x15]	auto[1]	frequent_use_values[3]	54	1			T23	1		T44	2		T183	1
internal_process_ops[0x15]	auto[1]	frequent_use_values[4]	52	1			T87	1		T183	1		T42	2
internal_process_ops[0x15]	auto[1]	frequent_use_values[256]	236	1			T1	1		T5	4		T12	1
internal_process_ops[0x03]	auto[0]	excess_fifo	162	1			T6	2		T9	2		T40	2
internal_process_ops[0x03]	auto[0]	frequent_use_values[0]	9	1			T47	1		T216	1		T207	1
internal_process_ops[0x03]	auto[0]	frequent_use_values[1]	8	1			T208	1		T198	1		T217	1
internal_process_ops[0x03]	auto[0]	frequent_use_values[2]	14	1			T40	1		T27	1		T208	1
internal_process_ops[0x03]	auto[0]	frequent_use_values[3]	18	1			T40	1		T113	1		T45	1
internal_process_ops[0x03]	auto[0]	frequent_use_values[4]	22	1			T113	1		T45	1		T68	2
internal_process_ops[0x03]	auto[0]	frequent_use_values[256]	19	1			T6	1		T177	1		T14	1
internal_process_ops[0x03]	auto[1]	excess_fifo	216	1			T5	1		T9	2		T40	3
internal_process_ops[0x03]	auto[1]	frequent_use_values[0]	25	1			T180	1		T218	1		T219	1
internal_process_ops[0x03]	auto[1]	frequent_use_values[1]	20	1			T152	1		T220	1		T221	1
internal_process_ops[0x03]	auto[1]	frequent_use_values[2]	27	1			T27	1		T83	1		T178	1
internal_process_ops[0x03]	auto[1]	frequent_use_values[3]	28	1			T40	1		T113	1		T22	1
internal_process_ops[0x03]	auto[1]	frequent_use_values[4]	42	1			T113	1		T23	1		T47	1
internal_process_ops[0x03]	auto[1]	frequent_use_values[256]	40	1			T33	1		T23	2		T177	1
internal_process_ops[0x0b]	auto[0]	excess_fifo	158	1			T6	2		T40	2		T35	1
internal_process_ops[0x0b]	auto[0]	frequent_use_values[0]	10	1			T201	1		T222	1		T166	1
internal_process_ops[0x0b]	auto[0]	frequent_use_values[1]	9	1			T40	1		T223	1		T224	1
internal_process_ops[0x0b]	auto[0]	frequent_use_values[2]	15	1			T40	1		T47	1		T68	1
internal_process_ops[0x0b]	auto[0]	frequent_use_values[3]	12	1			T178	1		T218	2		T225	1
internal_process_ops[0x0b]	auto[0]	frequent_use_values[4]	20	1			T40	1		T225	1		T208	1
internal_process_ops[0x0b]	auto[0]	frequent_use_values[256]	34	1			T6	1		T68	2		T226	1
internal_process_ops[0x0b]	auto[1]	excess_fifo	206	1			T1	1		T40	2		T12	5
internal_process_ops[0x0b]	auto[1]	frequent_use_values[0]	30	1			T23	1		T219	2		T196	1
internal_process_ops[0x0b]	auto[1]	frequent_use_values[1]	21	1			T223	1		T227	1		T201	1
internal_process_ops[0x0b]	auto[1]	frequent_use_values[2]	26	1			T33	1		T12	1		T44	2
internal_process_ops[0x0b]	auto[1]	frequent_use_values[3]	25	1			T45	1		T180	1		T228	1
internal_process_ops[0x0b]	auto[1]	frequent_use_values[4]	30	1			T35	1		T12	1		T23	1
internal_process_ops[0x0b]	auto[1]	frequent_use_values[256]	31	1			T44	2		T183	1		T151	1
internal_process_ops[0x3b]	auto[0]	excess_fifo	138	1			T6	2		T40	1		T35	1
internal_process_ops[0x3b]	auto[0]	frequent_use_values[0]	14	1			T40	1		T229	1		T230	2
internal_process_ops[0x3b]	auto[0]	frequent_use_values[1]	6	1			T44	1		T231	1		T232	1
internal_process_ops[0x3b]	auto[0]	frequent_use_values[2]	19	1			T45	1		T15	1		T20	1
internal_process_ops[0x3b]	auto[0]	frequent_use_values[3]	16	1			T223	1		T208	1		T226	1
internal_process_ops[0x3b]	auto[0]	frequent_use_values[4]	15	1			T44	2		T178	1		T233	1
internal_process_ops[0x3b]	auto[0]	frequent_use_values[256]	24	1			T40	2		T45	1		T47	2
internal_process_ops[0x3b]	auto[1]	excess_fifo	188	1			T6	1		T40	1		T35	1
internal_process_ops[0x3b]	auto[1]	frequent_use_values[0]	19	1			T83	1		T220	1		T228	1
internal_process_ops[0x3b]	auto[1]	frequent_use_values[1]	8	1			T12	1		T20	1		T207	1
internal_process_ops[0x3b]	auto[1]	frequent_use_values[2]	24	1			T23	1		T42	1		T178	1
internal_process_ops[0x3b]	auto[1]	frequent_use_values[3]	27	1			T23	1		T45	1		T182	1
internal_process_ops[0x3b]	auto[1]	frequent_use_values[4]	30	1			T40	1		T12	1		T182	1
internal_process_ops[0x3b]	auto[1]	frequent_use_values[256]	43	1			T22	1		T182	1		T68	1
internal_process_ops[0x6b]	auto[0]	excess_fifo	174	1			T6	2		T40	3		T35	2
internal_process_ops[0x6b]	auto[0]	frequent_use_values[0]	15	1			T158	1		T12	1		T44	1
internal_process_ops[0x6b]	auto[0]	frequent_use_values[1]	14	1			T14	1		T234	1		T20	1
internal_process_ops[0x6b]	auto[0]	frequent_use_values[2]	12	1			T4	1		T14	2		T235	1
internal_process_ops[0x6b]	auto[0]	frequent_use_values[3]	11	1			T201	1		T236	1		T166	1
internal_process_ops[0x6b]	auto[0]	frequent_use_values[4]	18	1			T35	1		T12	1		T44	1
internal_process_ops[0x6b]	auto[0]	frequent_use_values[256]	30	1			T6	1		T45	1		T208	1
internal_process_ops[0x6b]	auto[1]	excess_fifo	206	1			T1	1		T5	3		T33	1
internal_process_ops[0x6b]	auto[1]	frequent_use_values[0]	27	1			T6	1		T158	1		T151	1
internal_process_ops[0x6b]	auto[1]	frequent_use_values[1]	22	1			T44	2		T182	2		T178	1
internal_process_ops[0x6b]	auto[1]	frequent_use_values[2]	24	1			T4	1		T23	1		T183	1
internal_process_ops[0x6b]	auto[1]	frequent_use_values[3]	20	1			T182	1		T178	1		T68	2
internal_process_ops[0x6b]	auto[1]	frequent_use_values[4]	35	1			T35	1		T44	1		T237	1
internal_process_ops[0x6b]	auto[1]	frequent_use_values[256]	41	1			T5	1		T33	1		T12	1
internal_process_ops[0xbb]	auto[0]	excess_fifo	152	1			T12	2		T238	1		T44	1
internal_process_ops[0xbb]	auto[0]	frequent_use_values[0]	9	1			T14	1		T17	1		T234	1
internal_process_ops[0xbb]	auto[0]	frequent_use_values[1]	6	1			T42	1		T166	1		T239	1
internal_process_ops[0xbb]	auto[0]	frequent_use_values[2]	15	1			T44	1		T225	1		T240	1
internal_process_ops[0xbb]	auto[0]	frequent_use_values[3]	21	1			T113	1		T12	1		T178	1
internal_process_ops[0xbb]	auto[0]	frequent_use_values[4]	23	1			T158	1		T44	2		T48	1
internal_process_ops[0xbb]	auto[0]	frequent_use_values[256]	27	1			T40	2		T42	1		T178	1
internal_process_ops[0xbb]	auto[1]	excess_fifo	186	1			T6	3		T33	1		T40	1
internal_process_ops[0xbb]	auto[1]	frequent_use_values[0]	23	1			T23	1		T179	1		T219	1
internal_process_ops[0xbb]	auto[1]	frequent_use_values[1]	18	1			T33	1		T12	1		T241	1
internal_process_ops[0xbb]	auto[1]	frequent_use_values[2]	23	1			T44	1		T83	1		T14	1
internal_process_ops[0xbb]	auto[1]	frequent_use_values[3]	25	1			T113	1		T44	1		T45	1
internal_process_ops[0xbb]	auto[1]	frequent_use_values[4]	29	1			T158	1		T45	1		T181	1
internal_process_ops[0xbb]	auto[1]	frequent_use_values[256]	46	1			T5	2		T35	1		T44	1
internal_process_ops[0xeb]	auto[0]	excess_fifo	136	1			T40	1		T35	1		T12	1
internal_process_ops[0xeb]	auto[0]	frequent_use_values[0]	11	1			T42	1		T220	1		T207	1
internal_process_ops[0xeb]	auto[0]	frequent_use_values[1]	15	1			T45	1		T68	1		T242	1
internal_process_ops[0xeb]	auto[0]	frequent_use_values[2]	15	1			T208	1		T68	2		T14	1
internal_process_ops[0xeb]	auto[0]	frequent_use_values[3]	18	1			T45	1		T179	1		T208	1
internal_process_ops[0xeb]	auto[0]	frequent_use_values[4]	16	1			T35	1		T12	1		T243	1
internal_process_ops[0xeb]	auto[0]	frequent_use_values[256]	24	1			T6	1		T208	1		T68	1
internal_process_ops[0xeb]	auto[1]	excess_fifo	186	1			T1	2		T5	1		T12	3
internal_process_ops[0xeb]	auto[1]	frequent_use_values[0]	27	1			T5	1		T42	1		T47	1
internal_process_ops[0xeb]	auto[1]	frequent_use_values[1]	22	1			T23	1		T45	1		T220	1
internal_process_ops[0xeb]	auto[1]	frequent_use_values[2]	22	1			T44	1		T47	2		T48	2
internal_process_ops[0xeb]	auto[1]	frequent_use_values[3]	20	1			T44	2		T83	1		T48	1
internal_process_ops[0xeb]	auto[1]	frequent_use_values[4]	29	1			T40	1		T12	1		T243	1
internal_process_ops[0xeb]	auto[1]	frequent_use_values[256]	33	1			T35	1		T44	1		T42	1