Summary for Variable cp_prev_wr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_prev_wr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1939 |
1 |
|
|
T1 |
2 |
|
T5 |
16 |
|
T6 |
6 |
auto[1] |
586 |
1 |
|
|
T5 |
7 |
|
T33 |
2 |
|
T40 |
1 |
Summary for Variable cp_wr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_wr_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
1246 |
1 |
|
|
T1 |
2 |
|
T5 |
11 |
|
T6 |
6 |
auto[1] |
1279 |
1 |
|
|
T5 |
12 |
|
T33 |
4 |
|
T40 |
8 |
Summary for Cross cr_all
Samples crossed: cp_wr_en cp_prev_wr_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
Automatically Generated Cross Bins for cr_all
Bins
cp_wr_en | cp_prev_wr_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
auto[0] |
971 |
1 |
|
|
T1 |
2 |
|
T5 |
7 |
|
T6 |
6 |
auto[0] |
auto[1] |
275 |
1 |
|
|
T5 |
4 |
|
T33 |
1 |
|
T40 |
1 |
auto[1] |
auto[0] |
968 |
1 |
|
|
T5 |
9 |
|
T33 |
3 |
|
T40 |
8 |
auto[1] |
auto[1] |
311 |
1 |
|
|
T5 |
3 |
|
T33 |
1 |
|
T35 |
1 |