Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

10702

1

T1

123

T2

121

T5

118

auto[1]

39174

1

T1

96

T2

107

T3

1

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	1084	1			T1	2		T2	12		T5	5
auto[4:7]	21506	1			T1	74		T2	34		T5	72
auto[8:11]	1038	1			T1	7		T2	9		T3	1
auto[12:15]	258	1			T1	2		T2	2		T5	5
auto[16:19]	293	1			T2	7		T121	2		T14	4
auto[20:23]	1436	1			T1	6		T2	9		T5	8
auto[24:27]	267	1			T5	1		T23	5		T24	2
auto[28:31]	280	1			T1	3		T5	1		T12	2
auto[32:35]	312	1			T1	2		T2	1		T23	4
auto[36:39]	243	1			T1	2		T2	1		T5	2
auto[40:43]	270	1			T1	2		T5	1		T23	3
auto[44:47]	254	1			T1	4		T2	1		T12	3
auto[48:51]	261	1			T23	6		T14	2		T46	4
auto[52:55]	1473	1			T1	7		T2	10		T5	5
auto[56:59]	1019	1			T1	6		T2	6		T5	6
auto[60:63]	280	1			T1	3		T2	3		T23	2
auto[64:67]	234	1			T2	2		T5	3		T146	2
auto[68:71]	261	1			T2	1		T5	1		T121	4
auto[72:75]	228	1			T1	4		T5	1		T12	1
auto[76:79]	246	1			T1	1		T2	3		T12	3
auto[80:83]	270	1			T2	4		T5	2		T12	1
auto[84:87]	268	1			T1	4		T2	3		T5	1
auto[88:91]	1502	1			T1	5		T2	5		T5	5
auto[92:95]	260	1			T1	2		T2	1		T5	3
auto[96:99]	243	1			T1	1		T2	8		T7	2
auto[100:103]	213	1			T2	1		T5	2		T23	1
auto[104:107]	986	1			T1	5		T2	6		T5	4
auto[108:111]	278	1			T1	1		T2	5		T5	2
auto[112:115]	247	1			T1	2		T23	1		T24	2
auto[116:119]	243	1			T1	1		T5	5		T12	1
auto[120:123]	295	1			T1	3		T2	1		T5	2
auto[124:127]	295	1			T1	1		T5	5		T12	1
auto[128:131]	251	1			T1	1		T12	2		T16	3
auto[132:135]	253	1			T1	1		T12	1		T23	1
auto[136:139]	257	1			T1	1		T5	1		T12	1
auto[140:143]	217	1			T1	7		T2	3		T12	3
auto[144:147]	259	1			T1	1		T2	3		T5	4
auto[148:151]	280	1			T2	5		T5	2		T10	2
auto[152:155]	283	1			T2	1		T23	3		T41	1
auto[156:159]	1454	1			T1	8		T2	7		T5	7
auto[160:163]	237	1			T1	1		T2	2		T5	2
auto[164:167]	307	1			T1	1		T5	2		T12	3
auto[168:171]	276	1			T2	1		T12	1		T24	1
auto[172:175]	233	1			T5	1		T10	2		T12	1
auto[176:179]	263	1			T1	4		T2	2		T5	1
auto[180:183]	1435	1			T1	3		T2	6		T5	10
auto[184:187]	1030	1			T1	14		T2	14		T5	7
auto[188:191]	272	1			T1	1		T2	3		T12	3
auto[192:195]	278	1			T1	2		T2	1		T12	1
auto[196:199]	247	1			T1	1		T2	2		T23	1
auto[200:203]	263	1			T12	1		T23	3		T46	4
auto[204:207]	239	1			T1	2		T5	1		T12	1
auto[208:211]	237	1			T1	3		T2	2		T5	3
auto[212:215]	263	1			T1	1		T23	5		T24	1
auto[216:219]	219	1			T2	1		T5	1		T12	4
auto[220:223]	311	1			T2	3		T5	2		T10	2
auto[224:227]	246	1			T1	1		T2	7		T5	1
auto[228:231]	251	1			T1	2		T2	4		T5	3
auto[232:235]	2306	1			T1	12		T2	17		T5	15
auto[236:239]	268	1			T1	1		T2	1		T12	1
auto[240:243]	253	1			T2	3		T23	1		T24	1
auto[244:247]	285	1			T5	2		T121	2		T14	3
auto[248:251]	287	1			T2	4		T5	2		T24	1
auto[252:255]	273	1			T1	1		T2	1		T5	1

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	356	1			T2	7		T5	4		T12	3
auto[0:3]	auto[1]	728	1			T1	2		T2	5		T5	1
auto[4:7]	auto[0]	3854	1			T1	55		T2	20		T5	58
auto[4:7]	auto[1]	17652	1			T1	19		T2	14		T5	14
auto[8:11]	auto[0]	345	1			T1	5		T2	5		T24	8
auto[8:11]	auto[1]	693	1			T1	2		T2	4		T3	1
auto[12:15]	auto[0]	55	1			T2	2		T14	1		T47	1
auto[12:15]	auto[1]	203	1			T1	2		T5	5		T23	4
auto[16:19]	auto[0]	70	1			T2	5		T121	1		T44	1
auto[16:19]	auto[1]	223	1			T2	2		T121	1		T14	4
auto[20:23]	auto[0]	329	1			T1	6		T2	4		T5	2
auto[20:23]	auto[1]	1107	1			T2	5		T5	6		T12	4
auto[24:27]	auto[0]	62	1			T5	1		T24	2		T14	1
auto[24:27]	auto[1]	205	1			T23	5		T14	1		T15	1
auto[28:31]	auto[0]	58	1			T12	1		T14	1		T232	2
auto[28:31]	auto[1]	222	1			T1	3		T5	1		T12	1
auto[32:35]	auto[0]	75	1			T1	2		T14	1		T143	1
auto[32:35]	auto[1]	237	1			T2	1		T23	4		T14	1
auto[36:39]	auto[0]	54	1			T1	2		T2	1		T14	1
auto[36:39]	auto[1]	189	1			T5	2		T23	1		T16	3
auto[40:43]	auto[0]	62	1			T1	2		T44	3		T61	1
auto[40:43]	auto[1]	208	1			T5	1		T23	3		T68	3
auto[44:47]	auto[0]	51	1			T1	2		T2	1		T143	2
auto[44:47]	auto[1]	203	1			T1	2		T12	3		T23	1
auto[48:51]	auto[0]	50	1			T46	1		T44	2		T20	2
auto[48:51]	auto[1]	211	1			T23	6		T14	2		T46	3
auto[52:55]	auto[0]	311	1			T1	5		T2	4		T5	4
auto[52:55]	auto[1]	1162	1			T1	2		T2	6		T5	1
auto[56:59]	auto[0]	299	1			T1	2		T2	2		T5	3
auto[56:59]	auto[1]	720	1			T1	4		T2	4		T5	3
auto[60:63]	auto[0]	64	1			T2	1		T46	1		T20	1
auto[60:63]	auto[1]	216	1			T1	3		T2	2		T23	2
auto[64:67]	auto[0]	53	1			T2	1		T5	3		T44	2
auto[64:67]	auto[1]	181	1			T2	1		T146	2		T145	3
auto[68:71]	auto[0]	68	1			T2	1		T121	2		T14	2
auto[68:71]	auto[1]	193	1			T5	1		T121	2		T23	1
auto[72:75]	auto[0]	57	1			T5	1		T12	1		T14	1
auto[72:75]	auto[1]	171	1			T1	4		T23	1		T14	1
auto[76:79]	auto[0]	51	1			T1	1		T2	2		T12	3
auto[76:79]	auto[1]	195	1			T2	1		T23	3		T14	2
auto[80:83]	auto[0]	52	1			T2	2		T5	2		T12	1
auto[80:83]	auto[1]	218	1			T2	2		T121	2		T23	6
auto[84:87]	auto[0]	52	1			T2	3		T38	1		T144	1
auto[84:87]	auto[1]	216	1			T1	4		T5	1		T23	3
auto[88:91]	auto[0]	340	1			T1	4		T2	3		T9	1
auto[88:91]	auto[1]	1162	1			T1	1		T2	2		T5	5
auto[92:95]	auto[0]	47	1			T2	1		T14	5		T232	1
auto[92:95]	auto[1]	213	1			T1	2		T5	3		T12	1
auto[96:99]	auto[0]	47	1			T2	3		T7	1		T24	1
auto[96:99]	auto[1]	196	1			T1	1		T2	5		T7	1
auto[100:103]	auto[0]	43	1			T2	1		T5	2		T142	1
auto[100:103]	auto[1]	170	1			T23	1		T24	2		T15	4
auto[104:107]	auto[0]	330	1			T1	3		T2	5		T5	3
auto[104:107]	auto[1]	656	1			T1	2		T2	1		T5	1
auto[108:111]	auto[0]	62	1			T5	2		T24	2		T14	1
auto[108:111]	auto[1]	216	1			T1	1		T2	5		T23	4
auto[112:115]	auto[0]	51	1			T1	1		T46	3		T44	2
auto[112:115]	auto[1]	196	1			T1	1		T23	1		T24	2
auto[116:119]	auto[0]	62	1			T1	1		T5	3		T12	1
auto[116:119]	auto[1]	181	1			T5	2		T23	4		T15	1
auto[120:123]	auto[0]	70	1			T1	1		T2	1		T5	1
auto[120:123]	auto[1]	225	1			T1	2		T5	1		T7	2
auto[124:127]	auto[0]	48	1			T12	1		T44	1		T221	1
auto[124:127]	auto[1]	247	1			T1	1		T5	5		T23	2
auto[128:131]	auto[0]	61	1			T12	2		T44	2		T144	2
auto[128:131]	auto[1]	190	1			T1	1		T16	3		T146	1
auto[132:135]	auto[0]	54	1			T1	1		T12	1		T44	1
auto[132:135]	auto[1]	199	1			T23	1		T15	1		T16	1
auto[136:139]	auto[0]	59	1			T46	1		T143	2		T61	1
auto[136:139]	auto[1]	198	1			T1	1		T5	1		T12	1
auto[140:143]	auto[0]	40	1			T1	1		T12	2		T14	1
auto[140:143]	auto[1]	177	1			T1	6		T2	3		T12	1
auto[144:147]	auto[0]	56	1			T1	1		T24	1		T14	1
auto[144:147]	auto[1]	203	1			T2	3		T5	4		T12	2
auto[148:151]	auto[0]	65	1			T2	2		T5	2		T10	1
auto[148:151]	auto[1]	215	1			T2	3		T10	1		T15	2
auto[152:155]	auto[0]	50	1			T46	1		T164	1		T44	1
auto[152:155]	auto[1]	233	1			T2	1		T23	3		T41	1
auto[156:159]	auto[0]	340	1			T1	1		T2	4		T5	3
auto[156:159]	auto[1]	1114	1			T1	7		T2	3		T5	4
auto[160:163]	auto[0]	47	1			T12	2		T14	2		T144	2
auto[160:163]	auto[1]	190	1			T1	1		T2	2		T5	2
auto[164:167]	auto[0]	72	1			T1	1		T5	1		T12	3
auto[164:167]	auto[1]	235	1			T5	1		T23	4		T14	1
auto[168:171]	auto[0]	61	1			T2	1		T12	1		T24	1
auto[168:171]	auto[1]	215	1			T29	2		T41	1		T15	1
auto[172:175]	auto[0]	52	1			T10	1		T12	1		T14	1
auto[172:175]	auto[1]	181	1			T5	1		T10	1		T23	1
auto[176:179]	auto[0]	64	1			T1	1		T2	2		T5	1
auto[176:179]	auto[1]	199	1			T1	3		T12	1		T121	1
auto[180:183]	auto[0]	296	1			T1	3		T2	2		T5	5
auto[180:183]	auto[1]	1139	1			T2	4		T5	5		T12	1
auto[184:187]	auto[0]	345	1			T1	7		T2	9		T5	4
auto[184:187]	auto[1]	685	1			T1	7		T2	5		T5	3
auto[188:191]	auto[0]	65	1			T2	3		T12	3		T14	1
auto[188:191]	auto[1]	207	1			T1	1		T23	1		T24	1
auto[192:195]	auto[0]	72	1			T1	2		T12	1		T24	2
auto[192:195]	auto[1]	206	1			T2	1		T23	2		T46	3
auto[196:199]	auto[0]	46	1			T24	1		T46	2		T144	1
auto[196:199]	auto[1]	201	1			T1	1		T2	2		T23	1
auto[200:203]	auto[0]	63	1			T46	3		T164	1		T44	1
auto[200:203]	auto[1]	200	1			T12	1		T23	3		T46	1
auto[204:207]	auto[0]	67	1			T1	1		T5	1		T12	1
auto[204:207]	auto[1]	172	1			T1	1		T23	1		T43	1
auto[208:211]	auto[0]	51	1			T1	3		T2	2		T14	1
auto[208:211]	auto[1]	186	1			T5	3		T23	1		T24	2
auto[212:215]	auto[0]	60	1			T1	1		T24	1		T14	2
auto[212:215]	auto[1]	203	1			T23	5		T15	1		T46	2
auto[216:219]	auto[0]	41	1			T5	1		T12	2		T14	1
auto[216:219]	auto[1]	178	1			T2	1		T12	2		T23	2
auto[220:223]	auto[0]	65	1			T2	1		T5	2		T10	1
auto[220:223]	auto[1]	246	1			T2	2		T10	1		T23	4
auto[224:227]	auto[0]	51	1			T1	1		T2	5		T60	2
auto[224:227]	auto[1]	195	1			T2	2		T5	1		T16	2
auto[228:231]	auto[0]	38	1			T1	1		T2	1		T5	3
auto[228:231]	auto[1]	213	1			T1	1		T2	3		T23	1
auto[232:235]	auto[0]	620	1			T1	6		T2	8		T5	3
auto[232:235]	auto[1]	1686	1			T1	6		T2	9		T5	12
auto[236:239]	auto[0]	47	1			T46	1		T144	2		T128	1
auto[236:239]	auto[1]	221	1			T1	1		T2	1		T12	1
auto[240:243]	auto[0]	46	1			T2	3		T45	1		T143	2
auto[240:243]	auto[1]	207	1			T23	1		T24	1		T45	1
auto[244:247]	auto[0]	60	1			T121	1		T14	2		T44	1
auto[244:247]	auto[1]	225	1			T5	2		T121	1		T14	1
auto[248:251]	auto[0]	55	1			T2	3		T5	2		T46	1
auto[248:251]	auto[1]	232	1			T2	1		T24	1		T15	2
auto[252:255]	auto[0]	65	1			T5	1		T12	1		T14	1
auto[252:255]	auto[1]	208	1			T1	1		T2	1		T12	1