Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	18	0	18	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_data	8	0	8	100.00	100	1	1	0
cp_mask	8	0	8	100.00	100	1	1	0
cp_payload_swap_en	2	0	2	100.00	100	1	1	2

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_data

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_data

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	2763	1			T25	78		T53	14		T38	20
values[1]	3076	1			T22	20		T92	4		T25	22
values[2]	2648	1			T7	8		T39	40		T25	42
values[3]	2364	1			T43	45		T21	53		T46	20
values[4]	3292	1			T25	40		T38	40		T242	10
values[5]	3602	1			T11	6		T22	40		T25	91
values[6]	2892	1			T39	20		T54	8		T38	40
values[7]	3449	1			T2	10		T3	12		T22	25

---

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_mask

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	2494	1			T22	65		T25	20		T55	14
values[1]	3223	1			T2	10		T22	20		T39	40
values[2]	3390	1			T3	12		T25	42		T38	20
values[3]	3200	1			T25	69		T191	12		T255	2
values[4]	3195	1			T11	6		T44	24		T25	20
values[5]	3019	1			T7	8		T92	4		T25	42
values[6]	2886	1			T39	20		T25	109		T53	14
values[7]	2679	1			T39	20		T38	20		T94	20

---

Summary for Variable cp_payload_swap_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_payload_swap_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

23458

1

T2

10

T3

12

T7

8

auto[1]

628

1

T25

14

T38

2

T43

4

---

Summary for Cross cr_all

Samples crossed: cp_payload_swap_en cp_data cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_payload_swap_en	cp_data	cp_mask	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	values[0]	values[0]	137	1			T185	66		T275	20		T276	25
auto[0]	values[0]	values[1]	377	1			T249	6		T277	6		T206	30
auto[0]	values[0]	values[2]	476	1			T95	22		T101	8		T21	23
auto[0]	values[0]	values[3]	433	1			T154	20		T278	10		T135	21
auto[0]	values[0]	values[4]	458	1			T25	20		T264	22		T183	33
auto[0]	values[0]	values[5]	198	1			T279	10		T135	20		T211	22
auto[0]	values[0]	values[6]	294	1			T25	56		T53	14		T280	20
auto[0]	values[0]	values[7]	322	1			T38	20		T265	8		T50	20
auto[0]	values[1]	values[0]	522	1			T22	20		T18	20		T46	20
auto[0]	values[1]	values[1]	293	1			T50	20		T245	20		T257	20
auto[0]	values[1]	values[2]	439	1			T25	20		T183	19		T165	20
auto[0]	values[1]	values[3]	246	1			T50	20		T168	42		T200	67
auto[0]	values[1]	values[4]	344	1			T240	12		T21	20		T46	20
auto[0]	values[1]	values[5]	301	1			T92	4		T21	23		T222	28
auto[0]	values[1]	values[6]	435	1			T21	20		T166	58		T207	19
auto[0]	values[1]	values[7]	418	1			T212	20		T257	20		T208	20
auto[0]	values[2]	values[0]	284	1			T51	40		T190	20		T281	8
auto[0]	values[2]	values[1]	232	1			T21	20		T134	4		T164	18
auto[0]	values[2]	values[2]	340	1			T18	31		T51	24		T206	20
auto[0]	values[2]	values[3]	315	1			T47	16		T50	41		T51	21
auto[0]	values[2]	values[4]	320	1			T57	8		T58	20		T21	20
auto[0]	values[2]	values[5]	374	1			T7	8		T25	21		T161	2
auto[0]	values[2]	values[6]	396	1			T39	20		T25	20		T231	26
auto[0]	values[2]	values[7]	297	1			T39	20		T94	20		T43	20
auto[0]	values[3]	values[0]	292	1			T43	42		T190	20		T267	22
auto[0]	values[3]	values[1]	300	1			T21	23		T165	24		T135	20
auto[0]	values[3]	values[2]	174	1			T21	29		T48	20		T154	19
auto[0]	values[3]	values[3]	340	1			T46	19		T164	19		T253	14
auto[0]	values[3]	values[4]	290	1			T251	6		T183	23		T154	28
auto[0]	values[3]	values[5]	355	1			T51	22		T52	34		T164	59
auto[0]	values[3]	values[6]	351	1			T165	23		T197	20		T282	20
auto[0]	values[3]	values[7]	207	1			T48	19		T180	12		T135	38
auto[0]	values[4]	values[0]	290	1			T25	20		T21	24		T46	19
auto[0]	values[4]	values[1]	682	1			T50	38		T164	20		T165	40
auto[0]	values[4]	values[2]	573	1			T25	18		T38	19		T220	2
auto[0]	values[4]	values[3]	356	1			T216	2		T209	12		T130	2
auto[0]	values[4]	values[4]	228	1			T38	20		T50	20		T168	40
auto[0]	values[4]	values[5]	484	1			T242	10		T237	20		T164	20
auto[0]	values[4]	values[6]	250	1			T46	19		T250	16		T225	20
auto[0]	values[4]	values[7]	359	1			T259	12		T77	21		T283	6
auto[0]	values[5]	values[0]	299	1			T22	20		T55	14		T46	20
auto[0]	values[5]	values[1]	437	1			T22	20		T25	40		T239	6
auto[0]	values[5]	values[2]	504	1			T246	14		T52	33		T212	20
auto[0]	values[5]	values[3]	436	1			T168	100		T51	20		T164	20
auto[0]	values[5]	values[4]	589	1			T11	6		T52	20		T212	20
auto[0]	values[5]	values[5]	484	1			T25	19		T45	14		T34	20
auto[0]	values[5]	values[6]	404	1			T25	29		T43	39		T199	22
auto[0]	values[5]	values[7]	357	1			T168	20		T211	23		T189	26
auto[0]	values[6]	values[0]	273	1			T212	20		T211	19		T282	20
auto[0]	values[6]	values[1]	434	1			T39	20		T46	20		T48	18
auto[0]	values[6]	values[2]	251	1			T241	2		T47	33		T50	20
auto[0]	values[6]	values[3]	491	1			T191	12		T255	2		T46	20
auto[0]	values[6]	values[4]	395	1			T54	8		T38	20		T21	22
auto[0]	values[6]	values[5]	308	1			T51	50		T59	70		T77	20
auto[0]	values[6]	values[6]	335	1			T38	19		T215	18		T167	12
auto[0]	values[6]	values[7]	321	1			T46	20		T168	20		T52	20
auto[0]	values[7]	values[0]	331	1			T22	25		T229	6		T183	24
auto[0]	values[7]	values[1]	358	1			T2	10		T39	20		T168	23
auto[0]	values[7]	values[2]	544	1			T3	12		T43	19		T46	20
auto[0]	values[7]	values[3]	494	1			T25	65		T164	42		T260	18
auto[0]	values[7]	values[4]	518	1			T44	24		T248	12		T212	19
auto[0]	values[7]	values[5]	428	1			T168	18		T222	19		T185	45
auto[0]	values[7]	values[6]	346	1			T227	19		T193	20		T181	2
auto[0]	values[7]	values[7]	339	1			T232	20		T227	19		T243	2
auto[1]	values[0]	values[0]	4	1			T185	2		T276	1		T284	1
auto[1]	values[0]	values[1]	12	1			T206	1		T207	1		T285	4
auto[1]	values[0]	values[2]	14	1			T21	1		T197	1		T227	4
auto[1]	values[0]	values[3]	7	1			T135	1		T286	2		T287	2
auto[1]	values[0]	values[4]	8	1			T59	2		T77	2		T288	2
auto[1]	values[0]	values[5]	11	1			T211	4		T205	4		T289	1
auto[1]	values[0]	values[6]	4	1			T25	2		T210	1		T203	1
auto[1]	values[0]	values[7]	8	1			T193	2		T290	2		T291	2
auto[1]	values[1]	values[0]	11	1			T225	1		T292	2		T293	1
auto[1]	values[1]	values[1]	12	1			T166	2		T294	2		T203	2
auto[1]	values[1]	values[2]	8	1			T25	2		T183	1		T185	1
auto[1]	values[1]	values[3]	8	1			T168	2		T200	2		T203	2
auto[1]	values[1]	values[4]	7	1			T165	1		T186	1		T295	4
auto[1]	values[1]	values[5]	10	1			T285	3		T276	2		T295	1
auto[1]	values[1]	values[6]	15	1			T166	3		T207	1		T296	1
auto[1]	values[1]	values[7]	7	1			T200	1		T295	1		T296	2
auto[1]	values[2]	values[0]	12	1			T51	1		T210	2		T285	4
auto[1]	values[2]	values[1]	8	1			T164	2		T166	3		T297	2
auto[1]	values[2]	values[2]	3	1			T51	3		-	-		-	-
auto[1]	values[2]	values[3]	20	1			T47	4		T51	1		T82	4
auto[1]	values[2]	values[4]	5	1			T193	1		T211	1		T285	1
auto[1]	values[2]	values[5]	12	1			T25	1		T169	4		T183	1
auto[1]	values[2]	values[6]	16	1			T164	1		T222	3		T298	4
auto[1]	values[2]	values[7]	14	1			T165	1		T77	3		T135	4
auto[1]	values[3]	values[0]	10	1			T43	3		T261	1		T288	2
auto[1]	values[3]	values[1]	10	1			T21	1		T185	3		T268	1
auto[1]	values[3]	values[2]	6	1			T154	1		T299	2		T195	2
auto[1]	values[3]	values[3]	7	1			T46	1		T164	1		T300	1
auto[1]	values[3]	values[4]	3	1			T200	1		T301	1		T291	1
auto[1]	values[3]	values[5]	6	1			T51	2		T164	2		T157	1
auto[1]	values[3]	values[6]	10	1			T203	6		T287	1		T291	1
auto[1]	values[3]	values[7]	3	1			T48	1		T135	2		-	-
auto[1]	values[4]	values[0]	3	1			T46	1		T211	1		T36	1
auto[1]	values[4]	values[1]	20	1			T285	1		T302	4		T290	1
auto[1]	values[4]	values[2]	14	1			T25	2		T38	1		T185	2
auto[1]	values[4]	values[3]	9	1			T50	1		T135	5		T210	3
auto[1]	values[4]	values[4]	7	1			T303	1		T205	3		T304	3
auto[1]	values[4]	values[5]	9	1			T206	2		T190	1		T59	1
auto[1]	values[4]	values[6]	2	1			T46	1		T186	1		-	-
auto[1]	values[4]	values[7]	6	1			T77	2		T186	1		T305	1
auto[1]	values[5]	values[0]	6	1			T59	3		T208	1		T195	1
auto[1]	values[5]	values[1]	18	1			T48	2		T50	2		T183	1
auto[1]	values[5]	values[2]	23	1			T52	1		T269	2		T183	1
auto[1]	values[5]	values[3]	15	1			T168	1		T282	5		T276	2
auto[1]	values[5]	values[4]	8	1			T59	1		T200	2		T276	1
auto[1]	values[5]	values[5]	12	1			T25	1		T282	1		T306	4
auto[1]	values[5]	values[6]	5	1			T25	2		T307	1		T308	2
auto[1]	values[5]	values[7]	5	1			T211	2		T189	1		T293	1
auto[1]	values[6]	values[0]	13	1			T211	4		T210	3		T309	2
auto[1]	values[6]	values[1]	20	1			T48	2		T183	1		T166	2
auto[1]	values[6]	values[2]	8	1			T47	6		T165	1		T292	1
auto[1]	values[6]	values[3]	10	1			T275	1		T223	1		T296	1
auto[1]	values[6]	values[4]	3	1			T210	1		T195	2		-	-
auto[1]	values[6]	values[5]	14	1			T51	4		T59	5		T210	3
auto[1]	values[6]	values[6]	9	1			T38	1		T49	2		T273	1
auto[1]	values[6]	values[7]	7	1			T310	1		T36	1		T311	4
auto[1]	values[7]	values[0]	7	1			T225	1		T261	1		T300	2
auto[1]	values[7]	values[1]	10	1			T168	2		T52	1		T59	2
auto[1]	values[7]	values[2]	13	1			T43	1		T50	4		T211	1
auto[1]	values[7]	values[3]	13	1			T25	4		T164	5		T205	3
auto[1]	values[7]	values[4]	12	1			T212	1		T165	1		T210	2
auto[1]	values[7]	values[5]	13	1			T168	2		T222	1		T185	1
auto[1]	values[7]	values[6]	14	1			T227	1		T186	4		T157	3
auto[1]	values[7]	values[7]	9	1			T227	1		T223	2		T311	2