Group : spi_device_env_pkg::spi_device_env_cov::flash_mailbox_cg
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Group : spi_device_env_pkg::spi_device_env_cov::flash_mailbox_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv



Summary for Group spi_device_env_pkg::spi_device_env_cov::flash_mailbox_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00


Variables for Group spi_device_env_pkg::spi_device_env_cov::flash_mailbox_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_opcode 6 0 6 100.00 100 1 1 0


Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 6 0 6 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
read_ops[0x03] 188 1 T8 1 T37 4 T14 2
read_ops[0x0b] 189 1 T8 1 T32 2 T46 1
read_ops[0x3b] 216 1 T8 6 T45 1 T32 2
read_ops[0x6b] 223 1 T8 4 T45 1 T32 1
read_ops[0xbb] 200 1 T8 1 T45 1 T32 4
read_ops[0xeb] 216 1 T8 2 T32 4 T37 5

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%