Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	18	0	18	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_data	8	0	8	100.00	100	1	1	0
cp_mask	8	0	8	100.00	100	1	1	0
cp_payload_swap_en	2	0	2	100.00	100	1	1	2

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_data

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_data

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	3513	1			T9	20		T26	12		T14	50
values[1]	3571	1			T40	104		T33	44		T34	40
values[2]	3458	1			T3	10		T9	20		T33	131
values[3]	3065	1			T9	40		T33	40		T39	15
values[4]	3643	1			T9	100		T44	10		T33	20
values[5]	2678	1			T9	40		T33	20		T34	20
values[6]	3046	1			T5	10		T9	20		T33	41
values[7]	3219	1			T7	2		T9	20		T33	88

---

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_mask

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	3620	1			T9	80		T33	40		T34	29
values[1]	3656	1			T9	20		T40	104		T33	48
values[2]	3000	1			T9	20		T33	20		T34	20
values[3]	3246	1			T9	40		T33	126		T34	60
values[4]	2863	1			T9	40		T33	45		T42	80
values[5]	3138	1			T9	20		T26	12		T15	45
values[6]	3120	1			T3	10		T9	40		T44	10
values[7]	3550	1			T5	10		T7	2		T33	105

---

Summary for Variable cp_payload_swap_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_payload_swap_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

25499

1

T3

10

T5

10

T7

2

auto[1]

694

1

T9

11

T33

9

T34

6

---

Summary for Cross cr_all

Samples crossed: cp_payload_swap_en cp_data cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_payload_swap_en	cp_data	cp_mask	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	values[0]	values[0]	391	1			T9	20		T131	20		T276	54
auto[0]	values[0]	values[1]	515	1			T15	27		T46	20		T186	20
auto[0]	values[0]	values[2]	265	1			T43	18		T228	20		T48	18
auto[0]	values[0]	values[3]	338	1			T14	27		T47	20		T48	21
auto[0]	values[0]	values[4]	502	1			T42	20		T209	22		T83	45
auto[0]	values[0]	values[5]	399	1			T26	12		T47	30		T201	16
auto[0]	values[0]	values[6]	568	1			T14	20		T257	28		T191	19
auto[0]	values[0]	values[7]	428	1			T205	23		T245	75		T54	22
auto[0]	values[1]	values[0]	546	1			T46	20		T264	38		T216	21
auto[0]	values[1]	values[1]	415	1			T40	104		T34	20		T199	20
auto[0]	values[1]	values[2]	443	1			T42	19		T275	61		T197	46
auto[0]	values[1]	values[3]	332	1			T34	19		T96	2		T14	19
auto[0]	values[1]	values[4]	572	1			T42	20		T271	4		T223	12
auto[0]	values[1]	values[5]	305	1			T172	20		T277	2		T199	20
auto[0]	values[1]	values[6]	335	1			T253	6		T42	17		T46	20
auto[0]	values[1]	values[7]	531	1			T33	42		T90	8		T46	59
auto[0]	values[2]	values[0]	493	1			T173	19		T83	57		T197	20
auto[0]	values[2]	values[1]	335	1			T33	19		T131	20		T186	20
auto[0]	values[2]	values[2]	492	1			T173	19		T216	21		T224	20
auto[0]	values[2]	values[3]	517	1			T33	83		T23	20		T112	24
auto[0]	values[2]	values[4]	292	1			T33	25		T266	8		T247	20
auto[0]	values[2]	values[5]	445	1			T47	25		T173	20		T197	71
auto[0]	values[2]	values[6]	369	1			T3	10		T9	18		T232	20
auto[0]	values[2]	values[7]	438	1			T47	89		T83	19		T195	20
auto[0]	values[3]	values[0]	520	1			T9	20		T263	2		T248	12
auto[0]	values[3]	values[1]	596	1			T47	26		T48	117		T172	20
auto[0]	values[3]	values[2]	306	1			T33	19		T252	2		T199	23
auto[0]	values[3]	values[3]	364	1			T33	19		T34	20		T172	24
auto[0]	values[3]	values[4]	229	1			T9	20		T278	2		T132	4
auto[0]	values[3]	values[5]	358	1			T43	19		T192	4		T256	18
auto[0]	values[3]	values[6]	291	1			T111	8		T43	17		T220	20
auto[0]	values[3]	values[7]	334	1			T39	15		T199	26		T186	18
auto[0]	values[4]	values[0]	385	1			T33	20		T34	26		T167	8
auto[0]	values[4]	values[1]	532	1			T199	18		T78	24		T131	28
auto[0]	values[4]	values[2]	418	1			T9	19		T34	20		T42	20
auto[0]	values[4]	values[3]	490	1			T9	40		T15	24		T47	23
auto[0]	values[4]	values[4]	294	1			T186	16		T220	19		T279	6
auto[0]	values[4]	values[5]	406	1			T9	17		T199	29		T219	20
auto[0]	values[4]	values[6]	489	1			T9	20		T44	10		T14	20
auto[0]	values[4]	values[7]	519	1			T235	59		T83	56		T197	53
auto[0]	values[5]	values[0]	347	1			T9	36		T33	20		T46	19
auto[0]	values[5]	values[1]	383	1			T42	20		T48	25		T172	19
auto[0]	values[5]	values[2]	230	1			T262	2		T199	20		T54	32
auto[0]	values[5]	values[3]	272	1			T34	18		T260	8		T199	20
auto[0]	values[5]	values[4]	321	1			T42	19		T172	20		T199	20
auto[0]	values[5]	values[5]	410	1			T280	4		T83	39		T197	19
auto[0]	values[5]	values[6]	285	1			T18	23		T197	73		T155	20
auto[0]	values[5]	values[7]	330	1			T42	39		T49	2		T173	103
auto[0]	values[6]	values[0]	556	1			T268	6		T199	19		T125	24
auto[0]	values[6]	values[1]	421	1			T9	20		T43	20		T219	20
auto[0]	values[6]	values[2]	260	1			T47	22		T205	27		T193	19
auto[0]	values[6]	values[3]	466	1			T42	19		T43	19		T48	27
auto[0]	values[6]	values[4]	321	1			T43	18		T170	12		T208	10
auto[0]	values[6]	values[5]	363	1			T15	45		T43	37		T199	21
auto[0]	values[6]	values[6]	286	1			T193	20		T281	42		T282	18
auto[0]	values[6]	values[7]	307	1			T5	10		T33	41		T34	23
auto[0]	values[7]	values[0]	289	1			T45	20		T199	20		T255	16
auto[0]	values[7]	values[1]	377	1			T33	27		T43	18		T219	24
auto[0]	values[7]	values[2]	513	1			T43	20		T48	199		T205	34
auto[0]	values[7]	values[3]	357	1			T33	20		T215	8		T225	14
auto[0]	values[7]	values[4]	262	1			T9	19		T33	20		T42	20
auto[0]	values[7]	values[5]	373	1			T251	4		T256	20		T220	20
auto[0]	values[7]	values[6]	401	1			T46	25		T202	12		T265	4
auto[0]	values[7]	values[7]	572	1			T7	2		T33	20		T48	20
auto[1]	values[0]	values[0]	12	1			T276	1		T283	3		T284	1
auto[1]	values[0]	values[1]	4	1			T245	2		T270	1		T285	1
auto[1]	values[0]	values[2]	8	1			T43	2		T48	2		T224	2
auto[1]	values[0]	values[3]	14	1			T14	3		T191	1		T186	2
auto[1]	values[0]	values[4]	13	1			T83	1		T286	1		T287	2
auto[1]	values[0]	values[5]	12	1			T47	1		T199	1		T193	2
auto[1]	values[0]	values[6]	17	1			T191	1		T288	8		T241	2
auto[1]	values[0]	values[7]	27	1			T245	1		T289	4		T290	1
auto[1]	values[1]	values[0]	9	1			T193	2		T291	1		T292	2
auto[1]	values[1]	values[1]	14	1			T191	5		T245	2		T135	2
auto[1]	values[1]	values[2]	12	1			T42	1		T205	4		T293	2
auto[1]	values[1]	values[3]	20	1			T34	1		T14	2		T197	7
auto[1]	values[1]	values[4]	10	1			T216	2		T195	1		T273	2
auto[1]	values[1]	values[5]	6	1			T83	2		T195	2		T193	1
auto[1]	values[1]	values[6]	8	1			T42	3		T186	1		T294	1
auto[1]	values[1]	values[7]	13	1			T33	2		T48	1		T219	1
auto[1]	values[2]	values[0]	5	1			T173	1		T135	1		T295	1
auto[1]	values[2]	values[1]	7	1			T33	1		T203	1		T212	2
auto[1]	values[2]	values[2]	19	1			T173	1		T216	3		T256	1
auto[1]	values[2]	values[3]	15	1			T33	3		T47	3		T270	1
auto[1]	values[2]	values[4]	6	1			T131	1		T283	3		T291	1
auto[1]	values[2]	values[5]	8	1			T47	1		T186	2		T285	1
auto[1]	values[2]	values[6]	13	1			T9	2		T131	1		T54	2
auto[1]	values[2]	values[7]	4	1			T83	1		T156	1		T296	2
auto[1]	values[3]	values[0]	12	1			T172	1		T131	2		T193	1
auto[1]	values[3]	values[1]	11	1			T230	2		T273	1		T293	1
auto[1]	values[3]	values[2]	6	1			T33	1		T256	2		T297	2
auto[1]	values[3]	values[3]	7	1			T33	1		T298	1		T294	1
auto[1]	values[3]	values[4]	3	1			T284	1		T287	1		T299	1
auto[1]	values[3]	values[5]	11	1			T43	1		T256	2		T294	2
auto[1]	values[3]	values[6]	11	1			T43	3		T298	1		T241	2
auto[1]	values[3]	values[7]	6	1			T186	2		T195	1		T245	1
auto[1]	values[4]	values[0]	13	1			T34	3		T300	5		T301	1
auto[1]	values[4]	values[1]	16	1			T199	2		T195	2		T203	2
auto[1]	values[4]	values[2]	9	1			T9	1		T230	1		T156	1
auto[1]	values[4]	values[3]	16	1			T15	2		T173	1		T199	3
auto[1]	values[4]	values[4]	12	1			T186	4		T220	1		T206	2
auto[1]	values[4]	values[5]	18	1			T9	3		T237	3		T269	1
auto[1]	values[4]	values[6]	12	1			T14	1		T42	1		T193	1
auto[1]	values[4]	values[7]	14	1			T197	3		T245	1		T302	2
auto[1]	values[5]	values[0]	24	1			T9	4		T46	1		T43	3
auto[1]	values[5]	values[1]	20	1			T172	1		T83	3		T130	6
auto[1]	values[5]	values[2]	6	1			T273	1		T303	2		T135	1
auto[1]	values[5]	values[3]	6	1			T34	2		T284	2		T291	1
auto[1]	values[5]	values[4]	10	1			T42	1		T54	2		T206	2
auto[1]	values[5]	values[5]	6	1			T83	1		T197	1		T273	2
auto[1]	values[5]	values[6]	19	1			T18	4		T197	3		T212	2
auto[1]	values[5]	values[7]	9	1			T42	1		T49	2		T135	1
auto[1]	values[6]	values[0]	12	1			T268	2		T199	1		T238	2
auto[1]	values[6]	values[1]	3	1			T290	1		T283	1		T304	1
auto[1]	values[6]	values[2]	8	1			T193	1		T212	4		T305	1
auto[1]	values[6]	values[3]	14	1			T42	1		T43	1		T48	1
auto[1]	values[6]	values[4]	11	1			T43	2		T219	1		T155	2
auto[1]	values[6]	values[5]	6	1			T43	3		T285	1		T306	1
auto[1]	values[6]	values[6]	7	1			T281	1		T303	1		T135	1
auto[1]	values[6]	values[7]	5	1			T43	1		T48	2		T284	2
auto[1]	values[7]	values[0]	6	1			T199	2		T300	1		T307	1
auto[1]	values[7]	values[1]	7	1			T33	1		T43	2		T219	1
auto[1]	values[7]	values[2]	5	1			T295	1		T301	1		T308	2
auto[1]	values[7]	values[3]	18	1			T225	2		T219	1		T309	4
auto[1]	values[7]	values[4]	5	1			T9	1		T156	1		T294	3
auto[1]	values[7]	values[5]	12	1			T193	1		T273	1		T134	1
auto[1]	values[7]	values[6]	9	1			T46	1		T290	3		T284	3
auto[1]	values[7]	values[7]	13	1			T193	2		T270	3		T295	3