Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	18	0	18	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_data	8	0	8	100.00	100	1	1	0
cp_mask	8	0	8	100.00	100	1	1	0
cp_payload_swap_en	2	0	2	100.00	100	1	1	2

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_payload_swap_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_data

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_data

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	3491	1			T15	29		T30	55		T37	20
values[1]	4457	1			T5	22		T16	8		T30	137
values[2]	3657	1			T14	22		T38	16		T37	46
values[3]	3494	1			T10	6		T15	20		T37	20
values[4]	3958	1			T15	20		T30	27		T40	24
values[5]	3141	1			T13	12		T37	84		T39	91
values[6]	4276	1			T30	30		T118	10		T37	64
values[7]	3832	1			T15	20		T36	12		T30	20

---

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for cp_mask

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0]	3567	1			T16	8		T36	12		T30	20
values[1]	3618	1			T5	22		T30	137		T37	66
values[2]	4047	1			T10	6		T15	69		T37	20
values[3]	3960	1			T37	20		T226	19		T41	40
values[4]	3743	1			T30	27		T39	132		T41	20
values[5]	3718	1			T14	22		T15	20		T30	30
values[6]	3967	1			T13	12		T38	16		T30	55
values[7]	3686	1			T37	89		T18	22		T42	60

---

Summary for Variable cp_payload_swap_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_payload_swap_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

29529

1

T5

22

T10

6

T13

12

auto[1]

777

1

T15

1

T30

6

T37

8

---

Summary for Cross cr_all

Samples crossed: cp_payload_swap_en cp_data cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_payload_swap_en	cp_data	cp_mask	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	values[0]	values[0]	315	1			T41	18		T20	22		T140	18
auto[0]	values[0]	values[1]	380	1			T39	50		T27	20		T180	29
auto[0]	values[0]	values[2]	465	1			T15	28		T19	20		T20	53
auto[0]	values[0]	values[3]	473	1			T37	18		T226	19		T162	40
auto[0]	values[0]	values[4]	372	1			T210	16		T141	23		T251	17
auto[0]	values[0]	values[5]	559	1			T191	4		T185	20		T194	41
auto[0]	values[0]	values[6]	504	1			T30	53		T18	72		T203	20
auto[0]	values[0]	values[7]	340	1			T42	40		T55	28		T184	33
auto[0]	values[1]	values[0]	400	1			T16	8		T46	20		T141	20
auto[0]	values[1]	values[1]	659	1			T5	22		T30	136		T37	44
auto[0]	values[1]	values[2]	527	1			T209	20		T184	18		T189	19
auto[0]	values[1]	values[3]	531	1			T41	20		T42	20		T201	19
auto[0]	values[1]	values[4]	582	1			T39	54		T162	89		T55	20
auto[0]	values[1]	values[5]	282	1			T42	19		T252	10		T27	26
auto[0]	values[1]	values[6]	774	1			T22	44		T232	12		T253	16
auto[0]	values[1]	values[7]	577	1			T250	16		T46	44		T189	20
auto[0]	values[2]	values[0]	494	1			T19	42		T142	19		T214	39
auto[0]	values[2]	values[1]	501	1			T19	20		T20	19		T42	19
auto[0]	values[2]	values[2]	434	1			T18	54		T193	4		T247	28
auto[0]	values[2]	values[3]	378	1			T18	20		T19	20		T42	19
auto[0]	values[2]	values[4]	420	1			T190	18		T241	70		T46	20
auto[0]	values[2]	values[5]	409	1			T14	22		T20	20		T138	8
auto[0]	values[2]	values[6]	549	1			T38	16		T37	46		T41	20
auto[0]	values[2]	values[7]	396	1			T18	22		T22	19		T187	20
auto[0]	values[3]	values[0]	394	1			T211	36		T187	42		T247	27
auto[0]	values[3]	values[1]	462	1			T18	22		T19	21		T42	20
auto[0]	values[3]	values[2]	652	1			T10	6		T15	20		T37	18
auto[0]	values[3]	values[3]	469	1			T42	20		T180	141		T28	30
auto[0]	values[3]	values[4]	281	1			T41	20		T32	31		T180	19
auto[0]	values[3]	values[5]	525	1			T99	14		T39	20		T32	43
auto[0]	values[3]	values[6]	338	1			T203	19		T222	16		T183	28
auto[0]	values[3]	values[7]	281	1			T185	18		T254	6		T46	20
auto[0]	values[4]	values[0]	703	1			T40	24		T39	20		T20	50
auto[0]	values[4]	values[1]	562	1			T136	14		T51	26		T55	20
auto[0]	values[4]	values[2]	410	1			T15	20		T19	19		T180	32
auto[0]	values[4]	values[3]	460	1			T41	19		T180	98		T255	2
auto[0]	values[4]	values[4]	348	1			T30	24		T20	20		T163	20
auto[0]	values[4]	values[5]	359	1			T20	22		T234	8		T187	20
auto[0]	values[4]	values[6]	372	1			T207	18		T209	33		T212	20
auto[0]	values[4]	values[7]	640	1			T53	18		T183	22		T200	20
auto[0]	values[5]	values[0]	300	1			T203	19		T187	20		T189	26
auto[0]	values[5]	values[1]	357	1			T37	20		T39	19		T18	21
auto[0]	values[5]	values[2]	343	1			T203	20		T229	26		T183	20
auto[0]	values[5]	values[3]	500	1			T20	25		T55	19		T181	20
auto[0]	values[5]	values[4]	506	1			T39	68		T32	26		T211	19
auto[0]	values[5]	values[5]	379	1			T163	18		T202	14		T141	20
auto[0]	values[5]	values[6]	293	1			T13	12		T46	20		T189	18
auto[0]	values[5]	values[7]	390	1			T37	63		T184	20		T141	20
auto[0]	values[6]	values[0]	527	1			T41	17		T163	20		T180	47
auto[0]	values[6]	values[1]	314	1			T39	20		T203	20		T228	2
auto[0]	values[6]	values[2]	443	1			T22	20		T184	24		T189	32
auto[0]	values[6]	values[3]	607	1			T256	18		T185	39		T200	18
auto[0]	values[6]	values[4]	530	1			T180	27		T46	20		T199	98
auto[0]	values[6]	values[5]	627	1			T30	30		T118	10		T39	54
auto[0]	values[6]	values[6]	634	1			T37	38		T39	19		T41	19
auto[0]	values[6]	values[7]	479	1			T37	25		T42	20		T162	63
auto[0]	values[7]	values[0]	334	1			T36	12		T30	20		T42	20
auto[0]	values[7]	values[1]	296	1			T223	16		T163	18		T198	8
auto[0]	values[7]	values[2]	658	1			T41	18		T20	20		T32	22
auto[0]	values[7]	values[3]	447	1			T19	20		T42	20		T209	21
auto[0]	values[7]	values[4]	600	1			T19	21		T248	4		T27	22
auto[0]	values[7]	values[5]	482	1			T15	20		T39	20		T18	20
auto[0]	values[7]	values[6]	385	1			T37	20		T208	12		T189	56
auto[0]	values[7]	values[7]	521	1			T22	43		T184	139		T141	27
auto[1]	values[0]	values[0]	7	1			T41	2		T239	1		T143	1
auto[1]	values[0]	values[1]	10	1			T39	2		T179	2		T257	2
auto[1]	values[0]	values[2]	11	1			T15	1		T20	2		T32	1
auto[1]	values[0]	values[3]	10	1			T37	2		T162	2		T258	2
auto[1]	values[0]	values[4]	14	1			T210	4		T251	3		T199	1
auto[1]	values[0]	values[5]	12	1			T259	2		T260	2		T261	1
auto[1]	values[0]	values[6]	17	1			T30	2		T18	1		T27	1
auto[1]	values[0]	values[7]	2	1			T262	1		T263	1		-	-
auto[1]	values[1]	values[0]	10	1			T161	3		T264	2		T265	1
auto[1]	values[1]	values[1]	16	1			T30	1		T37	2		T18	1
auto[1]	values[1]	values[2]	17	1			T184	2		T189	1		T259	3
auto[1]	values[1]	values[3]	12	1			T201	1		T46	1		T55	1
auto[1]	values[1]	values[4]	22	1			T39	7		T142	1		T221	3
auto[1]	values[1]	values[5]	8	1			T42	1		T27	2		T46	3
auto[1]	values[1]	values[6]	30	1			T22	8		T253	4		T266	2
auto[1]	values[1]	values[7]	10	1			T46	1		T220	2		T179	2
auto[1]	values[2]	values[0]	18	1			T19	2		T142	1		T214	1
auto[1]	values[2]	values[1]	11	1			T20	1		T42	1		T161	1
auto[1]	values[2]	values[2]	12	1			T80	2		T214	2		T262	1
auto[1]	values[2]	values[3]	7	1			T42	1		T181	1		T189	2
auto[1]	values[2]	values[4]	2	1			T49	1		T267	1		-	-
auto[1]	values[2]	values[5]	9	1			T180	1		T46	4		T183	2
auto[1]	values[2]	values[6]	12	1			T201	4		T251	1		T268	1
auto[1]	values[2]	values[7]	5	1			T22	1		T259	1		T269	1
auto[1]	values[3]	values[0]	4	1			T161	2		T270	1		T50	1
auto[1]	values[3]	values[1]	8	1			T18	2		T19	1		T271	1
auto[1]	values[3]	values[2]	16	1			T37	2		T39	1		T184	3
auto[1]	values[3]	values[3]	9	1			T180	3		T239	1		T259	1
auto[1]	values[3]	values[4]	15	1			T32	1		T180	1		T247	1
auto[1]	values[3]	values[5]	15	1			T32	5		T211	1		T27	2
auto[1]	values[3]	values[6]	21	1			T203	1		T204	2		T272	1
auto[1]	values[3]	values[7]	4	1			T185	2		T273	1		T271	1
auto[1]	values[4]	values[0]	24	1			T20	2		T46	1		T239	1
auto[1]	values[4]	values[1]	12	1			T47	4		T270	1		T274	2
auto[1]	values[4]	values[2]	11	1			T19	1		T28	2		T77	1
auto[1]	values[4]	values[3]	14	1			T41	1		T180	5		T194	4
auto[1]	values[4]	values[4]	8	1			T30	3		T246	1		T275	1
auto[1]	values[4]	values[5]	11	1			T20	2		T181	2		T276	2
auto[1]	values[4]	values[6]	9	1			T209	2		T269	2		T257	1
auto[1]	values[4]	values[7]	15	1			T77	1		T204	2		T277	2
auto[1]	values[5]	values[0]	2	1			T203	1		T179	1		-	-
auto[1]	values[5]	values[1]	11	1			T39	1		T46	2		T275	2
auto[1]	values[5]	values[2]	8	1			T275	2		T278	3		T274	2
auto[1]	values[5]	values[3]	14	1			T20	2		T55	1		T247	1
auto[1]	values[5]	values[4]	16	1			T39	3		T32	2		T211	1
auto[1]	values[5]	values[5]	11	1			T163	2		T47	1		T279	4
auto[1]	values[5]	values[6]	6	1			T189	2		T275	1		T257	1
auto[1]	values[5]	values[7]	5	1			T37	1		T182	1		T199	1
auto[1]	values[6]	values[0]	24	1			T41	3		T180	5		T280	4
auto[1]	values[6]	values[1]	7	1			T206	1		T200	1		T281	2
auto[1]	values[6]	values[2]	13	1			T189	1		T214	4		T282	3
auto[1]	values[6]	values[3]	15	1			T185	1		T200	2		T199	1
auto[1]	values[6]	values[4]	15	1			T199	2		T161	1		T47	2
auto[1]	values[6]	values[5]	12	1			T39	1		T203	1		T204	3
auto[1]	values[6]	values[6]	17	1			T37	1		T39	1		T41	1
auto[1]	values[6]	values[7]	12	1			T162	2		T257	3		T274	1
auto[1]	values[7]	values[0]	11	1			T203	1		T184	2		T141	1
auto[1]	values[7]	values[1]	12	1			T163	2		T258	1		T283	3
auto[1]	values[7]	values[2]	27	1			T41	2		T32	2		T163	1
auto[1]	values[7]	values[3]	14	1			T209	1		T257	2		T284	2
auto[1]	values[7]	values[4]	12	1			T19	1		T204	2		T285	1
auto[1]	values[7]	values[5]	18	1			T32	1		T185	3		T183	6
auto[1]	values[7]	values[6]	6	1			T286	2		T144	2		T287	2
auto[1]	values[7]	values[7]	9	1			T22	1		T184	1		T141	1