Unified Coverage Report :: Group :: spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

Group : spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_spi_device_env_0.1/spi_device_env_cov.sv

---

Summary for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	66	0	66	100.00
Crosses	128	0	128	100.00

Variables for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_filtered	2	0	2	100.00	100	1	1	2
cp_opcode	64	0	64	100.00	100	1	1	64

Crosses for Group spi_device_env_pkg::spi_device_env_cov::passthrough_cmd_filter_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_all	128	0	128	100.00	100	1	1	0

Summary for Variable cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_filtered

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

16278

1

T4

4

T5

334

T7

1

auto[1]

41360

1

T1

126

T2

145

T3

160

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	64	0	64	100.00

Automatically Generated Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	1369	1			T2	4		T3	3		T5	4
auto[4:7]	22541	1			T1	61		T2	23		T3	17
auto[8:11]	1312	1			T1	1		T2	1		T3	2
auto[12:15]	286	1			T1	1		T5	2		T13	4
auto[16:19]	354	1			T1	2		T2	1		T5	4
auto[20:23]	1838	1			T1	2		T2	5		T3	13
auto[24:27]	349	1			T5	2		T13	1		T40	1
auto[28:31]	345	1			T2	1		T5	1		T8	2
auto[32:35]	315	1			T1	2		T2	3		T3	1
auto[36:39]	304	1			T3	1		T13	1		T27	5
auto[40:43]	309	1			T5	2		T8	5		T27	1
auto[44:47]	280	1			T2	1		T3	2		T13	2
auto[48:51]	281	1			T2	1		T3	1		T5	2
auto[52:55]	1759	1			T1	1		T2	10		T3	8
auto[56:59]	1383	1			T1	1		T2	4		T4	2
auto[60:63]	330	1			T3	1		T5	2		T93	2
auto[64:67]	303	1			T5	3		T8	1		T13	2
auto[68:71]	319	1			T1	1		T3	1		T5	2
auto[72:75]	294	1			T2	2		T3	2		T13	2
auto[76:79]	347	1			T144	6		T27	5		T15	2
auto[80:83]	319	1			T1	1		T2	1		T5	2
auto[84:87]	320	1			T2	2		T3	2		T8	1
auto[88:91]	1805	1			T1	5		T2	8		T3	12
auto[92:95]	359	1			T1	3		T2	3		T3	2
auto[96:99]	355	1			T2	2		T3	1		T5	3
auto[100:103]	360	1			T1	4		T2	3		T5	4
auto[104:107]	1325	1			T1	1		T2	7		T3	6
auto[108:111]	363	1			T1	2		T2	1		T8	2
auto[112:115]	311	1			T1	4		T2	3		T3	1
auto[116:119]	308	1			T3	2		T5	2		T8	2
auto[120:123]	358	1			T1	1		T3	3		T5	5
auto[124:127]	331	1			T2	1		T3	1		T5	4
auto[128:131]	326	1			T3	1		T5	5		T93	2
auto[132:135]	343	1			T1	2		T3	2		T5	4
auto[136:139]	292	1			T1	1		T2	2		T3	1
auto[140:143]	303	1			T144	2		T15	2		T113	3
auto[144:147]	313	1			T3	1		T5	2		T27	2
auto[148:151]	301	1			T1	2		T27	1		T15	2
auto[152:155]	320	1			T2	1		T3	2		T5	2
auto[156:159]	1721	1			T1	4		T2	4		T3	7
auto[160:163]	339	1			T3	5		T5	2		T13	4
auto[164:167]	342	1			T3	2		T5	5		T13	3
auto[168:171]	345	1			T2	1		T3	3		T8	1
auto[172:175]	334	1			T1	5		T2	2		T3	2
auto[176:179]	358	1			T1	2		T2	3		T13	2
auto[180:183]	1722	1			T1	3		T2	3		T3	7
auto[184:187]	1275	1			T2	7		T3	5		T5	11
auto[188:191]	344	1			T2	2		T3	3		T5	1
auto[192:195]	343	1			T2	2		T8	3		T93	4
auto[196:199]	326	1			T1	2		T2	1		T3	2
auto[200:203]	306	1			T3	1		T5	8		T13	2
auto[204:207]	315	1			T3	1		T5	1		T8	3
auto[208:211]	262	1			T2	1		T3	3		T27	2
auto[212:215]	345	1			T2	5		T3	4		T13	1
auto[216:219]	328	1			T1	3		T2	3		T3	4
auto[220:223]	338	1			T3	3		T5	4		T13	2
auto[224:227]	301	1			T1	3		T2	3		T3	1
auto[228:231]	305	1			T1	2		T2	2		T5	3
auto[232:235]	2770	1			T1	2		T2	11		T3	12
auto[236:239]	326	1			T1	1		T3	1		T5	1
auto[240:243]	332	1			T3	3		T13	2		T27	2
auto[244:247]	303	1			T1	1		T2	2		T5	4
auto[248:251]	309	1			T3	1		T8	3		T13	1
auto[252:255]	319	1			T2	3		T3	1		T5	2

---

Summary for Cross cr_all

Samples crossed: cp_opcode cp_filtered

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	128	0	128	100.00

Automatically Generated Cross Bins for cr_all

Bins

cp_opcode	cp_filtered	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:3]	auto[0]	500	1			T5	2		T8	3		T9	3
auto[0:3]	auto[1]	869	1			T2	4		T3	3		T5	2
auto[4:7]	auto[0]	6281	1			T4	1		T5	238		T8	2
auto[4:7]	auto[1]	16260	1			T1	61		T2	23		T3	17
auto[8:11]	auto[0]	459	1			T5	1		T8	1		T13	1
auto[8:11]	auto[1]	853	1			T1	1		T2	1		T3	2
auto[12:15]	auto[0]	78	1			T5	1		T15	2		T42	1
auto[12:15]	auto[1]	208	1			T1	1		T5	1		T13	4
auto[16:19]	auto[0]	89	1			T5	3		T39	3		T18	1
auto[16:19]	auto[1]	265	1			T1	2		T2	1		T5	1
auto[20:23]	auto[0]	506	1			T5	4		T8	1		T13	1
auto[20:23]	auto[1]	1332	1			T1	2		T2	5		T3	13
auto[24:27]	auto[0]	93	1			T42	1		T18	2		T176	1
auto[24:27]	auto[1]	256	1			T5	2		T13	1		T40	1
auto[28:31]	auto[0]	66	1			T5	1		T15	6		T18	1
auto[28:31]	auto[1]	279	1			T2	1		T8	2		T27	3
auto[32:35]	auto[0]	77	1			T5	2		T15	3		T41	1
auto[32:35]	auto[1]	238	1			T1	2		T2	3		T3	1
auto[36:39]	auto[0]	92	1			T15	3		T44	1		T20	1
auto[36:39]	auto[1]	212	1			T3	1		T13	1		T27	5
auto[40:43]	auto[0]	86	1			T8	4		T15	4		T41	2
auto[40:43]	auto[1]	223	1			T5	2		T8	1		T27	1
auto[44:47]	auto[0]	80	1			T163	2		T15	2		T176	2
auto[44:47]	auto[1]	200	1			T2	1		T3	2		T13	2
auto[48:51]	auto[0]	64	1			T5	2		T29	1		T41	2
auto[48:51]	auto[1]	217	1			T2	1		T3	1		T8	2
auto[52:55]	auto[0]	476	1			T5	4		T8	1		T13	1
auto[52:55]	auto[1]	1283	1			T1	1		T2	10		T3	8
auto[56:59]	auto[0]	523	1			T4	1		T5	6		T8	2
auto[56:59]	auto[1]	860	1			T1	1		T2	4		T4	1
auto[60:63]	auto[0]	89	1			T5	1		T93	1		T15	2
auto[60:63]	auto[1]	241	1			T3	1		T5	1		T93	1
auto[64:67]	auto[0]	72	1			T5	2		T8	1		T15	1
auto[64:67]	auto[1]	231	1			T5	1		T13	2		T27	4
auto[68:71]	auto[0]	69	1			T5	2		T15	4		T21	3
auto[68:71]	auto[1]	250	1			T1	1		T3	1		T13	4
auto[72:75]	auto[0]	77	1			T40	1		T15	2		T41	2
auto[72:75]	auto[1]	217	1			T2	2		T3	2		T13	2
auto[76:79]	auto[0]	99	1			T144	3		T39	2		T43	2
auto[76:79]	auto[1]	248	1			T144	3		T27	5		T15	2
auto[80:83]	auto[0]	73	1			T40	2		T15	3		T43	1
auto[80:83]	auto[1]	246	1			T1	1		T2	1		T5	2
auto[84:87]	auto[0]	81	1			T8	1		T15	2		T18	3
auto[84:87]	auto[1]	239	1			T2	2		T3	2		T13	2
auto[88:91]	auto[0]	439	1			T5	1		T45	1		T93	1
auto[88:91]	auto[1]	1366	1			T1	5		T2	8		T3	12
auto[92:95]	auto[0]	98	1			T5	1		T144	2		T15	1
auto[92:95]	auto[1]	261	1			T1	3		T2	3		T3	2
auto[96:99]	auto[0]	103	1			T5	3		T144	1		T40	2
auto[96:99]	auto[1]	252	1			T2	2		T3	1		T144	1
auto[100:103]	auto[0]	94	1			T5	4		T40	1		T15	2
auto[100:103]	auto[1]	266	1			T1	4		T2	3		T13	2
auto[104:107]	auto[0]	470	1			T5	8		T7	1		T13	2
auto[104:107]	auto[1]	855	1			T1	1		T2	7		T3	6
auto[108:111]	auto[0]	99	1			T8	2		T40	2		T15	1
auto[108:111]	auto[1]	264	1			T1	2		T2	1		T13	6
auto[112:115]	auto[0]	75	1			T5	1		T41	1		T18	2
auto[112:115]	auto[1]	236	1			T1	4		T2	3		T3	1
auto[116:119]	auto[0]	80	1			T15	5		T18	3		T43	2
auto[116:119]	auto[1]	228	1			T3	2		T5	2		T8	2
auto[120:123]	auto[0]	107	1			T5	3		T15	1		T18	1
auto[120:123]	auto[1]	251	1			T1	1		T3	3		T5	2
auto[124:127]	auto[0]	101	1			T5	2		T40	2		T15	4
auto[124:127]	auto[1]	230	1			T2	1		T3	1		T5	2
auto[128:131]	auto[0]	63	1			T5	1		T93	1		T29	1
auto[128:131]	auto[1]	263	1			T3	1		T5	4		T93	1
auto[132:135]	auto[0]	76	1			T5	3		T40	1		T15	2
auto[132:135]	auto[1]	267	1			T1	2		T3	2		T5	1
auto[136:139]	auto[0]	83	1			T144	1		T15	3		T42	2
auto[136:139]	auto[1]	209	1			T1	1		T2	2		T3	1
auto[140:143]	auto[0]	75	1			T144	1		T15	2		T20	1
auto[140:143]	auto[1]	228	1			T144	1		T113	3		T91	1
auto[144:147]	auto[0]	92	1			T5	1		T15	1		T41	1
auto[144:147]	auto[1]	221	1			T3	1		T5	1		T27	2
auto[148:151]	auto[0]	76	1			T15	1		T41	1		T39	1
auto[148:151]	auto[1]	225	1			T1	2		T27	1		T15	1
auto[152:155]	auto[0]	79	1			T5	2		T15	1		T41	1
auto[152:155]	auto[1]	241	1			T2	1		T3	2		T13	1
auto[156:159]	auto[0]	478	1			T4	1		T5	10		T45	3
auto[156:159]	auto[1]	1243	1			T1	4		T2	4		T3	7
auto[160:163]	auto[0]	93	1			T15	5		T41	2		T39	1
auto[160:163]	auto[1]	246	1			T3	5		T5	2		T13	4
auto[164:167]	auto[0]	92	1			T13	2		T15	4		T41	1
auto[164:167]	auto[1]	250	1			T3	2		T5	5		T13	1
auto[168:171]	auto[0]	92	1			T15	2		T39	2		T18	4
auto[168:171]	auto[1]	253	1			T2	1		T3	3		T8	1
auto[172:175]	auto[0]	69	1			T40	1		T15	2		T39	3
auto[172:175]	auto[1]	265	1			T1	5		T2	2		T3	2
auto[176:179]	auto[0]	83	1			T40	2		T39	2		T242	1
auto[176:179]	auto[1]	275	1			T1	2		T2	3		T13	2
auto[180:183]	auto[0]	442	1			T5	4		T8	1		T13	1
auto[180:183]	auto[1]	1280	1			T1	3		T2	3		T3	7
auto[184:187]	auto[0]	457	1			T5	5		T8	2		T40	12
auto[184:187]	auto[1]	818	1			T2	7		T3	5		T5	6
auto[188:191]	auto[0]	97	1			T5	1		T15	4		T205	1
auto[188:191]	auto[1]	247	1			T2	2		T3	3		T27	2
auto[192:195]	auto[0]	80	1			T93	2		T18	5		T20	1
auto[192:195]	auto[1]	263	1			T2	2		T8	3		T93	2
auto[196:199]	auto[0]	97	1			T4	1		T15	3		T211	3
auto[196:199]	auto[1]	229	1			T1	2		T2	1		T3	2
auto[200:203]	auto[0]	72	1			T5	2		T40	2		T15	2
auto[200:203]	auto[1]	234	1			T3	1		T5	6		T13	2
auto[204:207]	auto[0]	83	1			T5	1		T8	2		T144	2
auto[204:207]	auto[1]	232	1			T3	1		T8	1		T144	2
auto[208:211]	auto[0]	76	1			T40	1		T236	1		T233	1
auto[208:211]	auto[1]	186	1			T2	1		T3	3		T27	2
auto[212:215]	auto[0]	82	1			T40	1		T15	1		T41	1
auto[212:215]	auto[1]	263	1			T2	5		T3	4		T13	1
auto[216:219]	auto[0]	78	1			T41	1		T39	2		T18	2
auto[216:219]	auto[1]	250	1			T1	3		T2	3		T3	4
auto[220:223]	auto[0]	81	1			T5	1		T40	1		T41	2
auto[220:223]	auto[1]	257	1			T3	3		T5	3		T13	2
auto[224:227]	auto[0]	71	1			T5	4		T8	1		T15	1
auto[224:227]	auto[1]	230	1			T1	3		T2	3		T3	1
auto[228:231]	auto[0]	75	1			T5	1		T15	2		T18	3
auto[228:231]	auto[1]	230	1			T1	2		T2	2		T5	2
auto[232:235]	auto[0]	905	1			T5	4		T9	2		T46	3
auto[232:235]	auto[1]	1865	1			T1	2		T2	11		T3	12
auto[236:239]	auto[0]	78	1			T5	1		T28	2		T40	2
auto[236:239]	auto[1]	248	1			T1	1		T3	1		T13	1
auto[240:243]	auto[0]	98	1			T15	2		T18	3		T44	4
auto[240:243]	auto[1]	234	1			T3	3		T13	2		T27	2
auto[244:247]	auto[0]	85	1			T30	2		T40	3		T41	3
auto[244:247]	auto[1]	218	1			T1	1		T2	2		T5	4
auto[248:251]	auto[0]	90	1			T15	5		T164	2		T39	5
auto[248:251]	auto[1]	219	1			T3	1		T8	3		T13	1
auto[252:255]	auto[0]	84	1			T5	1		T15	1		T42	2
auto[252:255]	auto[1]	235	1			T2	3		T3	1		T5	1